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137 Commits

Author SHA1 Message Date
Craig Topper
f2a9bd3a4a Add intrinsics and feature flag for read/write FS/GS base instructions. Also add AVX2 feature flag. 
llvm-svn: 143319
 2011-10-30 19:57:21 +00:00
Craig Topper
daa1bc1e9a Mark X86 pcmpeq b/w/d intrinsics as being Commutative. pcmpeqq is already marked as Commutative. 
llvm-svn: 143317
 2011-10-30 18:33:35 +00:00
Craig Topper
e77289b243 Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers. 
llvm-svn: 143313
 2011-10-30 17:22:45 +00:00
Craig Topper
fd96157f13 Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with custom isel lowering code. 
llvm-svn: 142642
 2011-10-21 06:55:01 +00:00
Craig Topper
b1fa647871 Rename PEXTR to PEXT. Add intrinsics for BMI instructions. 
llvm-svn: 142480
 2011-10-19 07:48:35 +00:00
Chad Rosier
b87c4a6945 Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist. 
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].

llvm-svn: 132163
 2011-05-26 23:13:19 +00:00
Bill Wendling
8495856e95 Remove dead intrinsics. 
llvm-svn: 130831
 2011-05-04 02:40:54 +00:00
Michael J. Spencer
05b07faeaf Add 3DNow! intrinsics. 
llvm-svn: 129551
 2011-04-15 00:32:41 +00:00
Michael J. Spencer
9c5e660612 Fix whitespace and tabs. 
llvm-svn: 129517
 2011-04-14 14:33:36 +00:00
Bill Wendling
0984f4927e Reapply r129401 with patch for clang. 
llvm-svn: 129419
 2011-04-13 00:36:11 +00:00
Bill Wendling
f6446a0961 Revert r129401 for now. Clang is using the old way of doing things. 
llvm-svn: 129403
 2011-04-12 22:59:27 +00:00
Bill Wendling
f9c9d3e05b Remove the unaligned load intrinsics in favor of using native unaligned loads. 
Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.

First part of <rdar://problem/8460511>.

llvm-svn: 129401
 2011-04-12 22:46:31 +00:00
Bill Wendling
b94ade249a The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!

llvm-svn: 115552
 2010-10-04 20:24:01 +00:00
Chris Lattner
d03783eaf2 the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
llvm-svn: 115473
 2010-10-03 19:09:13 +00:00
Dale Johannesen
c14a1eda84 Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
 2010-09-30 23:57:10 +00:00
Dale Johannesen
8354cab2de Add patterns for MMX that use the new intrinsics. 
Enable palignr intrinsic.
These may need adjustment for a new VT in due course.

llvm-svn: 113233
 2010-09-07 18:10:56 +00:00
Bill Wendling
b601685422 Revert int_x86_mmx_palignr_b intrinsic to match llvm-gcc's version. 
llvm-svn: 112886
 2010-09-02 22:31:53 +00:00
Bill Wendling
55612891ec - Change __builtin_ia32_palignr intrinsic type to match the pattern in clang. 
- Add patterns to match the following MMX builtins:

   * __builtin_ia32_vec_init_v8qi
   * __builtin_ia32_vec_init_v4hi
   * __builtin_ia32_vec_init_v2si
   * __builtin_ia32_vec_ext_v2si

  These builtins do not correspond to a single MMX instruction. They will have
  to be lowered -- most likely in the back-end.

llvm-svn: 112881
 2010-09-02 22:26:35 +00:00
Dale Johannesen
e7c3ecd9dd Recommit with changes. Comment out palignr for the 
moment, as there's a testcase that uses it and expects it
to be subject to optimizations; we won't be doing that.
Some adjustments based on feedback from Bill.

llvm-svn: 112754
 2010-09-01 22:43:48 +00:00
Dale Johannesen
8f257c1f83 Revert 112740, it broke some clang tests somehow... 
llvm-svn: 112744
 2010-09-01 21:36:44 +00:00
Dale Johannesen
20877c9c79 Add a few more missing MMX operations. This should be it. 
llvm-svn: 112740
 2010-09-01 21:03:03 +00:00
Dale Johannesen
1ba5a3fc80 Add some MMX intrinsics that duplicate functionality 
available in normal llvm operators.  We aren't going to
use those for MMX any more because it's unsafe for the
optimizers to synthesize new MMX instructions.

llvm-svn: 112685
 2010-09-01 00:40:09 +00:00
Chris Lattner
f0f35c4aea Add a new llvm.x86.int intrinsic, allowing access to the 
x86 int and int3 instructions.  Patch by Peter Housel!

llvm-svn: 111831
 2010-08-23 19:39:25 +00:00
Bruno Cardoso Lopes
3dcdd4b0bf Remove rsqrt/sqrt_nr intrinsics since there are no more builtins for them on clang 
llvm-svn: 110845
 2010-08-11 19:21:05 +00:00
Bruno Cardoso Lopes
15a98fafc3 Remove AVX 256-bit cast intrinsics now that clang is using __builtin_shufflevector for those 
llvm-svn: 110772
 2010-08-11 02:15:33 +00:00
Bruno Cardoso Lopes
423886f4db Remove AVX 256-bit unpack and interleave intrinsics now that clang is using __builtin_shufflevector for those 
llvm-svn: 110769
 2010-08-11 01:44:11 +00:00
Bruno Cardoso Lopes
dad2a6a89e Remove AVX 256-bit shuffle intrinsics now that clang is using __builtin_shufflevector for those 
llvm-svn: 110767
 2010-08-11 01:18:26 +00:00
Bruno Cardoso Lopes
460703a738 Remove replicate intrinsics, clang will generate shufflevector for those. The shuffles can't be matched by x86 codegen yet, but will soon 
llvm-svn: 110647
 2010-08-10 02:25:35 +00:00
Bruno Cardoso Lopes
7afe424c59 Use i32 instead of i8 for dot product intrinsic 
llvm-svn: 110643
 2010-08-10 01:40:05 +00:00
Bruno Cardoso Lopes
7d73127002 Fix the last argument type of AVX vblend intrinsics 
llvm-svn: 110628
 2010-08-10 00:00:22 +00:00
Bruno Cardoso Lopes
5b602f8822 Patterns to match AVX 256-bit vzero intrinsics 
llvm-svn: 110480
 2010-08-06 22:10:01 +00:00
Bruno Cardoso Lopes
90d1c89488 Remove unused AVX intrinsics 
llvm-svn: 110407
 2010-08-06 00:04:07 +00:00
Dan Gohman
8a813c4ded Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem 
to IntrReadWriteArgMem, as it's for reading as well as writing.

llvm-svn: 110395
 2010-08-05 23:36:21 +00:00
Bruno Cardoso Lopes
efd0309322 Fix a comment typo and add more 256-bit intrinsics 
llvm-svn: 110177
 2010-08-04 01:09:40 +00:00
Bruno Cardoso Lopes
49444b1cb2 Support x86 AVX 256-bit instruction intrinsics. Right now support all of them, but 
as soon as we properly codegen the simple vector operations in clang, remove the
unnecessary builti-ins/intrinsics from clang and llvm.

llvm-svn: 110094
 2010-08-03 01:53:41 +00:00
Eric Christopher
627e887b3d Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638

llvm-svn: 104617
 2010-05-25 17:33:22 +00:00
Eric Christopher
53e7e0fcfb Remove the palignr intrinsics now that we lower them to vector shuffles, 
shifts and null vectors. Autoupgrade these to what we'd lower them to.

Add a testcase to exercise this.

llvm-svn: 101851
 2010-04-20 00:59:54 +00:00
Eric Christopher
0e238efc7d Rewrite aesimc handling. It only takes a single input and has a single 
dest.

llvm-svn: 100252
 2010-04-02 23:48:33 +00:00
Eric Christopher
7263b3d802 Fix typo aeskeygenassist -> aeskeygenassist128. 
llvm-svn: 100250
 2010-04-02 23:29:36 +00:00
Eric Christopher
f6603c89d3 Add aeskeygenassist intrinsic and rename all of the aes intrinsics to 
aes instead of sse4.2.  Add a brief todo for a subtarget flag and rework
the aeskeygenassist instruction to more closely match the docs.

llvm-svn: 100078
 2010-04-01 03:05:45 +00:00
Eric Christopher
4c3a3208e3 Remove the pmulld intrinsic and autoupdate it as a vector multiply. 
Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.

llvm-svn: 99910
 2010-03-30 18:49:01 +00:00
Bob Wilson
04e9ff15cb Reapply Kevin's change 94440, now that Chris has fixed the limitation on 
opcode values fitting in one byte (svn r99494).

llvm-svn: 99514
 2010-03-25 16:36:14 +00:00
Bob Wilson
d5673d9f1f Speculatively revert this to see if it fixes buildbot failures. 
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 99450
 2010-03-24 23:26:29 +00:00
Kevin Enderby
9cab7fdb12 Added the Advanced Encryption Standard (AES) Instructions. 
llvm-svn: 99440
 2010-03-24 22:33:33 +00:00
Chris Lattner
4eac41e12e [llvm_void_ty] is no longer needed for result types, 
just use an empty result list.

llvm-svn: 99346
 2010-03-23 23:46:07 +00:00
Kevin Enderby
766909ae3b Fixed the encoding problems of the crc32 instructions. All had the Operand size 
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
 2010-03-19 20:04:42 +00:00
David Greene
c3f9f7a3db Revert r92939. These intrinsics get matched to LLVM instructions, 
so removing at Chris' request.

llvm-svn: 92947
 2010-01-07 21:43:58 +00:00
David Greene
7c9c709d3d Add some "missing" instrinsics to make the SSE intrinsic set a bit more 
orthogonal.

llvm-svn: 92939
 2010-01-07 19:47:43 +00:00
Eric Christopher
8a948265a1 Remove the gcc builtins from the intrinsics, we'll lower them 
explicitly so we can check arguments.

llvm-svn: 90199
 2009-12-01 03:18:26 +00:00
Sean Callanan
78ee7f5d57 Recommitting PALIGNR shift width fixes. 
Thanks to Daniel Dunbar for fixing clang intrinsics:
  http://llvm.org/viewvc/llvm-project?view=rev&revision=89499

llvm-svn: 89500
 2009-11-20 22:28:42 +00:00