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49327 Commits

Author SHA1 Message Date
Bill Wendling
546c7a05de Initial check in that will auto-upgrade the old EH scheme to the new EH scheme. 
This upgrade suffers from the problems of the old EH scheme - i.e., that the
calls to llvm.eh.exception() and llvm.eh.selector() can wander off and get
lost. It makes a valiant effort to reclaim these little lost lambs.

This is a first draft, so it hasn't yet been hooked up to the parser.

llvm-svn: 138602
 2011-08-25 23:22:40 +00:00
Bruno Cardoso Lopes
e6119d18de Do the same as r138461. Mark VZEROALL as clobbering all YMM registers 
llvm-svn: 138592
 2011-08-25 22:23:58 +00:00
Nick Lewycky
59cb9e0d85 Remove stray fullstop. 
llvm-svn: 138589
 2011-08-25 21:46:20 +00:00
Bruno Cardoso Lopes
5b3d2c9e17 Add support for AVX 256-bit version of MOVDDUP! 
llvm-svn: 138588
 2011-08-25 21:40:37 +00:00
Bruno Cardoso Lopes
dedd2ffa0b Make isMOVDDUP mask check more strict and update comments! 
llvm-svn: 138587
 2011-08-25 21:40:34 +00:00
Owen Anderson
d387b48b0b Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed. 
llvm-svn: 138575
 2011-08-25 18:30:18 +00:00
Benjamin Kramer
d710063e1e Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX. 
llvm-svn: 138573
 2011-08-25 18:05:56 +00:00
Andrew Trick
0dd0ae11f8 ARM fix for missing implicit operands on ldmia_ret. 
rdar://10005094: miscompile of 176.gcc

llvm-svn: 138568
 2011-08-25 17:50:53 +00:00
Andrew Trick
cd6126c2ab whitespace 
llvm-svn: 138566
 2011-08-25 17:40:54 +00:00
Jim Grosbach
e8641a3bc7 Explicitly disallow predication in Thumb1 assembly. 
llvm-svn: 138562
 2011-08-25 17:23:55 +00:00
Craig Topper
a6085b9757 Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678. 
llvm-svn: 138553
 2011-08-25 08:11:01 +00:00
Craig Topper
06ed6cb856 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723. 
llvm-svn: 138551
 2011-08-25 06:57:46 +00:00
Bill Wendling
1eec5affec LSR wants to split the landing pad's critical edge. Let it do it, but use the 
proper function to do it.

llvm-svn: 138550
 2011-08-25 05:55:40 +00:00
Benjamin Kramer
fc1e6fbc69 Initialize member variable. 
llvm-svn: 138548
 2011-08-25 04:04:18 +00:00
Bruno Cardoso Lopes
5d34219953 Add support for 256-bit versions of VSHUFPD and VSHUFPS. 
llvm-svn: 138546
 2011-08-25 02:58:26 +00:00
Bruno Cardoso Lopes
ccffe56b5d Add memory version of SHUFPD to mask decoding! 
llvm-svn: 138545
 2011-08-25 02:58:21 +00:00
Evan Cheng
7de8defb9c Hide -global-merge option. 
llvm-svn: 138540
 2011-08-25 01:22:49 +00:00
Bill Wendling
bc21b6ec6d When inserting new instructions, use getFirstInsertionPt instead of 
getFirstNonPHI so that it will skip over the landingpad instructions as well.

llvm-svn: 138537
 2011-08-25 01:08:34 +00:00
Evan Cheng
6c89acc6d1 Add a command line option to disable global merge pass. 
llvm-svn: 138536
 2011-08-25 01:00:36 +00:00
Evan Cheng
9a2607f3b9 Remove a out-of-place comment. 
llvm-svn: 138534
 2011-08-25 00:54:42 +00:00
Bruno Cardoso Lopes
dfa5cf4620 Create a section for non-instructions patterns in the beginning of the 
file, and move more code around!

llvm-svn: 138521
 2011-08-24 23:18:11 +00:00
Bruno Cardoso Lopes
719b357628 Move code around! 
llvm-svn: 138520
 2011-08-24 23:18:09 +00:00
Bruno Cardoso Lopes
3824b766ac Organize UNPCK* patterns, also add remaining for AVX. 
llvm-svn: 138519
 2011-08-24 23:18:06 +00:00
Bruno Cardoso Lopes
82c8bc7efd Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate 
the missing ones for AVX.

llvm-svn: 138518
 2011-08-24 23:18:04 +00:00
Bruno Cardoso Lopes
d315a6b6e6 Organize and tidy up MOVDDUP section. Also update comments! 
llvm-svn: 138517
 2011-08-24 23:18:02 +00:00
Bruno Cardoso Lopes
762fb13cc9 Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the 
pattern for 128-bit AVX mode.

llvm-svn: 138516
 2011-08-24 23:17:59 +00:00
Bruno Cardoso Lopes
d62766849f Move all PSHUF* patterns close to the PSHUF* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!

llvm-svn: 138515
 2011-08-24 23:17:57 +00:00
Bruno Cardoso Lopes
122f7cfc92 Move all SHUFP* patterns close to the SHUFP* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Make the mask check more strict, to be
clear it won't be used to match to 256-bit versions!

llvm-svn: 138514
 2011-08-24 23:17:55 +00:00
Owen Anderson
8a6cf48f0e Perform more thorough checking of t2IT mask parameters, which fixes all remaining crashers when disassembling the entire 16-bit instruction space. 
llvm-svn: 138507
 2011-08-24 22:40:22 +00:00
Eli Friedman
b6597a2e70 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually. 
llvm-svn: 138505
 2011-08-24 22:33:28 +00:00
Evan Cheng
7bfc442b2d Some autoconf tests use module level inline asm to test compiler's handling of 
.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184

llvm-svn: 138504
 2011-08-24 22:31:37 +00:00
Jim Grosbach
76b50c3819 ARM asm backend initialize isThumbMode based on target triple. 
llvm-svn: 138501
 2011-08-24 22:27:35 +00:00
Jim Grosbach
7374e16344 Thumb .n mnemonic qualifiers can be ignored for now. 
We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.

llvm-svn: 138500
 2011-08-24 22:19:48 +00:00
Jim Grosbach
effaf1e15d Thumb parsing and encoding for SUB (SP minu immediate). 
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

llvm-svn: 138494
 2011-08-24 21:42:27 +00:00
Owen Anderson
3732f1644b Be careful not to walk off the end of the operand info list while updating VFP predicates. 
llvm-svn: 138492
 2011-08-24 21:35:46 +00:00
Jim Grosbach
b2b155a93f Thumb parsing and encoding support for ADD SP instructions. 
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.

llvm-svn: 138488
 2011-08-24 21:22:15 +00:00
Eli Friedman
e4cd816e7b Fix whitespace. 
llvm-svn: 138487
 2011-08-24 21:17:30 +00:00
Bill Wendling
15062f817a Skip the landingpad instruction when determining the insertion point. 
llvm-svn: 138481
 2011-08-24 21:06:46 +00:00
Eli Friedman
6f95a6ae1b Basic x86 code generation for atomic load and store instructions. 
llvm-svn: 138478
 2011-08-24 20:50:09 +00:00
Bill Wendling
0301dcfde8 Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to the proper 
insertion place.

llvm-svn: 138473
 2011-08-24 20:28:43 +00:00
Nadav Rotem
43673d6d0b Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api. 
llvm-svn: 138469
 2011-08-24 20:18:38 +00:00
Jim Grosbach
ccee1ff0f5 When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate. 
rdar://10015134

llvm-svn: 138467
 2011-08-24 20:06:14 +00:00
Bruno Cardoso Lopes
734febce18 Mark VZEROALL as clobbering all YMM registers 
llvm-svn: 138461
 2011-08-24 18:48:33 +00:00
Jim Grosbach
9ae0de4db3 Add missing explicit writeback operand to tSTMIA_UPD. 
rdar://10014745

llvm-svn: 138457
 2011-08-24 18:19:42 +00:00
Evan Cheng
420bf5446c Move TargetRegistry and TargetSelect from Target to Support where they belong. 
These are strictly utilities for registering targets and components.

llvm-svn: 138450
 2011-08-24 18:08:43 +00:00
Rafael Espindola
e864ec28bd Fix a crashing bug in SplitBlock when it is called on a block with no 
dominator information even though dominators were previously computed.

Patch by Nick Sumner.

llvm-svn: 138449
 2011-08-24 18:07:01 +00:00
Jim Grosbach
bf012c3f19 Thumb add SP assembly syntax fix. 
llvm-svn: 138448
 2011-08-24 18:04:27 +00:00
Jim Grosbach
b33129ebad Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. 
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.

llvm-svn: 138445
 2011-08-24 17:46:13 +00:00
Owen Anderson
ee4d781cd3 Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate. 
llvm-svn: 138443
 2011-08-24 17:21:43 +00:00
Jim Grosbach
6d81544e1a Tidy up. Trailing whitespace. 
llvm-svn: 138437
 2011-08-24 16:44:17 +00:00
Richard Osborne
6b6b0b535d Add Uses=[SP] to call instructions. This fixes a miscompilation with a 
variable sized alloca.

llvm-svn: 138433
 2011-08-24 13:32:43 +00:00
Craig Topper
1da38a34a6 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. 
llvm-svn: 138427
 2011-08-24 06:14:18 +00:00
Bill Wendling
2cd76365f2 Add the sentinal "no handle" value to the ResumeInst. 
A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.

llvm-svn: 138416
 2011-08-24 00:00:23 +00:00
Bill Wendling
79b1f95f89 Don't replace *all* uses with the new stuff. 
This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.

llvm-svn: 138406
 2011-08-23 22:55:03 +00:00
Bill Wendling
acd21d7162 Look at the end of the entry block for an invoke. 
The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.

llvm-svn: 138397
 2011-08-23 22:20:16 +00:00
Bruno Cardoso Lopes
8959b54713 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit 
permutations. Also tidy up some patterns and make them close to their
instruction definition!

llvm-svn: 138392
 2011-08-23 22:06:37 +00:00
Bill Wendling
3de8a041b7 A landingpad instruction is neither folded nor dead. 
llvm-svn: 138387
 2011-08-23 21:33:05 +00:00
Jim Grosbach
b65ec7c64f Move ARM frame-unwinding EHABI handling a touch earlier. 
It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

llvm-svn: 138386
 2011-08-23 21:32:34 +00:00
Jim Grosbach
3832c5ac34 [SU]XT[BH] are only available on ARMv6 and up. 
llvm-svn: 138373
 2011-08-23 20:53:08 +00:00
Nate Begeman
87ffb9491b Add some useful accessors to c++ api that appear to be missing from the c api 
llvm-svn: 138371
 2011-08-23 20:27:46 +00:00
Evan Cheng
ed13551c1d Some refactoring so TargetRegistry.h no longer has to include any files 
from MC.

llvm-svn: 138367
 2011-08-23 20:15:21 +00:00
Eric Christopher
aa4993b9aa Revert "Address Duncan's CR request:" 
This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

llvm-svn: 138366
 2011-08-23 20:11:10 +00:00
Jim Grosbach
1f5b8e9044 Thumb parsing and encoding for SVC. 
llvm-svn: 138360
 2011-08-23 19:49:10 +00:00
Evan Cheng
ff0339eccc Fix 80 col violations. 
llvm-svn: 138356
 2011-08-23 19:17:21 +00:00
Nick Lewycky
11874a4e0a PerformSubCombine to work on integers larger than i128. Fixes a crasher. 
llvm-svn: 138354
 2011-08-23 19:01:24 +00:00
Jim Grosbach
f9bc99b518 Thumb parsing and encoding for tSTRspi. 
llvm-svn: 138348
 2011-08-23 18:39:41 +00:00
Jim Grosbach
3b20e779cd Thumb parsing and encoding for STM. 
llvm-svn: 138345
 2011-08-23 18:15:37 +00:00
Jim Grosbach
709c1644b0 Factor low reg checking into a helper function. 
llvm-svn: 138344
 2011-08-23 18:13:04 +00:00
Owen Anderson
3de2d7656d Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
llvm-svn: 138341
 2011-08-23 17:51:38 +00:00
Nadav Rotem
d449bc9bff Address Duncan's CR request: 
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340
 2011-08-23 17:48:43 +00:00
Owen Anderson
4ae835d7c9 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions. 
llvm-svn: 138339
 2011-08-23 17:45:18 +00:00
Jim Grosbach
6ada94c011 Clean up Thumb load/store multiple definitions. 
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.

llvm-svn: 138338
 2011-08-23 17:41:15 +00:00
Owen Anderson
9d5074746f Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
llvm-svn: 138337
 2011-08-23 17:37:32 +00:00
Ivan Krasin
aa3c2057c5 This patch adds support of le32 pseudo-cpu that stands for generic 
32-bit little-endian CPU. Used by PNaCl and Emscripten.

llvm-svn: 138335
 2011-08-23 16:59:00 +00:00
Craig Topper
67b22aedb4 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. 
llvm-svn: 138321
 2011-08-23 04:36:33 +00:00
NAKAMURA Takumi
6b729bec35 lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be enough for Windows XP. 
llvm-svn: 138319
 2011-08-23 03:49:11 +00:00
Bruno Cardoso Lopes
8024703a16 Introduce a pass to insert vzeroupper instructions to avoid AVX to 
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
 2011-08-23 01:14:17 +00:00
Jim Grosbach
d299db0857 Thumb parsing and encoding for SBC. 
llvm-svn: 138311
 2011-08-22 23:55:58 +00:00
Jim Grosbach
5ae40d73a6 Thumb parsing and encoding for RSB. 
llvm-svn: 138308
 2011-08-22 23:47:13 +00:00
Owen Anderson
33f3f4ec2a Reject invalid imod values in t2CPS instructions. 
llvm-svn: 138306
 2011-08-22 23:44:04 +00:00
Bill Wendling
02e66489db Split the landing pad's edge. Then for all uses of a landingpad instruction's 
value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.

llvm-svn: 138302
 2011-08-22 23:38:40 +00:00
Owen Anderson
d5b7d73696 t2SMLAD is a four-register instruction, not a three-register one. 
llvm-svn: 138301
 2011-08-22 23:31:45 +00:00
Owen Anderson
c395a07c42 Correct operand naming of t2USAT16 to allow proper decoding. 
llvm-svn: 138300
 2011-08-22 23:27:47 +00:00
Jim Grosbach
a59709ec01 Revert r138278 now that r138289 has fixed the root issue. 
llvm-svn: 138299
 2011-08-22 23:25:48 +00:00
Owen Anderson
9e750147fb Match operand naming to allow correct decoding of t2LDRSH_POST. 
llvm-svn: 138298
 2011-08-22 23:22:05 +00:00
Jim Grosbach
54234257fa Improve error checking for tPUSH and tPOP register lists. 
llvm-svn: 138295
 2011-08-22 23:17:34 +00:00
Owen Anderson
1cc1a1cb6a Match operand names to provide correct decoding for Thumb2 SMULL. 
llvm-svn: 138294
 2011-08-22 23:16:48 +00:00
Owen Anderson
b400952853 Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
llvm-svn: 138292
 2011-08-22 23:10:16 +00:00
Ivan Krasin
47d91d86ca Add NativeClient support to Triple::ParseOS. 
llvm-svn: 138291
 2011-08-22 23:08:53 +00:00
Evan Cheng
a828915f91 Follow up to Jim's r138278. This fixes commuteInstruction so it handles two-address instructions correctly. I'll let Jim add a test case. :-) 
llvm-svn: 138289
 2011-08-22 23:04:56 +00:00
Jim Grosbach
ec3958e68e Thumb assemmbly parsing diagnostic improvements for LDM. 
llvm-svn: 138287
 2011-08-22 23:01:07 +00:00
Benjamin Kramer
bd13a6a319 X86: Add some operand types required to identify calls. 
llvm-svn: 138285
 2011-08-22 22:55:32 +00:00
Jim Grosbach
d28882c799 Temporarilly mark tMUL as not commutable. 
It's not playing nicely in the coalescer with the tied operand. Disable
commutability for now while we figure out the deeper fix.

llvm-svn: 138278
 2011-08-22 22:00:18 +00:00
Owen Anderson
a2231fad2e Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing. 
llvm-svn: 138273
 2011-08-22 21:34:00 +00:00
Bruno Cardoso Lopes
8007165688 Add support for breaking 256-bit int VETCC into two 128-bit ones, 
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

llvm-svn: 138271
 2011-08-22 20:31:04 +00:00
Bruno Cardoso Lopes
23ff325f5b Add 128-bit AVX codegen for PCMP* family of integer instructions 
llvm-svn: 138270
 2011-08-22 20:31:00 +00:00
Owen Anderson
39d3f234f7 Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing. 
llvm-svn: 138269
 2011-08-22 20:27:12 +00:00
Jordy Rose
62453a17f9 Make DynamicLibrary thread-safe w/r/t call to dlerror() after dlopen(). PR10718 
llvm-svn: 138260
 2011-08-22 19:01:52 +00:00
Jim Grosbach
303d34cede Tighten up ARM reglist validation a bit. 
llvm-svn: 138258
 2011-08-22 18:50:36 +00:00
Bill Wendling
675b27b3f9 Some whitespace fixes and #include reordering. 
llvm-svn: 138256
 2011-08-22 18:44:49 +00:00