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Author SHA1 Message Date
Shih-wei Liao
007309e940 Adding the missing implementation of Bitfield's "clear" and "insert". 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7222.

llvm-svn: 104653
 2010-05-26 00:25:05 +00:00
Shih-wei Liao
4a26d7ca61 To handle s* registers in emitVFPLoadStoreMultipleInstruction(). 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7221.

llvm-svn: 104652
 2010-05-26 00:02:28 +00:00
Eric Christopher
371732bd2a Start adding mach-o tls reloc support. 
llvm-svn: 104651
 2010-05-26 00:02:12 +00:00
Jakob Stoklund Olesen
41388819f1 Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 
llvm-svn: 104650
 2010-05-25 23:43:18 +00:00
Devang Patel
d7ad8ac4c0 First cut at supporting .debug_loc section. 
This is used to track variable information.

llvm-svn: 104649
 2010-05-25 23:40:22 +00:00
Benjamin Kramer
0acbf37982 Properly promote operands when optimizing a single-character memcmp. 
llvm-svn: 104648
 2010-05-25 22:53:43 +00:00
Bill Wendling
606136be2b Constify function. 
llvm-svn: 104646
 2010-05-25 22:02:22 +00:00
Dan Gohman
803cd02b11 Do one map lookup instead of two. 
llvm-svn: 104645
 2010-05-25 21:59:42 +00:00
Dan Gohman
a08b225866 Fix a missing newline in debug output. 
llvm-svn: 104644
 2010-05-25 21:50:35 +00:00
Eric Christopher
f6d55e86e7 Move the verbose asm output up a bit so it can be used in the special cases 
as well.

llvm-svn: 104642
 2010-05-25 21:49:43 +00:00
Bill Wendling
7a452a26bc Okay, bear with me here... 
If you have a setjmp/longjmp situation, it's possible for stack slot coloring to
reuse a stack slot before it's really dead. For instance, if we have something
like this:

1:  y = g;
    x = sigsetjmp(env, 0);
    switch (x) {
    case 1:
      /* ... */
      goto run;  
    case 0:
  run:
      do_run(); /* marked as "no return" */
      break;
    case 3:
      if (...) {
        /* ... */
        goto run;
      }
      /* ... */
      break;
    }

2:  g = y;

"y" may be put onto the stack, so the expression "g = y" is relying upon the
fact that the stack slot containing "y" isn't modified between (1) and (2). But
it can be, because of the "no return" calls in there. A longjmp might come back
with 3, modify the stack slot, and then go to case 0. And it's perfectly
acceptable to reuse the stack slot there because there's no CFG flow from case 3
to (2).

The fix is to disable certain optimizations in these situations. Ideally, we'd
disable them for all "returns twice" functions. But we don't support that
attribute. Check for "setjmp" and "sigsetjmp" instead.

llvm-svn: 104640
 2010-05-25 21:44:26 +00:00
Eric Christopher
5c5a5be829 Add support for initialized global data for darwin tls. Update comments 
and testcases accordingly.

llvm-svn: 104635
 2010-05-25 21:28:50 +00:00
Kevin Enderby
392dd2b35f Changed the encoding of X86 floating point stack operations where both operands 
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.

llvm-svn: 104634
 2010-05-25 20:52:34 +00:00
Dale Johannesen
9d2f1f2b16 Removing test; Chris thinks it's better to have the 
bug go untested than have a testcase this large.  So be it.

llvm-svn: 104632
 2010-05-25 20:40:10 +00:00
Jakob Stoklund Olesen
1fcfb4a867 Separate unrelated cases that once shared a numeric value 
llvm-svn: 104629
 2010-05-25 19:49:40 +00:00
Jakob Stoklund Olesen
9210d3b189 Print symbolic SubRegIndex names on machine operands. 
llvm-svn: 104628
 2010-05-25 19:49:38 +00:00
Jakob Stoklund Olesen
696fbed514 Remove NumberHack entirely. 
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.

llvm-svn: 104627
 2010-05-25 19:49:33 +00:00
Daniel Dunbar
15b9844a05 MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. 
llvm-svn: 104626
 2010-05-25 19:49:32 +00:00
Dale Johannesen
8fd73c1910 Fix another variant of PR 7191. Also add a testcase 
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.

llvm-svn: 104624
 2010-05-25 18:47:23 +00:00
Daniel Dunbar
28018eed17 MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. 
llvm-svn: 104622
 2010-05-25 18:40:53 +00:00
Kevin Enderby
e336aaa32b The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required 
for the 64-bit version of the Bit Test instruction.

llvm-svn: 104621
 2010-05-25 18:16:58 +00:00
Dale Johannesen
42c91e9024 Fix PR 7191. I have been unable to create a .ll file that fails, sorry. 
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)

llvm-svn: 104619
 2010-05-25 17:50:03 +00:00
Eric Christopher
627e887b3d Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638

llvm-svn: 104617
 2010-05-25 17:33:22 +00:00
Jakob Stoklund Olesen
6e7961be11 Ignore NumberHack and give each SubRegIndex instance a unique enum value instead. 
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

llvm-svn: 104615
 2010-05-25 17:21:04 +00:00
Jakob Stoklund Olesen
56e4442b2c Use enums instead of literals for SystemZ subregisters 
llvm-svn: 104612
 2010-05-25 17:04:18 +00:00
Jakob Stoklund Olesen
201408751f Use enums instead of literals for X86 subregisters. 
The cases in getMatchingSuperRegClass cannot be broken up until the enums have
unique values.

llvm-svn: 104611
 2010-05-25 17:04:16 +00:00
Zonr Chang
465ebb1bcf Add missing implementation to the materialization of VFP misc. instructions (vmrs, vmsr and vmov (immediate)) 
llvm-svn: 104588
 2010-05-25 10:23:52 +00:00
Zonr Chang
5ce8b82ebf Add support to MOVimm32 using movt/movw for ARM JIT 
llvm-svn: 104587
 2010-05-25 08:42:45 +00:00
Bob Wilson
bcd0854609 Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated. 
I don't know of any particular reason why that would be important, but
neither can I see any reason to disallow it.

llvm-svn: 104583
 2010-05-25 04:51:47 +00:00
Bob Wilson
c8bea44d68 Fix up instruction classes for Thumb2 RSB instructions to be consistent with 
Thumb2 ADD and SUB instructions: allow RSB instructions be changed to set the
condition codes, and allow RSBS instructions to be predicated.

llvm-svn: 104582
 2010-05-25 04:43:08 +00:00
Bob Wilson
49df2d928d Clean up indentation. 
llvm-svn: 104580
 2010-05-25 03:36:52 +00:00
Jakob Stoklund Olesen
3e9a143416 Disable invalid coalescer assertion. 
llvm-svn: 104574
 2010-05-25 00:15:18 +00:00
Jakob Stoklund Olesen
3f68e903d7 Use enums instead of literals in the ARM backend. 
llvm-svn: 104573
 2010-05-25 00:15:15 +00:00
Bill Wendling
ba69a15fc0 Print out the name of the function during SSC. 
llvm-svn: 104572
 2010-05-24 23:16:04 +00:00
Jakob Stoklund Olesen
d1f4d14609 Switch SubRegSet to using symbolic SubRegIndices 
llvm-svn: 104571
 2010-05-24 23:03:18 +00:00
Bob Wilson
b5c1a4be63 Allow Thumb2 MVN instructions to set condition codes. The immediate operand 
version of t2MVN already allowed that, but not the register versions.

llvm-svn: 104570
 2010-05-24 22:41:19 +00:00
Chris Lattner
6ea2f4d4cc diaggroup categories should take precedence over diag-specific groups. 
llvm-svn: 104567
 2010-05-24 21:55:47 +00:00
Jakob Stoklund Olesen
e3f6ea45b2 Lose the dummies 
llvm-svn: 104564
 2010-05-24 21:47:01 +00:00
Jakob Stoklund Olesen
3a19b732d8 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data 
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

llvm-svn: 104563
 2010-05-24 21:46:58 +00:00
Evan Cheng
e34814c0bc Avoid adding duplicate function live-in's. 
llvm-svn: 104560
 2010-05-24 21:33:37 +00:00
Dan Gohman
824858ebb0 Fix an mmx movd encoding. 
llvm-svn: 104552
 2010-05-24 20:51:08 +00:00
Kevin Enderby
a911679139 MC/X86: Add aliases for CMOVcc variants. 
llvm-svn: 104549
 2010-05-24 20:32:23 +00:00
Bob Wilson
e6a30dc530 Clean up some extra whitespace. 
llvm-svn: 104544
 2010-05-24 20:08:34 +00:00
Bob Wilson
c71b7c8c61 Thumb2 RSBS instructions were being printed without the 'S' suffix. 
Fix it by changing the T2I_rbin_s_is multiclass to handle the CPSR
output and 'S' suffix in the same way as T2I_bin_s_irs.

llvm-svn: 104531
 2010-05-24 18:44:06 +00:00
Devang Patel
345bc8667e Do not emit line number entries for unknown debug values. 
This fixes recent regression in store.exp from gdb testsuite.

llvm-svn: 104524
 2010-05-24 18:26:49 +00:00
Evan Cheng
9b011e343c LR is in GPR, not tGPR even in Thumb1 mode. 
llvm-svn: 104518
 2010-05-24 18:00:18 +00:00
Jakob Stoklund Olesen
4f2bfd8451 Add SubRegIndex defs to PowerPC. It looks like the CR subregister indices are 
never used.

llvm-svn: 104517
 2010-05-24 17:55:38 +00:00
Jakob Stoklund Olesen
26bb6fd4f2 Use SubRegIndex in SystemZ. 
Anton, please review the change to SystemZAsmPrinter.cpp. It could be a bug.

llvm-svn: 104515
 2010-05-24 17:43:01 +00:00
Jakob Stoklund Olesen
7c5127a0c6 SubRegIndex'ize Mips 
llvm-svn: 104514
 2010-05-24 17:42:58 +00:00
Jakob Stoklund Olesen
6d971535b8 SubRegIndex'ize MSP430 
llvm-svn: 104513
 2010-05-24 17:42:55 +00:00