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Commit Graph

117313 Commits

Author SHA1 Message Date
Sanjay Patel
bd64e4a363 fix typos, remove function names from comments, NFC
llvm-svn: 237969
2015-05-21 23:04:44 +00:00
David Majnemer
b6938a4929 [InstCombine] X - 0 is equal to X, not undef
A refactoring made @llvm.ssub.with.overflow.i32(i32 %X, i32 0) transform
into undef instead of %X.

This fixes PR23624.

llvm-svn: 237968
2015-05-21 23:04:21 +00:00
Pete Cooper
2c9a26c1e1 Use Op<0> accessor instead of OperandList for Instructions. NFC
This is consistent with other uses of the operand list.  I'm planning a future commit where this will actually matter.

llvm-svn: 237967
2015-05-21 22:48:54 +00:00
Chad Rosier
8a4255f8f7 Use new MachineInstr mayLoadOrStore() API.
llvm-svn: 237965
2015-05-21 21:59:57 +00:00
Quentin Colombet
0356c2ca6e [InlineSpiller] Fix rematerialization for bundles.
Prior to this patch, we could update the operand of another MI in the same
bundle.

Longer version:
Before InlineSpiller rematerializes a vreg, it iterates over operands of each MI
in a bundle, collecting all (MI, OpNo) pairs that reference that vreg.

Then if it does rematerialize, it goes through the pair list and replaces the
operands with the new (rematerialized) vreg.  The problem is, it tries to
replace all of these operands in the main MI ! This works fine for single MIs.
However, if we are processing a bundle of MIs and the list contains multiple
pairs - the rematerialization will either crash trying to access a non-existing
operand of the main MI, or silently corrupt one of the existing ones. It will
also ignore other MIs in the bundle.

The obvious fix is to use the MI pointers saved in collected (MI, OpNo) pairs.
This must have been the original intent of the pair list but somehow these
pointers got lost.

Patch by Dmitri Shtilman <dshtilman@icloud.com>!

Differential revision: http://reviews.llvm.org/D9904

<rdar://problem/21002163>

llvm-svn: 237964
2015-05-21 21:41:55 +00:00
Chad Rosier
42c30bc92c [AArch64] Enhance the load/store optimizer with target-specific alias analysis.
Phabricator: http://reviews.llvm.org/D9863
llvm-svn: 237963
2015-05-21 21:36:46 +00:00
Sanjay Patel
1518d12105 fix typo in comment; NFC
llvm-svn: 237962
2015-05-21 21:29:13 +00:00
Keno Fischer
e81cbbea60 Make it easier to use DwarfContext with MCJIT
Summary:
This supersedes http://reviews.llvm.org/D4010, hopefully properly
dealing with the JIT case and also adds an actual test case.
DwarfContext was basically already usable for the JIT (and back when
we were overwriting ELF files it actually worked out of the box by
accident), but in order to resolve relocations correctly it needs
to know the load address of the section.
Rather than trying to get this out of the ObjectFile or requiring
the user to create a new ObjectFile just to get some debug info,
this adds the capability to pass in that info directly.
As part of this I separated out part of the LoadedObjectInfo struct
from RuntimeDyld, since it is now required at a higher layer.

Reviewers: lhames, echristo

Reviewed By: echristo

Subscribers: vtjnash, friss, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D6961

llvm-svn: 237961
2015-05-21 21:24:32 +00:00
David Blaikie
08dd170de1 Put GEPOperator member function definition in the appropriate .cpp file
Last commit put it in Constants.cpp instead of Operator.cpp

llvm-svn: 237960
2015-05-21 21:17:12 +00:00
David Blaikie
60f1af3ffd [opaque pointer type] Allow gep_type_iterator to work with the pointee type from the GEP instruction
The raw non-instruction/constant form of this is still relying on being
able to access the pointee type from a pointer type - those will be
cleaned up later. For now, just focus on the cases where the pointee
type is easily accessible.

llvm-svn: 237958
2015-05-21 21:12:43 +00:00
Rafael Espindola
e81026f8a7 Stop forwarding (get|set)Aligment from MCSectionData to MCSection.
llvm-svn: 237956
2015-05-21 21:02:35 +00:00
Chad Rosier
c4d3b538dd [MachineInstr] Add mayLoadOrStore API. NFC.
llvm-svn: 237955
2015-05-21 21:00:30 +00:00
Alex Lorenz
4c932ccc6c Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit is a 2nd attempt at committing the initial MIR serialization patch.
The first commit (r237708) made the incremental buildbots unstable and was 
reverted in r237730. The original commit didn't add a terminating null 
character to the LLVM IR source which was passed to LLParser, and this 
sometimes caused the test 'llvmIR.mir' to fail with a parsing error because 
the LLVM IR source didn't have a null character immediately after the end 
and thus LLLexer encountered some garbage characters that ultimately caused 
the error.

This commit also includes the other test fixes I committed in
r237712 (llc path fix) and r237723 (remove target triple) which
also got reverted in r237730.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR 
using the MIR format. This pass is then added as a last pass when a 
'stop-after' option is used in llc. The new library adds the initial 
functionality for parsing of MIR files as well. This commit also 
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616

llvm-svn: 237954
2015-05-21 20:54:45 +00:00
Bill Schmidt
39c88f95dd [PPC64] Handle vpkudum mask pattern correctly when vpkudum isn't available
My recent patch to add support for ISA 2.07 vector pack/unpack
instructions didn't properly check for availability of the vpkudum
instruction when recognizing it as a special vector shuffle case.
This causes us to leave the vector shuffle in place (rather than
converting it to a vector permute) so that it can be recognized later
as a vpkudum, but that pattern is invalid for processors prior to
POWER8.  Thus LLVM crashes with an "unable to select" message.  We
observed this since one of our buildbots is configured to generate
code for a POWER7.

This patch fixes the problem by checking for availability of the
vpkudum instruction during custom lowering of vector shuffles.

I've added a test case variant for the vpkudum pattern when the
instruction isn't available.

llvm-svn: 237952
2015-05-21 20:48:49 +00:00
Rafael Espindola
39f3fdf533 Stop creating MCSectionData is the ELF writer.
Now is is just its use of MCSymbolData that requires it to take a non const
MCAssembler.

llvm-svn: 237951
2015-05-21 20:43:13 +00:00
Kostya Serebryany
a05448768c [lib/Fuzzer] ignore flags that start with --; use git pull --rebase instead of just git pull
llvm-svn: 237950
2015-05-21 20:39:13 +00:00
Adrian Prantl
7f7701017d IR / debug info: Add a DWOId field to DICompileUnit,
so DWARF skeleton CUs can be expression in IR. A skeleton CU is a
(typically empty) DW_TAG_compile_unit that has a DW_AT_(GNU)_dwo_name and
a DW_AT_(GNU)_dwo_id attribute. It is used to refer to external debug info.

This is a prerequisite for clang module debugging as discussed in
http://lists.cs.uiuc.edu/pipermail/cfe-dev/2014-November/040076.html.
In order to refer to external types stored in split DWARF (dwo) objects,
such as clang modules, we need to emit skeleton CUs, which identify the
dwarf object (i.e., the clang module) by filename (the SplitDebugFilename)
and a hash value, the dwo_id.

This patch only contains the IR changes. The idea is that a CUs with a
non-zero dwo_id field will be emitted together with a DW_AT_GNU_dwo_name
and DW_AT_GNU_dwo_id attribute.

http://reviews.llvm.org/D9488
rdar://problem/20091852

llvm-svn: 237949
2015-05-21 20:37:30 +00:00
Hal Finkel
6a8a9c45cc [PPC/LoopUnrollRuntime] Don't avoid high-cost trip count computation on the PPC/A2
On X86 (and similar OOO cores) unrolling is very limited, and even if the
runtime unrolling is otherwise profitable, the expense of a division to compute
the trip count could greatly outweigh the benefits. On the A2, we unroll a lot,
and the benefits of unrolling are more significant (seeing a 5x or 6x speedup
is not uncommon), so we're more able to tolerate the expense, on average, of a
division to compute the trip count.

llvm-svn: 237947
2015-05-21 20:30:23 +00:00
Rafael Espindola
e9053d45a4 writeSymbolTable now only needs a MCContext.
It used to use an MCAssembler just to record the alignment of the sections.

llvm-svn: 237944
2015-05-21 19:54:44 +00:00
Rafael Espindola
30c1a5844f Pass a const MCAssembler to writeSectionHeader.
It never creates sections, so it can use Asm.getSectionData instead of
Asm.getOrCreateSectionData.

llvm-svn: 237943
2015-05-21 19:46:39 +00:00
Alex Lorenz
c25022ea5f YAML: Null terminate block scalar's value.
The commit null terminates the string value in the `yaml::BlockScalarNode`
class.

This change is motivated by the initial MIR serialization commit (r237708)
that I reverted in r237730 because the LLVM IR source from the block
scalar node wasn't terminated by a null character and thus the buildbots
failed on one testcase sometimes. This change enables me to recommit 
the reverted commit. 

llvm-svn: 237942
2015-05-21 19:45:02 +00:00
Peter Collingbourne
dda6a07fcf Revert r237766, "Support: Introduce LLVM_FALLTHROUGH macro."
The value of this macro seems to be very low unless we actually start
using it everywhere, and I don't have immediate plans to make that
happen.

llvm-svn: 237941
2015-05-21 19:44:44 +00:00
Rafael Espindola
961998c8b6 Remove unused argument. NFC.
llvm-svn: 237940
2015-05-21 19:42:35 +00:00
Derek Schuff
435b70a5c0 Fix StreamingMemoryObject to respect known object size.
The existing code for method StreamingMemoryObject.fetchToPos does not respect
the corresonding call to setKnownObjectSize(). As a result, it allows the
StreamingMemoryObject to read bytes past the object size.

This patch provides a test case, and code to fix the problem.

Patch by Karl Schimpf
Differential Revision: http://reviews.llvm.org/D8931

llvm-svn: 237939
2015-05-21 19:40:19 +00:00
Rafael Espindola
be91ff7810 Fetch alignment directly out of MCSection. NFC.
llvm-svn: 237938
2015-05-21 19:36:43 +00:00
Nemanja Ivanovic
78592ebe3a Add support for VSX scalar single-precision arithmetic in the PPC target
http://reviews.llvm.org/D9891
Following up on the VSX single precision loads and stores added earlier, this
adds support for elementary arithmetic operations on single precision values
in VSX registers. These instructions utilize the new VSSRC register class.
Instructions added:
xsaddsp
xsdivsp
xsmulsp
xsresp
xsrsqrtesp
xssqrtsp
xssubsp

llvm-svn: 237937
2015-05-21 19:32:49 +00:00
Rafael Espindola
dda3f1317e Move alignment from MCSectionData to MCSection.
This starts merging MCSection and MCSectionData.

There are a few issues with the current split between MCSection and
MCSectionData.

* It optimizes the the not as important case. We want the production
of .o files to be really fast, but the split puts the information used
for .o emission in a separate data structure.

* The ELF/COFF/MachO hierarchy is not represented in MCSectionData,
leading to some ad-hoc ways to represent the various flags.

* It makes it harder to remember where each item is.

The attached patch starts merging the two by moving the alignment from
MCSectionData to MCSection.

Most of the patch is actually just dropping 'const', since
MCSectionData is mutable, but MCSection was not.

llvm-svn: 237936
2015-05-21 19:20:38 +00:00
Benjamin Kramer
38883b983f [LoopDistribute] Remove a layer of pointer indirection.
Just store InstPartitions directly into the std::list. No functional change
intended.

llvm-svn: 237930
2015-05-21 18:32:07 +00:00
Sanjay Patel
ecca1967d0 use range-based for-loops; NFCI
llvm-svn: 237918
2015-05-21 17:43:26 +00:00
Sanjay Patel
0009a99bbf use range-based for-loops; NFCI
llvm-svn: 237917
2015-05-21 17:22:45 +00:00
Rafael Espindola
13960df9de Fix warning on builds without asserts.
llvm-svn: 237915
2015-05-21 17:09:22 +00:00
Sanjay Patel
ff3ba72b91 use range-based for-loop
llvm-svn: 237914
2015-05-21 17:04:17 +00:00
Rafael Espindola
e11015eff3 Avoid unnecessary section switching. NFC.
llvm-svn: 237913
2015-05-21 17:00:40 +00:00
Rafael Espindola
ef656a945b Remove yet another method of creating begin and end symbol for sections.
I missed this one when first unifying how we handle begin and end symbols.

llvm-svn: 237912
2015-05-21 16:52:32 +00:00
Sanjay Patel
9c27a1a2bc don't repeat function names in comments; NFC
llvm-svn: 237911
2015-05-21 16:42:22 +00:00
Pete Cooper
ad41216bfa Size enum so we can store it as 16-bits and avoid casts. NFC
llvm-svn: 237910
2015-05-21 16:40:18 +00:00
Rafael Espindola
8bef62eb9d Use existing helper for adding a section. NFC.
llvm-svn: 237909
2015-05-21 16:19:32 +00:00
Sanjay Patel
34a21b1664 use range-based for-loop; NFCI
llvm-svn: 237908
2015-05-21 16:00:50 +00:00
Manuel Klimek
9a44f069b2 std::sort must be called with a strict weak ordering.
Found by a debug enabled stl.

llvm-svn: 237906
2015-05-21 15:38:25 +00:00
Elena Demikhovsky
119b37ddd0 AVX-512: Enabled SSE intrinsics on AVX-512.
Predicate UseAVX depricates pattern selection on AVX-512.
This predicate is necessary for DAG selection to select EVEX form.
But mapping SSE intrinsics to AVX-512 instructions is not ready yet.
So I replaced UseAVX with HasAVX for intrinsics patterns.

llvm-svn: 237903
2015-05-21 14:01:32 +00:00
Renato Golin
f02533865a Make Triple::parseARMArch use ARMTargetParser
Simplifying Triple::parseARMArch, leaving all the parsing to ARMTargetParser.

This commit also adds AArch64 detection to ARMTargetParser canonicalization,
and a two RedHat arch names (v{6,7}hl, meaning hard-float / little-endian).

Adding enough unit tests to cover the basics. Clang checks fine.

llvm-svn: 237902
2015-05-21 13:52:20 +00:00
Igor Laevsky
8fc6a724b2 [RewriteStatepointsForGC] Fix debug assertion during derivable pointer rematerialization
Correct assertion would be that there is no other uses from chain we are currently cloning. It is ok to have other uses of values not from this chain.

Differential Revision: http://reviews.llvm.org/D9882

llvm-svn: 237899
2015-05-21 13:02:14 +00:00
Artur Pilipenko
36e22ed6bc Fix memory-dereferenceable.ll test
One of the testcases introduced by D9365 had incorrect !dereferenceable metadata on load. It must fail but it doesn't due to incorrect order of CHECK/CHECK-NOT commands in test. Fixed both.

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D9877

llvm-svn: 237897
2015-05-21 12:51:38 +00:00
Artur Pilipenko
5651dfccf4 Test commit. Fix typo in MemDerefPrinter.cpp comment.
llvm-svn: 237893
2015-05-21 11:57:38 +00:00
Renato Golin
569f0c5538 Remove unnecessary FIXME comment
It has been fixed by commit r237797.

llvm-svn: 237890
2015-05-21 10:47:56 +00:00
Simon Pilgrim
15521cea9f Fixed unused variable warning in non-assert builds from rL237885
llvm-svn: 237889
2015-05-21 10:22:10 +00:00
Simon Pilgrim
ab5200dfe9 [X86][SSE] Improve support for 128-bit vector sign extension
This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization).

It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner.

Differential Revision: http://reviews.llvm.org/D9848

llvm-svn: 237885
2015-05-21 10:05:03 +00:00
Toma Tabacu
cf3ff7e43c [mips] [IAS] Add 2 missing CHECK directives for fixups in mips-expansions.s.
llvm-svn: 237884
2015-05-21 10:04:39 +00:00
Hal Finkel
14d814ca9f [TableGen] Resolve complex def names inside multiclasses
We had not been trying hard enough to resolve def names inside multiclasses
that had complex concatenations, etc. Now we'll try harder.

Patch by Amaury Sechet!

llvm-svn: 237877
2015-05-21 04:32:56 +00:00
Duncan P. N. Exon Smith
8a5ef02df0 AsmPrinter: Compute absolute label difference directly
Create a low-overhead path for `EmitLabelDifference()` that emits a
emits an absolute number when (1) the output is an object stream and (2)
the two symbols are in the same data fragment.

This drops memory usage on Mach-O from 975 MB down to 919 MB (5.8%).
The only call is when `!doesDwarfUseRelocationsAcrossSections()` --
i.e., on Mach-O -- since otherwise an absolute offset from the start of
the section needs a relocation.  (`EmitLabelDifference()` is cheaper on
ELF anyway, since it creates 1 fewer temp symbol, and it gets called far
less often.  It's not clear to me if this is even a bottleneck there.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 237876
2015-05-21 02:41:23 +00:00