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Commit Graph

160373 Commits

Author SHA1 Message Date
Mark Searles
bf29d8d265 [AMDGPU] Increased vector length for global/constant loads.
Summary: GCN ISA supports instructions that can read 16 consecutive dwords from memory through the scalar data cache; loadstoreVectorizer should take advantage of the wider vector length and pack 16/8 elements of dwords/quadwords.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D43275

llvm-svn: 325518
2018-02-19 16:42:49 +00:00
David Green
9766fdd5cb [Dominators] Update DominatorTree compare in case roots are different
The compare function, unusually, returns false on same, true on
different. This fixes the conditions for different roots.

Reviewed as a part of D41298.

llvm-svn: 325517
2018-02-19 16:28:24 +00:00
Pavel Labath
627b30137f [CodeGen] Refactor AppleAccelTable
Summary:
This commit separates the abstract accelerator table data structure
from the code for writing out an on-disk representation of a specific
accelerator table format. The idea is that former (now called
AccelTable<T>) can be reused for the DWARF v5 accelerator tables
as-is, without any further customizations.

Some bits of the emission code (now living in the EmissionContext class)
can be reused for DWARF v5 as well, but the subtle differences in the
layout of various subtables mean the sharing is not always possible.
(Also, the individual emit*** functions are fairly simple so there's a
tradeoff between making a bigger general-purpose function, and two
smaller targeted functions.)

Another advantage of this setup is that more of the serialization logic
can be hidden in the .cpp file -- I have moved declarations of the
header and all the emission functions there.

Reviewers: JDevlieghere, aprantl, probinson, dblaikie

Subscribers: echristo, clayborg, vleschuk, llvm-commits

Differential Revision: https://reviews.llvm.org/D43285

llvm-svn: 325516
2018-02-19 16:12:20 +00:00
Sanjay Patel
6c99435a8b [TTI CostModel] change default cost of FP ops to 1 (PR36280)
This change was mentioned at least as far back as:
https://bugs.llvm.org/show_bug.cgi?id=26837#c26
...and I found a real program that is harmed by this: 
Himeno running on AMD Jaguar gets 6% slower with SLP vectorization:
https://bugs.llvm.org/show_bug.cgi?id=36280
...but the change here appears to solve that bug only accidentally.

The div/rem costs for x86 look very wrong in some cases, but that's already true, 
so we can fix those in follow-up patches. There's also evidence that more cost model
changes are needed to solve SLP problems as shown in D42981, but that's an independent 
problem (though the solution may be adjusted after this change is made).

Differential Revision: https://reviews.llvm.org/D43079

llvm-svn: 325515
2018-02-19 16:11:44 +00:00
Rafael Espindola
8e57037a71 Bring back r323297.
It was reverted because it broke the grub build. The reason the grub
build broke is because grub does its own relocation processing and was
not handing R_386_PLT32. Since grub has no dynamic linker, the fix is
trivial: handle R_386_PLT32 exactly like R_386_PC32.

On the report it was noted that they are using
-fno-integrated-assembler. The upstream GAS (starting with
451875b4f976a527395e9303224c7881b65e12ed) will already be producing a
R_386_PLT32 anyway, so they have to update their code one way or the
other

Original message:

Don't assume a null GV is local for ELF and MachO.

This is already a simplification, and should help with avoiding a plt
reference when calling an intrinsic with -fno-plt.

With this change we return false for null GVs, so the caller only
needs to check the new metadata to decide if it should use foo@plt or
*foo@got.

llvm-svn: 325514
2018-02-19 16:02:38 +00:00
Francis Visoiu Mistrih
e2a13616f8 [CodeGen] Fix tests breaking after r325505
llvm-svn: 325512
2018-02-19 15:51:17 +00:00
Charles Saternos
0c5dc7730f [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Third attempt - moved function from lambda to static function due to build failures.

llvm-svn: 325506
2018-02-19 15:14:50 +00:00
Francis Visoiu Mistrih
5d2e990b7d Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print"
This reverts commit r324681.

llvm-svn: 325505
2018-02-19 15:08:49 +00:00
Simon Pilgrim
c73a5be0c2 [X86][SSE] combineTruncateWithSat - use truncateVectorWithPACK down to 64-bit subvectors
Add support for chaining PACKSS/PACKUS down to 64-bit vectors by using only a single 128-bit input.

llvm-svn: 325494
2018-02-19 13:29:20 +00:00
Ivan A. Kosarev
c23c92625c [Transforms] Propagate new-format TBAA tags on simplification of memory-transfer intrinsics
With this patch in place, when a new-format TBAA tag is available
for a memory-transfer intrinsic call, we prefer propagating that
new-format tag. Otherwise, we fallback to the old approach where
we try to construct a proper TBAA access tag from 'tbaa.struct'
metadata.

Differential Revision: https://reviews.llvm.org/D41543

llvm-svn: 325488
2018-02-19 12:10:20 +00:00
Igor Laevsky
5480be3134 [llvm-opt-fuzzer] Add another pack of passes for continuous fuzzing
Differential Revision: https://reviews.llvm.org/D43384

llvm-svn: 325487
2018-02-19 11:57:07 +00:00
Dylan McKay
5690ef0222 [AVR] Set the program address space in the data layout
This adds the program memory address space setting to the AVR data
layout.

This setting was very recently added under r325479.

At the moment, there are no uses of this setting. In the future, things
such as switch lookup tables should reside there.

llvm-svn: 325481
2018-02-19 10:40:59 +00:00
Dylan McKay
ab1efa5f6d Add default address space for functions to the data layout (1/3)
Summary:
This adds initial support for letting targets specify which address
spaces their functions should reside in by default.

If a function is created by a frontend, it will get the default address space specified in the DataLayout, unless the frontend explicitly uses a more general `llvm::Function` constructor. Function address spaces will become a part of the bitcode and textual IR forms, as we do not have access to a data layout whilst parsing LL.

It will be possible to write IR that explicitly has `addrspace(n)` on a function. In this case, the function will reside in the specified space, ignoring the default in the DL.

This is the first step towards placing functions into the correct
address space for Harvard architectures.

Full patchset
* Add program address space to data layout D37052
* Require address space to be specified when creating functions D37054
* [clang] Require address space to be specified when creating functions D37057

Reviewers: pcc, arsenm, kparzysz, hfinkel, theraven

Reviewed By: theraven

Subscribers: arichardson, simoncook, rengolin, wdng, uabelho, bjope, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D37052

llvm-svn: 325479
2018-02-19 09:56:22 +00:00
Dylan McKay
a81cf82ee0 [AVR] Fix a lowering bug in AVRISelLowering.cpp
The parseFunctionArgs() method was directly reading the
arguments from a Function object, but is should have used the
arguments supplied by the SelectionDAGBuilder.

This was causing
the lowering code to only lower one argument, not two in some cases.

Thanks to @brainlag on GitHub for coming up with the working fix!

Patch-by: @brainlag on GitHub
llvm-svn: 325474
2018-02-19 08:28:38 +00:00
Eric Christopher
9287f3a5f6 Add LanaiMCTargetDesc.h to LanaiInstrInfo.h to make it self contained
with instruction enum definitions.

llvm-svn: 325473
2018-02-19 05:26:49 +00:00
Craig Topper
2d3b7e8d64 [X86] Correct a typo I made in combineToExtendCMOV recently.
We're accidentally checking that the same node is a constant twice instead of checking the other node.

This isn't a functional problem since we didn't do anything below that explicitly requires constants. It just means we may have introduced a sign_extend or zero_extend that won't fold out.

llvm-svn: 325469
2018-02-18 20:41:25 +00:00
Sanjay Patel
a75b2d22ae [PatternMatch, InstSimplify] enhance m_AllOnes() to ignore undef elements in vectors
Loosening the matcher definition reveals a subtle bug in InstSimplify (we should not
assume that because an operand constant matches that it's safe to return it as a result).

So I'm making that change here too (that diff could be independent, but I'm not sure how 
to reveal it before the matcher change).

This also seems like a good reason to *not* include matchers that capture the value.
We don't want to encourage the potential misstep of propagating undef values when it's
not allowed/intended.

I didn't include the capture variant option here or in the related rL325437 (m_One), 
but it already exists for other constant matchers.

llvm-svn: 325466
2018-02-18 18:05:08 +00:00
Sanjay Patel
1ba1b7ac34 [InstSimplify] add tests with vector undef elts; NFC
llvm-svn: 325465
2018-02-18 17:39:09 +00:00
Amara Emerson
e794d7bf90 Fix unused assertion variable warning.
llvm-svn: 325464
2018-02-18 17:28:34 +00:00
Amara Emerson
dc30913313 [AArch64][GlobalISel] Fix an assert fail/miscompile when fp16 types are copied
to gpr register banks.

PR36345.

rdar://36478867

Differential Revision: https://reviews.llvm.org/D43310

llvm-svn: 325463
2018-02-18 17:10:49 +00:00
Amara Emerson
ecf2cc8686 [AArch64][GlobalISel] Support G_INSERT/G_EXTRACT of types < s32 bits.
These are needed for operations on fp16 types in a later patch.

llvm-svn: 325462
2018-02-18 17:03:02 +00:00
Sanjay Patel
c987022ca6 [PatternMatch] reformatting and comment clean-ups; NFC
llvm-svn: 325461
2018-02-18 16:19:22 +00:00
Benjamin Kramer
97a9ef625d [Support] Replace hand-written scope_exit with make_scope_exit.
No functionality change intended.

llvm-svn: 325460
2018-02-18 16:05:40 +00:00
Haicheng Wu
7961b1b87b [AArch64] Coalesce Copy Zero during instruction selection
Add special case for copy of zero to avoid a double copy.

Differential Revision: https://reviews.llvm.org/D36104

llvm-svn: 325459
2018-02-18 13:51:33 +00:00
Jonas Paulsson
43ee82f217 [BPF] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Yonghong Song
llvm-svn: 325457
2018-02-18 10:09:54 +00:00
Craig Topper
3f02bf7302 [X86] Make masked pcmpeq commutable during isel so we can fold loads in other operand to the shorter encoding.
Previously we used the immediate encoding if the load was in operand 0 and the short encoding if the load was in operand 1.

This added an insane number of bytes to the size of the isel table. I'm wondering if we should always use the immediate form during isel and change to the short form during emission. This would remove the need to pattern match every combination for both the immediate form and the short form during isel. We could do the same with vpcmpgt

llvm-svn: 325456
2018-02-18 02:37:33 +00:00
Craig Topper
d1134f1e80 [X86] Add -show-mc-encoding to the avx512-vec-cmp.ll test and add test case to show that we're failing to use the shorter pcmpeq encoding when the memory arguemnt is the first argument.
This can't be spotted without showing the encodings since they have the same mnemonic.

llvm-svn: 325455
2018-02-18 02:37:32 +00:00
Simon Pilgrim
d1f44653e9 Revert: [llvm] r325448 - [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Second attempt, since last patch caused stage2 build to fail (now using function_ref rather than std::function).

Reverted due to buildbot failures

llvm-svn: 325454
2018-02-18 00:01:36 +00:00
Simon Pilgrim
a24fbea18b Fix Wparentheses warning. NFCI
llvm-svn: 325451
2018-02-17 22:45:56 +00:00
Simon Pilgrim
d688d9af5c [SelectionDAG] ComputeNumSignBits - add support for SMIN+SMAX clamp patterns
If we have a clamp pattern, SMIN(SMAX(X, LO),HI) or SMAX(SMIN(X, HI),LO) then we can deduce that the number of signbits will be at least the minimum of the LO and HI constants.

I haven't bothered with the UMIN/UMAX equivalent as (1) we don't have any current use cases and (2) I wonder if we'd be better off immediately falling back for ComputeKnownBits for UMIN/UMAX which already has optimization patterns useful for unsigned cases.

Differential Revision: https://reviews.llvm.org/D43338

llvm-svn: 325450
2018-02-17 22:19:50 +00:00
Simon Pilgrim
ff73e35019 [SelectionDAG] SimplifyDemandedVectorElts - add support for VECTOR_INSERT_ELT
Differential Revision: https://reviews.llvm.org/D43431

llvm-svn: 325449
2018-02-17 21:49:40 +00:00
Charles Saternos
4e91ba4e58 [ThinLTO] Add GraphTraits for FunctionSummaries
Add GraphTraits definitions to the FunctionSummary and ModuleSummaryIndex classes. These GraphTraits will be used to construct find SCC's in ThinLTO analysis passes.

Second attempt, since last patch caused stage2 build to fail (now using function_ref rather than std::function).

llvm-svn: 325448
2018-02-17 21:39:24 +00:00
Simon Pilgrim
97930fd5e7 [MIPS][MSA] Convert vector integer min/max opcodes to use generic implementation
Found while investigating D43338

Simon^3 - the LLVM project needs more Simons.

Differential Revision: https://reviews.llvm.org/D43433

llvm-svn: 325447
2018-02-17 21:29:45 +00:00
Sjoerd Meijer
fd02292235 [ARM] Add LLVM tests for the vcvtr builtins
Follow up of Clang commit r325351; this adds the LLVM tests, which
were also missing.

Differential Revision: https://reviews.llvm.org/D43395

llvm-svn: 325443
2018-02-17 19:59:29 +00:00
Alex Bradbury
0078e11757 [RISCV] Revert r324172 now r323991 was reverted
This fixes the build, now that r325421 was commited to revert r323991.

llvm-svn: 325441
2018-02-17 18:17:47 +00:00
Sander de Smalen
0eecf10ef6 Made test dbg_value_fastisel.ll specific to AArch64 fast-isel.
Some buildbots failed on this test (rL325438) because they don't
build all targets. I set the triple to aarch64 and moved the test
to test/CodeGen/AArch64/fast-isel-dbg-value.ll.

llvm-svn: 325440
2018-02-17 17:43:24 +00:00
Craig Topper
ce4d3101af [X86] Add 'sahf' to getHostCPUFeatures so -march=native will pick it up correctly.
Summary: We probably mostly get this right due to family/model/stepping mapping to CPU names. But we should detect it explicitly.

Reviewers: RKSimon, echristo, dim, spatel

Reviewed By: dim

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43418

llvm-svn: 325439
2018-02-17 16:52:49 +00:00
Sander de Smalen
5b1acefdcc [DebugInfo][FastISel] Fix dropping dbg.value()
Summary:
https://llvm.org/PR36263 shows that when compiling at -O0 a dbg.value()
instruction (that remains from an original dbg.declare()) is dropped
by FastISel. Since FastISel selects instructions by iterating a basic
block backwards, it drops the dbg.value if one of its operands is not
yet instantiated by a previously selected instruction.

Instead of calling 'lookUpRegForValue()' we can call 'getRegForValue()'
instead that will insert a placeholder for the operand to be filled in
when continuing the instruction selection.

Reviewers: aprantl, dblaikie, probinson

Reviewed By: aprantl

Subscribers: llvm-commits, dstenb, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43386

llvm-svn: 325438
2018-02-17 16:42:54 +00:00
Sanjay Patel
c62291f0e6 [PatternMatch] enhance m_One() to ignore undef elements in vectors
llvm-svn: 325437
2018-02-17 16:00:42 +00:00
Sanjay Patel
6c084ce8ca [InstSimplify, InstCombine] add tests with vector undef elts; NFC
These would fold if the m_One pattern matcher accounted for undef elts.

llvm-svn: 325436
2018-02-17 15:55:40 +00:00
Simon Pilgrim
0cbbacf150 [X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)
llvm-svn: 325435
2018-02-17 14:58:16 +00:00
Sanjay Patel
ba406ebff2 [InstSimplify] move select undef cond fold with other constant cond folds; NFCI
llvm-svn: 325434
2018-02-17 14:50:13 +00:00
Martin Storsjo
8a7d8433ff [AArch64] Implement dynamic stack probing for windows
This makes sure that alloca() function calls properly probe the
stack as needed.

Differential Revision: https://reviews.llvm.org/D42356

llvm-svn: 325433
2018-02-17 14:26:32 +00:00
Simon Pilgrim
a44eb0f9c9 Fix unused variable warning. NFCI.
We were casting to AArch64InstrInfo but only using it for static methods which some compilers complain about.

llvm-svn: 325432
2018-02-17 13:48:23 +00:00
Jonas Devlieghere
5708a3948c [dwarfdump] Fix spurious verification errors for DW_AT_location attributes
Verifying any DWARF file that is optimized and contains at least one tag
with a DW_AT_location with a location list offset as a
DW_AT_form_dataXXX results in dwarfdump spuriously claiming that the
location list is invalid.

Differential revision: https://reviews.llvm.org/D40199

llvm-svn: 325430
2018-02-17 13:06:37 +00:00
Simon Pilgrim
b30d82e0ef [DAGCombiner] Remove simplifyShuffleMask - now handled more generally by SimplifyDemandedVectorElts.
llvm-svn: 325429
2018-02-17 12:36:56 +00:00
Simon Pilgrim
baa85e1092 Fix signed/unsigned comparison warning in AsmGenMatcher generated code. NFCI.
llvm-svn: 325428
2018-02-17 12:29:47 +00:00
Sander de Smalen
e55b5fba48 [DebugInfo] Removed assert on missing CountVarDIE
Summary:
The assert for a DISubrange's CountVarDIE to be available fails
when the dbg.value() has been optimized away for any reason.
Having the assert for that is a little heavy, so instead removing
it now in favor of not generating the 'count' expression.

Addresses http://llvm.org/PR36263 .

Reviewers: aprantl, dblaikie, probinson

Reviewed By: aprantl

Subscribers: JDevlieghere, llvm-commits, dstenb

Differential Revision: https://reviews.llvm.org/D43387

llvm-svn: 325427
2018-02-17 11:06:53 +00:00
Serge Pavlov
d26e15c8ef Report fatal error in the case of out of memory
This is partial recommit of r325224, reverted in 325227. The relevant
part of original comment is below.

Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.

Usual programming practice does not require checking result of 'operator
new' because it throws 'std::bad_alloc' in the case of allocation error.
However, LLVM is usually built with exceptions turned off, so 'new' can
return null pointer. This change installs custom new handler, which causes
fatal error in the case of out of memory. The handler is installed
automatically prior to call to 'main' during construction of a static
object defined in 'lib/Support/ErrorHandling.cpp'. If the application does
not use this file, the handler may be installed manually by a call to
'llvm::install_out_of_memory_new_handler', declared in
'include/llvm/Support/ErrorHandling.h".

Differential Revision: https://reviews.llvm.org/D43010

llvm-svn: 325426
2018-02-17 10:21:33 +00:00
Jonas Paulsson
5ce8493e79 [AMDGPU] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.

Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.

Review: Stanislav Mekhanoshin, Tom Stellard.
llvm-svn: 325425
2018-02-17 10:00:28 +00:00