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Commit Graph

73122 Commits

Author SHA1 Message Date
Owen Anderson
f98c2ea49d Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
llvm-svn: 133106
2011-06-15 23:35:18 +00:00
Jakob Stoklund Olesen
d89900e14c Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

llvm-svn: 133105
2011-06-15 23:28:14 +00:00
John McCall
1324701c66 Update the Clang diagnostic emitter to emit IDs for diagnostic categories.
Patch by Argyrios Kyrtzidis.

llvm-svn: 133093
2011-06-15 21:43:52 +00:00
Rafael Espindola
8edd93b519 Testcase for previous commit.
llvm-svn: 133089
2011-06-15 21:18:51 +00:00
Eli Friedman
e6d7c767f9 Simplify; no significant functionality change.
llvm-svn: 133086
2011-06-15 21:08:25 +00:00
Rafael Espindola
7e3acf17a2 Fix cmake build.
llvm-svn: 133085
2011-06-15 21:03:04 +00:00
Rafael Espindola
1b76d1651c Handle jump tables. Test to follow soon.
llvm-svn: 133083
2011-06-15 21:00:28 +00:00
Argyrios Kyrtzidis
eeacf97cad Try fixing http://google1.osuosl.org:8011/builders/clang-i686-freebsd/builds/3548
llvm-svn: 133081
2011-06-15 20:39:05 +00:00
John McCall
e6835ee44e Add a new function attribute, nonlazybind, which inhibits lazy-loading
optimizations when emitting calls to the function;  instead those calls may
use faster relocations which require the function to be immediately resolved
upon loading the dynamic object featuring the call.  This is useful when it
is known that the function will be called frequently and pervasively and
therefore there is no merit in delaying binding of the function.

Currently only implemented for x86-64, where it turns into a call through
the global offset table.

Patch by Dan Gohman, who assures me that he's going to add LangRef documentation
for this once it's committed.

llvm-svn: 133080
2011-06-15 20:36:13 +00:00
Eli Friedman
33a3b6d488 Remove unused code.
llvm-svn: 133078
2011-06-15 19:58:09 +00:00
Argyrios Kyrtzidis
c9fe78d77e Document ADT/PackedVector.h in "Programmer's Manual" doc.
llvm-svn: 133077
2011-06-15 19:56:01 +00:00
Argyrios Kyrtzidis
67dd868df2 Add unit tests for ADT/PackedVector
llvm-svn: 133075
2011-06-15 19:19:09 +00:00
Argyrios Kyrtzidis
81d5aec961 Constify PackedVector::reference::operator T().
llvm-svn: 133074
2011-06-15 19:18:13 +00:00
Jim Grosbach
2ec534dffe Diagnostic for undefined assembler local symbols.
Re-apply 133010, with fixes for inline assembler.

Original commit message:
"When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect."

Added fix to only perform the check when finalizing, as otherwise we're not
done and undefined symbols may simply not have been encountered yet.

Passes "make check" and a self-host check on Darwin.

llvm-svn: 133071
2011-06-15 18:33:28 +00:00
Andrew Trick
6d96f3a7a2 Disabling this test until I can figure out the right lit flags.
llvm-svn: 133068
2011-06-15 18:25:38 +00:00
Jakob Stoklund Olesen
7b0de9a9e0 Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.

- R12Q is now allocatable. I think it was omitted from the allocation
  order by mistake since it isn't reserved. It as apparently used as a
  GOT pointer sometimes, and it should probably be reserved if that is
  the case.

- The GR64 registers are allocated in a different order now. The
  register allocator will automatically put the CSRs last. There were
  other changes to the order that may have been significant.

The test fix is because r0 and r1 swapped places in the allocation order.

llvm-svn: 133067
2011-06-15 18:02:56 +00:00
Evan Cheng
30f84a59ae Another revsh pattern. rdar://9609059
llvm-svn: 133064
2011-06-15 17:17:48 +00:00
Andrew Trick
ce93f28a36 Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.

llvm-svn: 133063
2011-06-15 17:16:12 +00:00
Chad Rosier
f6c1b3b81f TargetLoweringOpt is a struct used by DAGCombine, not a pass.
llvm-svn: 133062
2011-06-15 16:48:02 +00:00
Roman Divacky
8e45ba75fc Make PPC64CompilationCallback compilable no non-darwin platforms.
Patch by Nathan Whitehorn!

llvm-svn: 133059
2011-06-15 15:29:47 +00:00
Nadav Rotem
edfc2444ba getZeroExtendInReg needs to get a scalar type
llvm-svn: 133057
2011-06-15 14:37:18 +00:00
Nadav Rotem
72e51c94b1 This test was failing on X86 machines which do not have SSE4. Fixed the test by
specifying that the target CPU is corei7.

llvm-svn: 133053
2011-06-15 12:26:53 +00:00
Nadav Rotem
fbf446f6cd Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).

Fix the a usage of getZeroExtendInReg which must also be done on scalar types.

llvm-svn: 133052
2011-06-15 11:19:12 +00:00
Owen Anderson
e1cebd9e2e Replace the statically generated hashtables for checking register relationships with just scanning the (typically tiny) static lists.
At the time I wrote this code (circa 2007), TargetRegisterInfo was using a std::set to perform these queries.  Switching to the static hashtables was an obvious improvement, but in reality there's no reason to do anything other than scan.
With this change, total LLC time on a whole-program 403.gcc is reduced by approximately 1.5%, almost all of which comes from a 15% reduction in LiveVariables time.  It also reduces the binary size of LLC by 86KB, thanks to eliminating a bunch of very large static tables.

llvm-svn: 133051
2011-06-15 06:53:50 +00:00
Nick Lewycky
e88e163922 Teach the .ll parser to handle named metadata with non-simple names.
Unfortunately we can't follow what the rest of the language does (wrapping it
in double-quotes) because that would cause an ambiguity with metadata strings,
so instead we escape any unusual characters with \xx escaping.

llvm-svn: 133050
2011-06-15 06:37:58 +00:00
Bob Wilson
767e3a6971 A minor simplification: no functional change.
llvm-svn: 133047
2011-06-15 06:04:34 +00:00
Jakob Stoklund Olesen
da55d81c8f Use a SetTheory instance to expand register lists in register classes.
This prepares tablegen to compute register lists from set theoretic dag
expressions. This doesn't really make any difference as long as
Target.td still declares RegisterClass::MemberList as [Register].

llvm-svn: 133043
2011-06-15 05:09:20 +00:00
Bill Wendling
108a793705 Remove the LTO stuff from the profile_rt library's Makefile.
llvm-svn: 133042
2011-06-15 04:56:13 +00:00
Jakob Stoklund Olesen
4d17793443 Give CodeGenRegisterClass a real sorted member set.
Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.

Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.

llvm-svn: 133040
2011-06-15 04:50:36 +00:00
Bill Wendling
5ae6b0c972 Improve the heuristic to emit the alias if the number of hard-coded registers
are also greater than the alias.

llvm-svn: 133038
2011-06-15 04:31:19 +00:00
Eli Friedman
a45cbb1743 Stop using memdep for a check that didn't really make sense with memdep. In terms of specific issues, using memdep here checks irrelevant instructions and won't work properly once we start returning "unknown" more aggressively from memdep.
llvm-svn: 133035
2011-06-15 01:25:56 +00:00
Evan Cheng
7624839811 PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
the bits being cleared by the AND are not demanded by the BFI.

The previous BFI dag combine rule was actually incorrect (or used to be
correct until BFI representation changed).

rdar://9609030

llvm-svn: 133034
2011-06-15 01:12:31 +00:00
Ted Kremenek
947d9a7e53 add option for literal formatting to APInt::toString()
toString() now takes an optional bool argument that,
depending on the radix, adds the appropriate prefix
to the integer's string representation that makes it into a
meaningful C literal, e.g.:

hexademical: '-f' becomes '-0xf'
octal: '77' becomes '077'
binary: '110' becomes '0b110'

Patch by nobled@dreamwidth.org!

llvm-svn: 133032
2011-06-15 00:51:55 +00:00
Eli Friedman
47b3cd9fff Add "unknown" results for memdep, which mean "I don't know whether a dependence for the given instruction exists in the given block". This cleans up all the existing hacks in memdep which represent this concept by returning clobber with various unrelated instructions.
llvm-svn: 133031
2011-06-15 00:47:34 +00:00
Jakob Stoklund Olesen
5942b61865 Move the list of register classes into CodeGenRegBank as well.
No functional change intended.

llvm-svn: 133029
2011-06-15 00:20:40 +00:00
Tanya Lattner
5ee64fc868 Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
Includes a test case.

llvm-svn: 133027
2011-06-14 23:48:48 +00:00
Rafael Espindola
0811c47a3a Add triple.
llvm-svn: 133026
2011-06-14 23:47:36 +00:00
Anna Zaks
67eef46bc8 Anna's test commit (#2).
llvm-svn: 133023
2011-06-14 22:40:29 +00:00
Chad Rosier
30333c668f When pattern matching during instruction selection make sure shl x,1 is not
converted to add x,x if x is a undef.  add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/9453156> and <rdar://problem/9487392>.

llvm-svn: 133022
2011-06-14 22:29:10 +00:00
Rafael Espindola
d133b092e2 Check the llc output.
llvm-svn: 133021
2011-06-14 22:24:32 +00:00
Eli Friedman
3caa6e7fe5 PR10136: fix PPCTargetLowering::LowerCall_SVR4 so that a necessary CopyToReg doesn't appear to be dead.
Roman, since you're writing tests for other PPC-SVR4 vararg-related stuff, would you mind writing a test for this?

llvm-svn: 133018
2011-06-14 22:16:20 +00:00
Anna Zaks
fe991c37ab Anna's test commit.
llvm-svn: 133017
2011-06-14 22:10:12 +00:00
Stuart Hastings
63da197d28 Test case for x86 MMX inline asm. rdar://problem/8886707
llvm-svn: 133014
2011-06-14 21:51:38 +00:00
Jim Grosbach
e5f4cecf01 Revert 133010. Self-hosted buildbot unhappy.
Apparently llvm itself generates undefined assembler local labels, causing
self-hosting problems with this patch. Reverting until that's sorted out.

llvm-svn: 133013
2011-06-14 21:51:20 +00:00
Jim Grosbach
596a1b7d98 Diagnostic for undefined assembler local symbols.
When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect.

rdar://9559714

llvm-svn: 133010
2011-06-14 21:13:25 +00:00
Rafael Espindola
4e8b511063 Add a test for the recent regression.
llvm-svn: 133009
2011-06-14 20:38:50 +00:00
Eli Friedman
fadc05bee8 Revert r133004 ; it's breaking nightly tests.
llvm-svn: 133007
2011-06-14 19:30:33 +00:00
Rafael Espindola
53ce31b37e Partial revert of 132882.
Dan noted that this would work on the case shown on the commit message. I think
the case that was failing was a bb ending with a redundant conditional jump:

...
jne foo

foo:
...

I was unable to find any such case in the tests or in a debug build of clang,
so I will revert this part of the patch and watch the bots.

llvm-svn: 133004
2011-06-14 18:12:31 +00:00
Evan Cheng
47d69e08e3 Also recognize ARM v4t and v5e variants.
llvm-svn: 133002
2011-06-14 18:08:33 +00:00
Dan Gohman
2071b00bdf This test is still failing. Delete the rest of it.
llvm-svn: 133001
2011-06-14 18:07:36 +00:00