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Author SHA1 Message Date
Nick Lewycky
bf55e4b776 Emit trailing padding on constant vectors when TargetData says that the vector 
is larger than the sum of the elements (including per-element padding).

llvm-svn: 133631
 2011-06-22 18:55:03 +00:00
Justin Holewinski
da4d209996 PTX: Fix FrameIndex mapping bug 
llvm-svn: 133619
 2011-06-22 16:07:03 +00:00
Jay Foad
888cd746b8 Replace the existing forms of ConstantArray::get() with a single form 
that takes an ArrayRef.

llvm-svn: 133615
 2011-06-22 09:24:39 +00:00
Jay Foad
7ef9c9ad1e Make ConstantVector::get() always take an ArrayRef, never a std::vector. 
llvm-svn: 133614
 2011-06-22 09:10:19 +00:00
Dan Bailey
2d3b8e126a Test Commit. 
llvm-svn: 133613
 2011-06-22 09:04:30 +00:00
Jay Foad
f653a9e838 Eliminate a temporary std::vector in ConstantStruct::get(). 
llvm-svn: 133612
 2011-06-22 08:55:11 +00:00
Jay Foad
f921ffd79e Extend ConstantUniqueMap with a new template parameter ValRefType, 
representing a constant reference to ValType. Normally this is just
"const ValType &", but when ValType is a std::vector we want to use
ArrayRef as the reference type.

llvm-svn: 133611
 2011-06-22 08:50:06 +00:00
Andrew Trick
887ccaa3dc Only do config-time substitution of LLVM_BUILD_MODE in 
test/lit.site.cfg, not Unit/test/lit.site.cfg.

llvm-svn: 133608
 2011-06-22 05:43:36 +00:00
Rafael Espindola
9cc87c6608 Reenable the optimization added in 133415, but change the definition of a "simple" bb to 
be one with only one unconditional branch and no phis. Duplicating the phis in this case
is possible, but requeres liveness analysis or breaking edges.

llvm-svn: 133607
 2011-06-22 04:01:58 +00:00
Justin Holewinski
376f1d46d4 PTX: Add signed integer comparisons 
llvm-svn: 133599
 2011-06-22 02:09:50 +00:00
Justin Holewinski
0844ac41b6 PTX: Add .address_size directive if PTX version >= 2.3 
Patch by Wei-Ren Chen

llvm-svn: 133589
 2011-06-22 00:43:56 +00:00
Devang Patel
f610afdefb Test case for r133560. 
llvm-svn: 133585
 2011-06-22 00:03:42 +00:00
Francois Pichet
3a4cc9df06 Unbreak the CMake build 
llvm-svn: 133574
 2011-06-21 23:19:23 +00:00
Devang Patel
8b96f42a1e After register is spilled there should not be any DBG_VALUE referring the same register. 
llvm-svn: 133569
 2011-06-21 23:02:36 +00:00
Jim Grosbach
cfcba2d22b Consolidate some TableGen diagnostic helper functions. 
TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.

llvm-svn: 133568
 2011-06-21 22:55:50 +00:00
Owen Anderson
deeadc6b55 Fix some trailing issues from my introduction of MVT::untyped and its use for REGISTER_SEQUENCE. 
llvm-svn: 133567
 2011-06-21 22:54:23 +00:00
Nick Lewycky
8e5c09b7dc Add support for assembling "movq" when it's correct to do so, while continuing 
to emit "movd" across the board to continue supporting a Darwin assembler bug.
This is the reincarnation of r133452.

llvm-svn: 133565
 2011-06-21 22:45:41 +00:00
Bill Wendling
94ed847adb Add verbose EH table printing to SjLj exception tables. 
llvm-svn: 133561
 2011-06-21 22:40:24 +00:00
Devang Patel
42bd3da91f There could be more than one DBG_VALUE instructions for variables where all of them have offset based on one register. 
llvm-svn: 133560
 2011-06-21 22:36:03 +00:00
Bill Wendling
16b9bd4460 Improve the comment printing for the EH table. This gives a much more detailed 
explanation of what the EH table describes.

llvm-svn: 133559
 2011-06-21 22:30:20 +00:00
Eric Christopher
5939b74818 Handle the memory-ness of all U+ ARM constraints. 
Noticed on inspection.

llvm-svn: 133553
 2011-06-21 22:10:57 +00:00
Devang Patel
b1e608f669 Remove r130409, as requested by Chris. 
llvm-svn: 133536
 2011-06-21 19:46:09 +00:00
Evan Cheng
dc39e02b91 Reorg. No functionality change. 
llvm-svn: 133533
 2011-06-21 19:00:54 +00:00
Bob Wilson
5b04895bb8 Revert r133452: "Emit movq for 64-bit register to XMM register moves..." 
This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.

llvm-svn: 133524
 2011-06-21 17:35:13 +00:00
Anna Zaks
488fc45c84 Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module. 
llvm-svn: 133522
 2011-06-21 17:18:15 +00:00
Andrew Trick
04c3bb47ce IVUsers no longer needs to record the phis. 
llvm-svn: 133518
 2011-06-21 15:43:52 +00:00
Jay Foad
6015684974 Remove deprecated forms of StringMap::GetOrCreateValue(). 
llvm-svn: 133517
 2011-06-21 15:37:05 +00:00
Jay Foad
ea4f714a73 Remove some unnecessary uses of c_str(). 
llvm-svn: 133516
 2011-06-21 15:36:24 +00:00
Benjamin Kramer
02bc17d36d Remove unused variables. 
llvm-svn: 133514
 2011-06-21 14:58:30 +00:00
Jay Foad
2691fd9891 Reinstate r133435 and r133449 (reverted in r133499) now that the clang 
self-hosted build failure has been fixed (r133512).

llvm-svn: 133513
 2011-06-21 10:33:19 +00:00
Jay Foad
d7276856c6 Don't use PN->replaceUsesOfWith() to change a PHINode's incoming blocks, 
because it won't work after my phi operand changes, because the incoming
blocks will no longer be Uses.

llvm-svn: 133512
 2011-06-21 10:02:43 +00:00
Jay Foad
7bf84923b1 Add a reduced test case for the buildbot failure (clang self-hosted 
build) caused by r133435.

llvm-svn: 133509
 2011-06-21 08:33:49 +00:00
Chris Lattner
a9ee8489df use the MapEntryTy typedef instead of writing it out long form, 
add some fixme's about methods that should be removed.

Merged from type-system-rewrite.

llvm-svn: 133504
 2011-06-21 06:22:33 +00:00
Evan Cheng
40adfc21f6 Teach dag combine to match halfword byteswap patterns. 
1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8)
   => (bswap x) >> 16
2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8))
   => (rotl (bswap x) 16)

This allows us to eliminate most of the def : Pat patterns for ARM rev16
revsh instructions. It catches many more cases for ARM and x86.

rdar://9609108

llvm-svn: 133503
 2011-06-21 06:01:08 +00:00
Andrew Trick
0f76c6afe8 indvars -disable-iv-rewrite: Adds support for eliminating identity 
ops.

This is a rewrite of the IV simplification algorithm used by
-disable-iv-rewrite. To avoid perturbing the default mode, I
temporarily split the driver and created SimplifyIVUsersNoRewrite. The
idea is to avoid doing opcode/pattern matching inside
IndVarSimplify. SCEV already does it. We want to optimize with the
full generality of SCEV, but optimize def-use chains top down on-demand rather
than rewriting the entire expression bottom-up. This was easy to do
for operations that SCEV can prove are identity function. So we're now
eliminating bitmasks and zero extends this way.

A result of this rewrite is that indvars -disable-iv-rewrite no longer
requires IVUsers.

llvm-svn: 133502
 2011-06-21 03:22:38 +00:00
Chad Rosier
16a86e04cf Revert r133435 and r133449 to appease buildbots. 
llvm-svn: 133499
 2011-06-21 02:09:03 +00:00
Akira Hatanaka
288c049012 Add A0 and A1 to the list of registers used for returning a value in order to 
handle functions with return type Complex long long.

llvm-svn: 133497
 2011-06-21 01:28:11 +00:00
Akira Hatanaka
1197db1f9b Coding style fixes. 
llvm-svn: 133496
 2011-06-21 01:02:03 +00:00
Akira Hatanaka
1e08980a21 Re-apply 132758 and 132768 which were speculatively reverted in 132777. 
llvm-svn: 133494
 2011-06-21 00:40:49 +00:00
Bill Wendling
54d7d72c94 Don't mark the eh.dispatch.setup with a memory access marker. We want this to 
stick around even during fast isel.
<rdar://problem/9637156>

llvm-svn: 133493
 2011-06-21 00:35:15 +00:00
Dan Gohman
d8baa3f8ce Completely short-circuit out ARC optimization if the ARC runtime 
functions do not appear in the module.

llvm-svn: 133478
 2011-06-20 23:20:43 +00:00
Bill Wendling
c04086de5c Remove the subclassing. This will be moved to the ASM printer. 
llvm-svn: 133473
 2011-06-20 22:12:24 +00:00
Jakob Stoklund Olesen
22d12568aa Skip fields that don't exist in the Register class. 
llvm-svn: 133470
 2011-06-20 20:56:05 +00:00
Justin Holewinski
e62da847fa PTX: Fix conversion between predicates and value types 
llvm-svn: 133454
 2011-06-20 18:42:48 +00:00
Nick Lewycky
831fb8200d Emit movq for 64-bit register to XMM register moves, but continue to accept 
movd when assembling.

llvm-svn: 133452
 2011-06-20 18:33:26 +00:00
Jay Foad
e834069c4d Fix a check for PHINodes with two incoming values. 
llvm-svn: 133449
 2011-06-20 17:46:19 +00:00
Justin Holewinski
c4253975bd PTX: Fix if-then-else formatting and add missing asserts 
llvm-svn: 133447
 2011-06-20 17:08:56 +00:00
Rafael Espindola
1c53a39ff9 Disable again. 
llvm-svn: 133446
 2011-06-20 17:04:08 +00:00
Justin Holewinski
a5d3db3bd2 PTX: Add basic register spilling code 
The current implementation generates stack loads/stores, which are
really just mov instructions from/to "special" registers.  This may
not be the most efficient implementation, compared to an approach where
the stack registers are directly folded into instructions, but this is
easier to implement and I have yet to see a case where ptxas is unable
to see through this kind of register usage and know what is really
going on.

llvm-svn: 133443
 2011-06-20 15:56:20 +00:00
Roman Divacky
79578394f5 Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflow 
with 32bit values.

llvm-svn: 133439
 2011-06-20 15:28:39 +00:00