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Commit Graph

12 Commits

Author SHA1 Message Date
Sam Parker
2221e69a13 [ARM] Replace HasT2ExtractPack with HasDSP
Removed the HasT2ExtractPack feature and replaced its references
with HasDSP. This then allows the Thumb2 extend instructions to be
selected for ARMv8M +dsp. These instruction descriptions have also
been refactored and more target tests have been added for their isel.

Differential Revision: https://reviews.llvm.org/D29623

llvm-svn: 295452
2017-02-17 15:42:44 +00:00
Saleem Abdulrasool
e5bf2f858c ARM: yet another round of ARM test clean ups
llvm-svn: 205586
2014-04-03 23:47:24 +00:00
Jakob Stoklund Olesen
1a8c00078d Add GPRPair Register class to ARM.
Some instructions in ARM require 2 even-odd paired GPRs. This
patch adds support for such register class.

Patch by Weiming Zhao!

llvm-svn: 166816
2012-10-26 21:29:15 +00:00
Andrew Trick
916e01c917 Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.

Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129421
2011-04-13 00:38:32 +00:00
Jim Grosbach
28e5f92387 update tests for smarter BIC usage
llvm-svn: 108846
2010-07-20 16:16:48 +00:00
Evan Cheng
6349fa5ec4 PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.
llvm-svn: 107122
2010-06-29 05:38:36 +00:00
Bob Wilson
26297589b7 PR7458: Try commuting Thumb2 instruction operands to put them into 2-address
form so they can be narrowed to 16-bit instructions.

llvm-svn: 106762
2010-06-24 16:50:20 +00:00
Jim Grosbach
e04cc6cb43 Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack
instructions to subtarget features and update tests to reflect.
PR5717.

llvm-svn: 103136
2010-05-05 23:44:43 +00:00
Johnny Chen
b6d35fd803 Drop the ".w" qualifier for t2UXTB16* instructions as there is no 16-bit version
of either sxtb16 or uxtb16, and the unified syntax does not specify ".w".

llvm-svn: 97760
2010-03-04 22:24:41 +00:00
Jim Grosbach
b123a9cbc0 Convert to FileCheck
llvm-svn: 89007
2009-11-17 00:20:26 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Evan Cheng
f20e4fba49 Add thumb2 sign / zero extend with rotate instructions.
llvm-svn: 74755
2009-07-03 01:43:10 +00:00