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Commit Graph

124065 Commits

Author SHA1 Message Date
Davide Italiano
c54fa3bc34 [llvm-rtdyld] Refactor to reduce indentation.
Suggested by: David Blaikie.

llvm-svn: 253808
2015-11-22 01:58:33 +00:00
Xinliang David Li
dde2bc76c3 [PGO] InstrProf Template file documentation change
Add more complete description of the content and structure
of the template file. Made the comment in C style to be
shared by C runtime. Also enhance the file structure so
that it can included as standalone header for common 
definitions.

llvm-svn: 253807
2015-11-22 01:51:31 +00:00
Xinliang David Li
241cfd4800 [PGO] Move Value Profile Kind to InstrProfData.inc
ValueProfKind value affects runtime data structure and
definition is shared between compiler-rt and LLVM.

llvm-svn: 253806
2015-11-22 01:39:07 +00:00
Xinliang David Li
b823f0597b [PGO] Define value profiling updater API signature in InstrProfData.inc (NFC)
llvm-svn: 253805
2015-11-22 00:22:07 +00:00
Rafael Espindola
9cb8841b77 Have a single way for creating unique value names.
We had two code paths. One would create names like "foo.1" and the other
names like "foo1".

For globals it is important to use "foo.1" to help C++ name demangling.
For locals there is no strong reason to go one way or the other so I
kept the most common mangling (foo1).

llvm-svn: 253804
2015-11-22 00:16:24 +00:00
Xinliang David Li
64fc4b9d72 [PGO] Move Raw Header def into template file InstrProfData.inc
To enable code sharing with compiler-rt (NFC)

llvm-svn: 253803
2015-11-22 00:06:39 +00:00
Sanjay Patel
0b3c9472a6 fix formatting; NFC
llvm-svn: 253802
2015-11-22 00:03:16 +00:00
Sanjoy Das
11ab7be479 [SCEVExpander] Use C++isms; NFC
llvm-svn: 253801
2015-11-21 23:20:10 +00:00
Krzysztof Parzyszek
f1a4c62989 Now fix errors in NDEBUG build.
Hope this won't break any hardware next.

llvm-svn: 253799
2015-11-21 22:46:52 +00:00
Krzysztof Parzyszek
7310b18508 Fix warnings in NDEBUG build
llvm-svn: 253798
2015-11-21 22:19:50 +00:00
Teresa Johnson
2b4369dd03 [ThinLTO] Handle bitcode without function summary sections gracefully
Summary:
Several fixes to the handling of bitcode files without function summary
sections so that they are skipped during ThinLTO processing in llvm-lto
and the gold plugin when appropriate instead of aborting.

1 Don't assert when trying to add a FunctionInfo that doesn't have
  a summary attached.
2 Skip FunctionInfo structures that don't have attached function summary
  sections when trying to create the combined function summary.
3 In both llvm-lto and gold-plugin, check whether a bitcode file has
  a function summary section before trying to parse the index, and skip
  the bitcode file if it does not.
4 Fix hasFunctionSummaryInMemBuffer in BitcodeReader, which had a bug
  where we returned to early while looking for the summary section.

Also added llvm-lto and gold-plugin based tests for cases where we
don't have function summaries in the bitcode file. I verified that
either the first couple fixes described above are enough to avoid the
crashes, or fixes 1,3,4. But have combined them all here for added
robustness.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D14903

llvm-svn: 253796
2015-11-21 21:55:48 +00:00
Simon Pilgrim
37096d919a [MachineInstrBuilder] Support for adding a ConstantPoolIndex MO with an additional offset.
MachineInstrBuilder::addDisp can already add an immediate or global address MO with an adjusted offset, this patch adds support for constant pool indices as well.

All remaining MO types still assert - there are a number of other types that could support adjusted offsets but I have no test cases at this time.

Required to fix a regression in D13988 found by Mikael Holmén during stress testing (test case attached).

Differential Revision: http://reviews.llvm.org/D14867

llvm-svn: 253795
2015-11-21 21:42:26 +00:00
Krzysztof Parzyszek
3a2a5e0f60 Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
  - added "-debug-only dfa-emitter" support to llvm-tblgen

  - defined CVI_PIPE* resources for the V60 vector coprocessor

  - allow specification of multiple required resources
    - supports ANDs of ORs
    - e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
           (SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)

  - added support for combo resources
    - allows specifying ORs of ANDs
    - e.g. [CVI_XLSHF, CVI_MPY01] means:
           (CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)

  - increased DFA input size from 32-bit to 64-bit
    - allows for a maximum of 4 AND'ed terms of 16 resources

  - supported expressions now include:

    expression     => term [AND term] [AND term] [AND term]
    term           => resource [OR resource]*
    resource       => one_resource | combo_resource
    combo_resource => (one_resource [AND one_resource]*)

Author: Dan Palermo <dpalermo@codeaurora.org>

kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.

Reapply the previous patch, this time without circular dependencies.

llvm-svn: 253793
2015-11-21 20:00:45 +00:00
Craig Topper
3182781c9b Use modulo operator instead of multiplying result of a divide and subtracting from the original dividend. NFC.
llvm-svn: 253792
2015-11-21 17:44:42 +00:00
Krzysztof Parzyszek
daec852689 Revert r253790: it breaks all builds for some reason.
llvm-svn: 253791
2015-11-21 17:38:33 +00:00
Krzysztof Parzyszek
e1cf64ffc3 Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
  - added "-debug-only dfa-emitter" support to llvm-tblgen

  - defined CVI_PIPE* resources for the V60 vector coprocessor

  - allow specification of multiple required resources
    - supports ANDs of ORs
    - e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
           (SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)

  - added support for combo resources
    - allows specifying ORs of ANDs
    - e.g. [CVI_XLSHF, CVI_MPY01] means:
           (CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)

  - increased DFA input size from 32-bit to 64-bit
    - allows for a maximum of 4 AND'ed terms of 16 resources

  - supported expressions now include:

    expression     => term [AND term] [AND term] [AND term]
    term           => resource [OR resource]*
    resource       => one_resource | combo_resource
    combo_resource => (one_resource [AND one_resource]*)

Author: Dan Palermo <dpalermo@codeaurora.org>

kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.

llvm-svn: 253790
2015-11-21 17:23:52 +00:00
Sanjay Patel
bdc3aab1eb use ternary ops; NFC
llvm-svn: 253787
2015-11-21 16:51:19 +00:00
Sanjay Patel
04acedc718 remove unnecessary temp variables; NFC
llvm-svn: 253786
2015-11-21 16:37:09 +00:00
Sanjay Patel
85d5af7b49 fix typo; NFC
llvm-svn: 253785
2015-11-21 16:16:29 +00:00
Sanjay Patel
58d25e69b7 move a single test case to where most other instcombine shuffle bug test cases exist
llvm-svn: 253784
2015-11-21 16:12:58 +00:00
Simon Pilgrim
24d9446a79 [X86][SSE] Added SSE2 PSUBUS tests
llvm-svn: 253783
2015-11-21 13:57:22 +00:00
Simon Pilgrim
1732480b50 [X86][SSE] Regenerate TRUNC-SEXT tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

llvm-svn: 253782
2015-11-21 13:32:29 +00:00
Simon Pilgrim
163ad0f8b7 [X86][SSE] Regenerate MINMAX tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

llvm-svn: 253781
2015-11-21 13:29:42 +00:00
Simon Pilgrim
4533bbec83 [X86][SSE] Regenerate PSUBUS tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

llvm-svn: 253780
2015-11-21 13:25:50 +00:00
Jonas Paulsson
7f3f06c3b2 [DAGCombiner] Bugfix for lost chain depenedency.
When MergeConsecutiveStores() combines two loads and two stores into
wider loads and stores, the chain users of both of the original loads
must be transfered to the new load, because it may be that a chain
user only depends on one of the loads.

New test case: test/CodeGen/SystemZ/dag-combine-01.ll

Reviewed by James Y Knight.

Bugzilla: https://llvm.org/bugs/show_bug.cgi?id=25310#c6
llvm-svn: 253779
2015-11-21 13:25:07 +00:00
Simon Pilgrim
6bc8690714 [X86][AVX] Regenerate AVX splat tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

llvm-svn: 253778
2015-11-21 13:23:14 +00:00
Simon Pilgrim
bbc4bbde20 [X86][AVX512] Added AVX512 VMOVLHPS/VMOVHLPS shuffle decode comments.
llvm-svn: 253777
2015-11-21 13:04:42 +00:00
Simon Pilgrim
948540dab2 [X86][SSE] Legal XMM Register Class ordering for SSE1
It turns out we have a number of places that just grab the first type attached to a register class for various reasons. This is fine unless for some reason that type isn't legal on the current target, such as for SSE1 which doesn't support v16i8/v8i16/v4i32/v2i64 - all of which were included before 4f32 in the class.

Given that this is such a rare situation I've just re-ordered the types and placed the float types first.

Fix for PR16133

Differential Revision: http://reviews.llvm.org/D14787

llvm-svn: 253773
2015-11-21 12:38:34 +00:00
Sanjoy Das
39183a4764 [docs] Minor fixes to the operand bundle section
llvm-svn: 253771
2015-11-21 09:12:07 +00:00
Yaron Keren
762fa03531 Unbreak build on OpenBSD by not adding -Wl,-z,defs to linker flags.
This is similar to the fix for FreeBSD in r226862. Without this patch,
the build aborts when linkling libLTO.so, complaining about undefined
references to assert2, cxa_atexit, etc.

Patch by Stefan Kempf!

http://reviews.llvm.org/D14236

llvm-svn: 253769
2015-11-21 06:33:54 +00:00
Weiming Zhao
81cd3bf347 [SimplifyLibCalls] Removed some TODOs which are already implemented. NFC.
Summary:
D14302 implements tan(atan(x)) -> x
D14045 implements pow(exp(x), y) -> exp(x*y)

Patch by Mandeep Singh Grang <mgrang@codeaurora.org>

Reviewers: majnemer, davide

Differential Revision: http://reviews.llvm.org/D14882

llvm-svn: 253768
2015-11-21 06:10:20 +00:00
Davide Italiano
85b71754f5 [llvm-rtdyld] Fail early if we can't load dynamic libraries.
llvm-svn: 253767
2015-11-21 05:58:19 +00:00
Davide Italiano
5ad0793df9 [llvm-rtdyld] Turn assertion into errors, it seems more appropriate.
llvm-svn: 253766
2015-11-21 05:49:07 +00:00
Davide Italiano
1fff355fac [llvm-rtdyld] Improve error handling, use Error().
llvm-svn: 253765
2015-11-21 05:44:41 +00:00
Teresa Johnson
c20f9163cb Move new assert to correct location
This assert was meant to execute at the end of parseMetadata, but
we return early and never reach the end of the function. Caught
by a compile-time warning since the function doesn't return a value
from that location.

llvm-svn: 253762
2015-11-21 03:51:23 +00:00
Kostya Serebryany
41c09f4dbc [libFuzzer] don't crash when reporting a leak in test_single_input mode
llvm-svn: 253761
2015-11-21 03:46:43 +00:00
Davide Italiano
1fdfc74500 [llvm-rtdyld] Use report_fatal_error().
This is a first step towards saner/uniform error reporting in llvm-rtdyld.

llvm-svn: 253759
2015-11-21 02:15:51 +00:00
Matthias Braun
b2d3ee9999 ARMLoadStoreOptimizer: Cleanup isMemoryOp(); NFC
llvm-svn: 253757
2015-11-21 02:09:49 +00:00
Teresa Johnson
54750f488f llvm-link option and test for recent metadata mapping bug
Summary:
Add a -preserve-modules option to llvm-link that simulates LTO
clients that don't destroy modules as they are linked. This enables
reproduction of a recent bug introduced by a metadata linking change
that was only caught when the modules weren't destroyed before
writing bitcode (LTO on Windows).

See http://llvm.org/viewvc/llvm-project?view=revision&revision=253170
for more details on the original bug and the fix.

Confirmed the new test added here reproduces the failure using the new
option when I suppress the fix.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14818

llvm-svn: 253740
2015-11-21 00:35:38 +00:00
Vinicius Tinti
d56ac8edce Test commit
llvm-svn: 253737
2015-11-20 23:20:12 +00:00
Davide Italiano
7bcdf96df0 [llvm-rtdyld] Message() is used only once. Inline. NFC.
llvm-svn: 253736
2015-11-20 23:12:15 +00:00
Rong Xu
c3cbbad5f2 Add some constantness to GetSuccessorNumber().
llvm-svn: 253733
2015-11-20 23:02:06 +00:00
NAKAMURA Takumi
5946adf23c Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/
llvm-svn: 253730
2015-11-20 22:55:34 +00:00
Eric Christopher
0959edf8c1 Power8 and later support fusing addis/addi and addis/ld instruction
pairs that use the same register to execute as a single instruction.
No Functional Change

Patch by Kyle Butt!

llvm-svn: 253724
2015-11-20 22:38:20 +00:00
Owen Anderson
def6a5c0c6 Fix another infinite loop in Reassociate caused by Constant::isZero().
Not all zero vectors are ConstantDataVector's.

llvm-svn: 253723
2015-11-20 22:34:48 +00:00
Geoff Berry
893bbf2bf8 [CodeGenPrepare] Create more extloads and fewer ands
Summary:
Add and instructions immediately after loads that only have their low
bits used, assuming that the (and (load x) c) will be matched as a
extload and the ands/truncs fed by the extload will be removed by isel.

Reviewers: mcrosier, qcolombet, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14584

llvm-svn: 253722
2015-11-20 22:34:39 +00:00
Chris Bieneman
d9f3ae9820 [CMake] Fix handling of passing through semi-colon separated lists.
When passing around CMake arguments as lists of arguments any arguments containing lists need to have their semi-colons escaped otherwise CMake will split the arguments in the middle.

llvm-svn: 253719
2015-11-20 22:08:49 +00:00
Arnaud A. de Grandmaison
1e22479e47 [ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.
The included test only checks for a compiler crash for now. Several people are
facing this issue, so we first resolve the crash, and will increase shrinkwrap's
coverage later in a follow-up patch.

llvm-svn: 253718
2015-11-20 21:54:27 +00:00
Diego Novillo
8f65a2ac5e SamplePGO - Tweak RUN command for a test. NFC.
llvm-svn: 253717
2015-11-20 21:46:41 +00:00
Diego Novillo
372bf7dc64 SamplePGO - Do not count never-executed inlined functions when computing coverage.
If a function was originally inlined but not actually hot at runtime,
its samples will not be counted inside the parent function. This throws
off the coverage calculation because it expects to find more used
records than it should.

Fixed by ignoring functions that will not be inlined into the parent.
Currently, this is inlined functions with 0 samples.  In subsequent
patches, I'll change this to mean "cold" functions.

llvm-svn: 253716
2015-11-20 21:46:38 +00:00