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Commit Graph

197864 Commits

Author SHA1 Message Date
Denis Antrushin
c8d9beb0e3 [TargetLowering][NFC] More efficient emitPatchpoint().
Current implementation of emitPatchpoint() is very inefficient:
for every FrameIndex operand if creates new MachineInstr with
that operand expanded and all other copied as is.
Since PATCHPOINT/STATEPOINT instructions may have *a lot* of
FrameIndex operands, we end up creating and erasing many
machine instructions. But we can do it in single pass, with only
one new machine instruction generated.

Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D81181
2020-06-05 14:57:29 +03:00
Stefan Pintilie
dcc68e4eb3 [PowerPC] Remove extra nop after notoc call
Calls that are marked as @notoc do not require the extra nop after the call
for the TOC restore.

Differential Revision: https://reviews.llvm.org/D81081
2020-06-05 06:47:44 -05:00
Kerry McLaughlin
5e3af5dc50 [CodeGen][SVE] Legalisation of extends with scalable types
Summary:
This patch adds legalisation of extensions where the operand
of the extend is a legal scalable type but the result is not.

EXTRACT_SUBVECTOR is used to split the result, before
being replaced by target-specific [S|U]UNPK[HI|LO] operations.

For example:

```
zext <vscale x 16 x i8> %a to <vscale x 16 x i16>
```
should emit:

```
uunpklo z2.h, z0.b
uunpkhi z1.h, z0.b
```

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: efriedma

Subscribers: tschuett, hiraditya, rkruppe, psnobl, huihuiz, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79587
2020-06-05 12:08:42 +01:00
Kadir Cetinkaya
2a463f17d8 Revert "[InstCombine] Simplify compare of Phi with constant inputs against a constant"
This reverts commit 16b7eb6dd1247dbe322061d33636a054d6c954dc.

Breaks build bots, see
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/29888
for an example.
2020-06-05 13:02:35 +02:00
Stefan Pintilie
5d368057f1 [PowerPC][NFC] Add more PC Relative tests
Modify the pcrel.ll test file to add more testing for PC Relative.
2020-06-05 05:55:03 -05:00
Xing GUO
17462722bf [ObjectYAML][test] Reuse the chack tag "DWARF-HEADER". NFC. 2020-06-05 18:50:04 +08:00
Max Kazantsev
c9b0892c12 [InstCombine] Simplify compare of Phi with constant inputs against a constant
We can simplify
```
  icmp <pred> phi(C1, C2, ...), C
```
with
```
  phi(icmp(C1, C), icmp(C2, C), ...)
```
provided that all comparison of constants are constants themselves.

Differential Revision: https://reviews.llvm.org/D81151
Reviewed By: lebedev.ri
2020-06-05 17:02:47 +07:00
Kazushi (Jam) Marukawa
c27ba18708 [VE] Support fixed-point operation instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
fixed-point operation instructions.  In order to support them, we add
MImm parser to asmparser.  Also add a new MPD instruction which is one
of multiply instructions.

Differential Revision: https://reviews.llvm.org/D81207
2020-06-05 11:56:26 +02:00
Daniel Grumberg
269f60d02e NFC: Formatting fix in TableGEn/OptParserEmitter.cpp 2020-06-05 10:51:10 +01:00
Simon Pilgrim
9dd39e5eae MemorySSAUpdater.h - reduce unnecessary includes to forward declarations. NFC.
Remove unnecessary MemoryAccess forward declaration as its already included from MemorySSA.h

Move implicit include dependencies down to source files.
2020-06-05 10:45:59 +01:00
Roman Lebedev
9b320f8868 [NFC][SCEV] Add test with 'or' with no common bits set 2020-06-05 12:18:15 +03:00
Sam Parker
0362138d32 [CostModel] Unify getMemoryOpCost
Use getMemoryOpCost from the generic implementation of getUserCost
and have getInstructionThroughput return the result of that for loads
and stores.

This also means that the X86 implementation of getUserCost can be
removed with the functionality folded into its getMemoryOpCost.

Differential Revision: https://reviews.llvm.org/D80984
2020-06-05 10:13:38 +01:00
Roman Lebedev
12c3785b27 [NFC][SCEV] Some tests for shifts by bitwidth-2/bitwidth-1 w/ no-wrap flags 2020-06-05 11:45:09 +03:00
Kazushi (Jam) Marukawa
1e0eace6d4 [VE] Add AND/OR/XOR regression tests
Summary:
Add AND/OR/XOR regression tests and separate bit-op tests from exisiting
tests.

Differential Revision: https://reviews.llvm.org/D81206
2020-06-05 10:05:22 +02:00
Vitaly Buka
cc673ff1e5 [StackSafety,NFC] Switch tests to aarch64 2020-06-05 00:24:02 -07:00
Max Kazantsev
40bd27db04 Revert "[InstCombine][NFC] Factor out constant check"
This reverts commit 9bdb91889020b3e61cba26adb1b9c64a24c09f95.

This refactoring proved to not be useful.
2020-06-05 12:00:44 +07:00
Xing GUO
27bd788cf1 [DWARFYAML][debug_aranges] Replace InitialLength with Format and Length.
This patch addresses the comment in [D80972](https://reviews.llvm.org/D80972#inline-744217).

Before this patch, the initial length field of .debug_aranges section should be declared as:

```
## 32-bit DWARF
debug_aranges:
  - Length:
      TotalLength: 0x20
    Version: 2
    ...

## 64-bit DWARF
debug_aranges:
  - Length:
      TotalLength:   0xffffffff
      TotalLength64: 0x20
    Version: 2
    ...
```

After this patch:

```
## 32-bit DWARF
debug_aranges:
  - [[Format:  DWARF32]] ## Optional
    Length:  0x20
    Version: 2
    ...

## 64-bit DWARF
debug_aranges:
  - Format:  DWARF64
    Length:  0x20
    Version: 2
```

Current implementation of generating DWARF64 .debug_aranges section is buggy. A follow-up patch will improve it and add test cases for DWARF64.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D81063
2020-06-05 12:16:44 +08:00
Vitaly Buka
38b72582c9 [StackSafety,NFC] Ignore callee declarations
It's going to fail FunctionInfo lookup anyway.
2020-06-04 20:55:50 -07:00
Petr Hosek
b11ad7df93 [AddressSanitizer] Don't use weak linkage for __{start,stop}_asan_globals
It should not be necessary to use weak linkage for these. Doing so
implies interposablity and thus PIC generates indirections and
dynamic relocations, which are unnecessary and suboptimal. Aside
from this, ASan instrumentation never introduces GOT indirection
relocations where there were none before--only new absolute relocs
in RELRO sections for metadata, which are less problematic for
special linkage situations that take pains to avoid GOT generation.

Patch By: mcgrathr

Differential Revision: https://reviews.llvm.org/D80605
2020-06-04 20:18:35 -07:00
Philip Reames
d66e1d17e1 [Statepoint] Migrate a few tests to gc-live bundle format and fix assert
The assert was missed in 0e7c7705, migrating the test revealed the problem.
2020-06-04 18:15:58 -07:00
Vedant Kumar
5ea9617e1d [LiveDebugValues] Cache LexicalScopes::getMachineBasicBlocks, NFCI
Summary:
Cache the results from getMachineBasicBlocks in LexicalScopes to speed
up UserValueScopes::dominates queries.  This replaces the caching done
in UserValueScopes. Compared to the old caching method, this reduces
memory traffic when a VarLoc is copied (e.g. when a VarLocMap grows),
and enables caching across basic blocks.

When compiling sqlite 3.5.7 (CTMark version), this patch reduces the
number of calls to getMachineBasicBlocks from 10,207 to 1,093. I also
measured a small compile-time reduction (~ 0.1% of total wall time, on
average, on my machine).

As a drive-by, I made the DebugLoc in UserValueScopes a const reference
to cut down on MetadataTracking traffic.

Reviewers: jmorse, Orlando, aprantl, nikic

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80957
2020-06-04 16:58:45 -07:00
Mircea Trofin
3178ec302a [docs] Referenced llvm workflow in HowToAddABuilder
Reviewers: gkistanova, dblaikie

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81046
2020-06-04 16:39:11 -07:00
Philip Reames
ca4b985617 [Statepoint] Switch RS4GC to using gc-live bundle form
Now that we have an operand based form for the GC arguments to a statepoint intrinsic, update RS4GC to use it and update tests to reflect. This is pretty straight forward. I nearly landed without review, but figured a second set of eyes didn't hurt.

Differential Revision: https://reviews.llvm.org/D81121
2020-06-04 15:49:11 -07:00
Petr Hosek
b136b86f21 [Fuchsia] Rely on linker switch rather than dead code ref for profile runtime
Follow the model used on Linux, where the clang driver passes the
linker a -u switch to force the profile runtime to be linked in,
rather than having every TU emit a dead function with a reference.

Differential Revision: https://reviews.llvm.org/D79835
2020-06-04 15:47:05 -07:00
Petr Hosek
478975c378 Revert "[Fuchsia] Rely on linker switch rather than dead code ref for profile runtime"
This reverts commit d51054217403b47f452619e11318bd214749a845 since
it broke several bots.
2020-06-04 15:44:10 -07:00
Vedant Kumar
f26a9b1ca3 [docs] HowToUpdateDebugInfo: Minor cleanups
- Change the reference to salvageDebugInfoOrUndef to salvageDebugInfo
  (in accordance with https://reviews.llvm.org/D78369).

- Reorganize a few sections in preparation for an upcoming change that
  attempts to specify rules for updating debug locations.

- Fix some intra-document links.

- Some spelling / wording fixes.
2020-06-04 14:56:01 -07:00
Yuanfang Chen
7aa08f9138 [Docs] Add the entry for Advanced builds in UserGuide.rst
Also add a link to it from ThinLTO.rst.
2020-06-04 14:52:51 -07:00
Craig Topper
1b7f7179a4 [Reassociate] Teach ConvertShiftToMul to preserve nsw flag if the shift amount is not bitwidth - 1.
Multiply and shl have different signed overflow behavior in
some cases. But it looks like we should be ok as long as the
shift amount is less than bitwidth - 1.

Alive2: http://volta.cs.utah.edu:8080/z/MM4WZP

Differential Revision: https://reviews.llvm.org/D81189
2020-06-04 14:51:34 -07:00
Matt Arsenault
eccfe4cc93 AMDGPU: Fix overriding global FP atomic feature predicates
Global TableGen let override blocks are pretty dangerous and override
any local special cases. In this case, the broader HasFlatGlobalInsts
was overriding the more specific predicate for
FeatureAtomicFaddInsts. Make sure HasFlatGlobalInsts is implied by
FeatureAtomicFaddInsts, and make sure the right predicate is used.

One issue with independently setting the subtarget features on
incompatible targets is all of the encoding families do not define all
opcodes. This will hit an assert on gfx10 for example, since we set
the encoding independently based on the generation and not based on a
feature.
2020-06-04 17:50:38 -04:00
Matt Arsenault
c276ef678c AMDGPU: Select strict_fmul 2020-06-04 17:49:00 -04:00
Matt Arsenault
78fb43243c AMDGPU: Select strict_fma
Like with strict_fadd, the legalization is scalarizing the v4f16 when
it should split.
2020-06-04 17:49:00 -04:00
Matt Arsenault
13cd8aa259 AMDGPU: Select strict_fadd 2020-06-04 17:49:00 -04:00
Matt Arsenault
31842e5928 AMDGPU: Add test for fdiv nofpexcept preservation
This logically belongs with 89d48ccabe6a950369b2bd922b1d8e987b856ac7,
but this order was needed to avoid regressions before adding
mayRaiseFPExceptions to relevant instructions.
2020-06-04 17:35:27 -04:00
Matt Arsenault
b1742f2348 AMDGPU: Set mayRaiseFPException
This may be missing a few overrides to set it off still in some
special cases. Since the flags set during selection should now be
reliably preserved, this should not change codegen for non-strictfp
functions.
2020-06-04 17:35:27 -04:00
Sanjay Patel
f2ec65b41b [InstCombine] avoid crashing on select-shuffle detection
As mentioned in the post-commit comments of D81013 -
the mask check API has to assume the shuffle is
not length-changing, but we have not ruled that out
in this code. Use the ShuffleVectorInst call instead.
2020-06-04 17:27:14 -04:00
Petr Hosek
56f09c7996 [Fuchsia] Rely on linker switch rather than dead code ref for profile runtime
Follow the model used on Linux, where the clang driver passes the
linker a -u switch to force the profile runtime to be linked in,
rather than having every TU emit a dead function with a reference.

Patch By: mcgrathr

Differential Revision: https://reviews.llvm.org/D79835
2020-06-04 14:25:19 -07:00
Matt Arsenault
e8b8eaa4d0 AMDGPU: Fix using unencodable instructions in tests
There are a number of MIR tests using instructions on subtargets where
they don't really exist. These are some of the easy cases that don't
require splitting up test functions.
2020-06-04 16:50:19 -04:00
Matt Arsenault
e122816cc4 AMDGPU/GlobalISel: Fix making LDS FP atomics legal on SI/CI 2020-06-04 16:50:19 -04:00
Matt Arsenault
a8964aef7e AMDGPU/GlobalISel: Fix trying to use wave32 for gfx9 test 2020-06-04 16:50:19 -04:00
Thomas Lively
cce58dcf18 [WebAssembly] Lower llvm.debugtrap properly
Summary:
Unlike normal traps, debug traps are allowed to return and can have
additional instructions in the same basic block. Without explicit
backend support for debug traps, they are lowered in ISel as normal
traps. Since normal traps are lowered in the WebAssembly backend to
the UNREACHABLE instruction, which is a terminator, using debug traps
could lead to invalid MBBs when there are additional instructions
after the trap. This patch fixes the issue by lowering debug traps to
a new version of the UNREACHABLE instruction, DEBUG_UNREACHABLE, that
is not a terminator.

An alternative approach would have been to make UNREACHABLE not a
terminator, but that breaks a large number of tests. In particular, it
would require removing the traps inserted after noreturn calls to
@llvm.wasm.throw because otherwise the terminator throw would be
followed by a non-terminator UNREACHABLE and we would be back to
having invalid MBBs. Overall the approach in this patch seems simpler.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81055
2020-06-04 13:25:10 -07:00
Huihui Zhang
9377291bfa [NFC] Move test vscale-factor-out-constant.ll to AArch64 sub-directory.
Vscale scalable vector is specific to AArch64 target.

Bring back 'uglygep' check.
2020-06-04 12:55:28 -07:00
Hiroshi Yamauchi
7e568e1e72 [PGO] Enable the working set size scaling under the partial sample PGO.
Summary: Following up D79831.

Reviewers: davidxl

Subscribers: eraman, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80939
2020-06-04 11:30:54 -07:00
Sanjay Patel
a39aa71722 [InstCombine] move vector select ahead of select-shuffle
select Cond, (shuf_sel X, Y), X --> shuf_sel X, (select Cond, Y, X)

A select of a select-shuffle ("blend" in x86 lingo) can be reversed
so that the select is done first.
This is a more limited version of what I was trying in D80658,
but it enables existing demanded bits transforms to catch some of the
motivating cases. The tricky bit in that seems to be that by moving
the shuffle later, we can always guarantee that poison is correctly
inhibited by the shuffle mask in the final value.

Alive2 checks for the basic tests:
http://volta.cs.utah.edu:8080/z/Qqd3RK
http://volta.cs.utah.edu:8080/z/S4wchM
http://volta.cs.utah.edu:8080/z/wf9zPL
http://volta.cs.utah.edu:8080/z/wJeEGk

Differential Revision: https://reviews.llvm.org/D81013
2020-06-04 14:29:13 -04:00
Jan Korous
668c3c2fae [docs] Fix self-contradictory description of llvm_unreachable
Just two paragraphs above it says:
"If the compiler does not support this [skipping code generation for a particular branch], it will fall back
to the "abort" implementation."

And that actually correctly describes llvm_unreachable implementation.

Differential Revision: https://reviews.llvm.org/D81130
2020-06-04 11:15:20 -07:00
LLVM GN Syncbot
76c6e46a0d [gn build] Port e53f5580578 2020-06-04 17:56:21 +00:00
LLVM GN Syncbot
548f790d0e [gn build] Port c973ad1878f 2020-06-04 17:56:21 +00:00
LLVM GN Syncbot
403aff8065 [gn build] Port ba2a01645b5 2020-06-04 17:56:20 +00:00
LLVM GN Syncbot
4ca0e4c2fe [gn build] Port 69fa84a6e95 2020-06-04 17:56:20 +00:00
LLVM GN Syncbot
79249979c7 [gn build] Port 6756a2c9533 2020-06-04 17:56:19 +00:00
LLVM GN Syncbot
8107fad723 [gn build] Port 49a4f3f7d88 2020-06-04 17:56:19 +00:00