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Author SHA1 Message Date
Kostya Serebryany
caa1c534df [asan] add experimental -asan-realign-stack option (true by default, which does not change the current behavior) 
llvm-svn: 169216
 2012-12-04 06:14:01 +00:00
Bill Wendling
71a12c0ef7 Add a 'getCount' method to get the number of elements in the subrange. 
llvm-svn: 169215
 2012-12-04 06:12:44 +00:00
Matt Beaumont-Gay
3e68d7d342 Add 'using' declarations to suppress -Woverloaded-virtual warnings. 
llvm-svn: 169214
 2012-12-04 05:41:27 +00:00
Jyotsna Verma
2878599f9d Move all operand definitions into HexagonOperands.td 
llvm-svn: 169213
 2012-12-04 05:00:31 +00:00
Jyotsna Verma
5743b854a0 Move generic Hexagon subtarget information into Hexagon.td 
llvm-svn: 169212
 2012-12-04 04:29:16 +00:00
Sean Silva
324ad000f4 docs: Fix broken link. 
llvm-svn: 169211
 2012-12-04 03:45:27 +00:00
Sean Silva
f90055f9cd docs: Fix dead link. 
Apparently Dinkumware are no longer hosting their nice reference
manuals. Thankfully, `cppreference.com` can fill that role well.

llvm-svn: 169210
 2012-12-04 03:30:36 +00:00
Shuxin Yang
ac685f44b0 rdar://12329730 (2nd part, revised) 
The type of shirt-right (logical or arithemetic) should remain unchanged 
when transforming  "X << C1 >> C2" into "X << (C1-C2)"

llvm-svn: 169209
 2012-12-04 03:28:32 +00:00
Sean Silva
684c7e3c6b docs: Convert ProgrammersManual to reST. 
Patch by Alexander Zinenko!

llvm-svn: 169208
 2012-12-04 03:20:08 +00:00
Alexey Samsonov
84fd1cd1a4 ASan: add initial support for handling llvm.lifetime intrinsics in ASan - emit calls into runtime library that poison memory for local variables when their lifetime is over and unpoison memory when their lifetime begins. 
llvm-svn: 169200
 2012-12-04 01:34:23 +00:00
Jakub Staszak
cd1920fdd8 Simplify code. No functionality change. 
llvm-svn: 169198
 2012-12-04 01:00:52 +00:00
Manman Ren
40ba054405 Stack Alignment: when creating stack objects in MachineFrameInfo, make sure 
the alignment is clamped to TargetFrameLowering.getStackAlignment if the target
does not support stack realignment or the option "realign-stack" is off.

This will cause miscompile if the address is treated as aligned and add is
replaced with or in DAGCombine.

Added a bool StackRealignable to TargetFrameLowering to check whether stack
realignment is implemented for the target. Also added a bool RealignOption
to MachineFrameInfo to check whether the option "realign-stack" is on.

rdar://12713765

llvm-svn: 169197
 2012-12-04 00:52:33 +00:00
Jakub Staszak
ad1ddb8aa6 Use dyn_cast instead of isa and cast. No functionality change. 
llvm-svn: 169196
 2012-12-04 00:50:06 +00:00
NAKAMURA Takumi
3ba9b62972 LoopVectorize.cpp: Suppress a warning. [-Wunused-variable] 
llvm-svn: 169195
 2012-12-04 00:49:34 +00:00
NAKAMURA Takumi
350924d8cc Fix whitespace. 
llvm-svn: 169194
 2012-12-04 00:49:28 +00:00
Jakob Stoklund Olesen
9cd01b82ea Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks. 
These functions have been replaced by TRI::getRegAllocationHints() which
provides the same capabilities.

llvm-svn: 169192
 2012-12-04 00:46:13 +00:00
Jakob Stoklund Olesen
305fb6fe6c Remove VirtRegMap::getRegAllocPref(). 
Now that there can be multiple hint registers from targets, it doesn't
make sense to have a function that returns 'the' preferred register.

llvm-svn: 169190
 2012-12-04 00:35:59 +00:00
Jakob Stoklund Olesen
d099763751 Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases. 
Targets can provide multiple hints now, so getRegAllocPref() doesn't
make sense any longer because it only returns one preferred register.
Replace it with getSimpleHint() in the remaining heuristics. This
function only

llvm-svn: 169188
 2012-12-04 00:30:22 +00:00
Manman Ren
4c21a13abd Stack Alignment: move functions from header file MachineFrameInfo.h. 
No functional change for this commit. The follow-up patch will add more stuff to
these functions.

rdar://12713765

llvm-svn: 169186
 2012-12-04 00:26:44 +00:00
NAKAMURA Takumi
5d8058a563 RuntimeDyld: Fix up r169178. MSVC doesn't like "or". 
llvm-svn: 169183
 2012-12-04 00:08:14 +00:00
Shuxin Yang
f6948fd368 rdar://12329730 (2nd part) 
This change tries to simmplify E1 = " X >> C1 << C2" into :
  - E2 = "X << (C2 - C1)" if C2 > C1, or
  - E2 = "X >> (C1 - C2)" if C1 > C2, or
  - E2 = X if C1 == C2.

 Reviewed by Nadav. Thanks!

llvm-svn: 169182
 2012-12-04 00:04:54 +00:00
Jakob Stoklund Olesen
753c5da13c Add VirtRegMap::hasKnownPreference(). 
Virtual registers with a known preferred register are prioritized by
RAGreedy. This function makes the condition explicit without depending
on getRegAllocPref().

llvm-svn: 169179
 2012-12-03 23:23:50 +00:00
Akira Hatanaka
893e507de7 Runtime dynamic linker for MCJIT should support MIPS BigEndian architecture. 
This small change adds support for that. It will make all MCJIT tests pass
in make-check on BigEndian platforms.

Patch by Petar Jovanovic.

llvm-svn: 169178
 2012-12-03 23:12:19 +00:00
Akira Hatanaka
fc23893bc5 Classic JIT is still being supported by MIPS, along with MCJIT. 
This change adds endian-awareness to MipsJITInfo and emitWordLE in
MipsCodeEmitter has become emitWord now to support both endianness.

Patch by Petar Jovanovic.

llvm-svn: 169177
 2012-12-03 23:11:12 +00:00
Michael Ilseman
6ff2a88905 Minor tweaking to SmallVector static size. 
llvm-svn: 169176
 2012-12-03 22:57:47 +00:00
Nadav Rotem
7a8cea8699 minor renaming, documentation and cleanups. 
llvm-svn: 169175
 2012-12-03 22:57:09 +00:00
Akira Hatanaka
dfdb5c7406 Functions in MipsCodeEmitter.cpp that expand unaligned loads/stores are dead 
code. Removing it.

Patch by Petar Jovanovic.

llvm-svn: 169174
 2012-12-03 22:51:22 +00:00
Jakob Stoklund Olesen
cfbf55a3fb Use the new getRegAllocationHints() hook from AllocationOrder. 
This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.

llvm-svn: 169173
 2012-12-03 22:51:04 +00:00
Nadav Rotem
bf466188c6 constify the cost API 
llvm-svn: 169172
 2012-12-03 22:47:12 +00:00
Nadav Rotem
6da9592bb1 IF-conversion: teach the cost-model how to grade if-converted loops. 
llvm-svn: 169171
 2012-12-03 22:46:31 +00:00
Jakob Stoklund Olesen
86b7be3eac Implement ARMBaseRegisterInfo::getRegAllocationHints(). 
This provides the same functionality as getRawAllocationOrder() for the
even/odd hints, but without the many constant register arrays.

llvm-svn: 169169
 2012-12-03 22:35:35 +00:00
Jyotsna Verma
e17db34a1c Define store instructions with base+immediate offset addressing mode 
using multiclass.

llvm-svn: 169168
 2012-12-03 22:26:28 +00:00
Michael J. Spencer
8d8b62ec5d [Support] Make FileOutputBuffer work on Windows. 
llvm-svn: 169167
 2012-12-03 22:09:52 +00:00
Michael J. Spencer
925e2a7203 [Support][FileSystem] Fix open mode in resize_file on Windows. 
llvm-svn: 169166
 2012-12-03 22:09:31 +00:00
Michael J. Spencer
34411981cd Revert the header sort on this file. 
"Windows.h" includes <Windows.h> which defines a bunch of stuff it shouldn't
(even with all the restriction macros). We have no control over this file, so
make it's scope as small as possible.

llvm-svn: 169165
 2012-12-03 22:07:00 +00:00
Pedro Artigas
80c84a9de4 moves doInitialization and doFinalization to the Pass class and removes some unreachable code in MachineModuleInfo 
reviewed by Evan Cheng <evan.cheng@apple.com>

llvm-svn: 169164
 2012-12-03 21:56:57 +00:00
Argyrios Kyrtzidis
1d0503b1ef Add a getMemorySize() function for DenseSet. 
llvm-svn: 169163
 2012-12-03 21:46:21 +00:00
Nadav Rotem
aaef945ad0 Now that we have a basic if-conversion infrastructure we can rename the 
"single basic block loop vectorizer" to "innermost loop vectorizer".

llvm-svn: 169158
 2012-12-03 21:33:08 +00:00
Michael Ilseman
56c1a0f058 Since this SmallVector immediately grows on the next line, don't waste stack space. SmallVector is still needed due to existing APIs growing their arguments 
llvm-svn: 169157
 2012-12-03 21:29:36 +00:00
Jakob Stoklund Olesen
13e2db2da7 Add a new hook for providing register allocator hints more flexibly. 
The TargetRegisterInfo::getRegAllocationHints() function is going to
replace the existing mechanisms for providing target-dependent hints to
the register allocator: ResolveRegAllocHint() and
getRawAllocationOrder().

The new hook is more flexible because it allows the target to provide
multiple preferred candidate registers for each virtual register, and it
is easier to use because targets are not required to return a reference
to a constant array like getRawAllocationOrder().

An optional VirtRegMap argument can be used to provide target-dependent
hints that depend on the provisional assignments of other virtual
registers.

llvm-svn: 169154
 2012-12-03 21:17:00 +00:00
Jyotsna Verma
3bea2435da Define load instructions with base+immediate offset addressing mode 
using multiclass.

llvm-svn: 169153
 2012-12-03 21:13:13 +00:00
Nadav Rotem
ee9155231b Add initial support for IF-conversion. This patch implements the first 1/3, 
which is the legality of the if-conversion transformation. The next step is to
implement the cost-model for the if-converted code as well as the
vectorization itself.

llvm-svn: 169152
 2012-12-03 21:06:35 +00:00
Jyotsna Verma
a762d2c7c0 Define unsigned const-ext predicates. 
llvm-svn: 169149
 2012-12-03 20:39:45 +00:00
Jyotsna Verma
c9aa3a1e1b Removing unnecessary 'else' statement from the predicates defined in HexagonOperards.td. 
llvm-svn: 169148
 2012-12-03 20:14:38 +00:00
Argyrios Kyrtzidis
ef5e4688df Eliminate redundant bitwise operations when using a llvm/ADT/PointerUnion. 
For comparison, with this code sample:

PointerUnion<int *, char *> Data;
PointerUnion<int *, char *> foo1() {
	Data = new int;
	return new int;
}
PointerUnion<int *, char *> foo2() {
	Data = new char;
	return new char;
}

Before this patch we would get:

define i64 @_Z4foo1v() uwtable ssp {
  %1 = tail call noalias i8* @_Znwm(i64 4)
  %2 = ptrtoint i8* %1 to i64
  %3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %4 = and i64 %3, 1
  %.masked.i = and i64 %2, -3
  %5 = or i64 %4, %.masked.i
  store i64 %5, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %6 = tail call noalias i8* @_Znwm(i64 4)
  %7 = ptrtoint i8* %6 to i64
  %8 = and i64 %7, -3
  ret i64 %8
}

define i64 @_Z4foo2v() uwtable ssp {
  %1 = tail call noalias i8* @_Znwm(i64 1)
  %2 = ptrtoint i8* %1 to i64
  %3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %4 = and i64 %3, 1
  %5 = or i64 %2, %4
  %6 = or i64 %5, 2
  store i64 %6, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %7 = tail call noalias i8* @_Znwm(i64 1)
  %8 = ptrtoint i8* %7 to i64
  %9 = or i64 %8, 2
  ret i64 %9
}

After the patch:

define i64 @_Z4foo1v() uwtable ssp {
  %1 = tail call noalias i8* @_Znwm(i64 4)
  %2 = ptrtoint i8* %1 to i64
  store i64 %2, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %3 = tail call noalias i8* @_Znwm(i64 4)
  %4 = ptrtoint i8* %3 to i64
  ret i64 %4
}

declare noalias i8* @_Znwm(i64)

define i64 @_Z4foo2v() uwtable ssp {
  %1 = tail call noalias i8* @_Znwm(i64 1)
  %2 = ptrtoint i8* %1 to i64
  %3 = or i64 %2, 2
  store i64 %3, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
  %4 = tail call noalias i8* @_Znwm(i64 1)
  %5 = ptrtoint i8* %4 to i64
  %6 = or i64 %5, 2
  ret i64 %6
}

llvm-svn: 169147
 2012-12-03 19:59:23 +00:00
Eli Bendersky
8655d79bf4 Simplify this test a bit because DWARF emission/dumping on some platforms 
is not yet good enough for more sophistication. The important goal of this
test is to make sure llc doesn't crash on this IR like it used to.

llvm-svn: 169146
 2012-12-03 19:58:12 +00:00
Bill Wendling
4924d6bcd4 Add 'getInt64Field()' method to get the signed integer instead of unsigned. 
llvm-svn: 169145
 2012-12-03 19:44:25 +00:00
Alexey Samsonov
5084c52b4e ASan: add blacklist file to ASan pass options. Clang patch for this will follow. 
llvm-svn: 169143
 2012-12-03 19:09:26 +00:00
Eli Bendersky
4b06c42c76 Fix PR12942: Allow two CUs to be generated from the same source file. 
Thanks Eric for the review.

llvm-svn: 169142
 2012-12-03 18:45:45 +00:00
Nadav Rotem
489fb9a4c3 Teach the jump threading optimization to stop scanning the basic block when calculating the cost after passing the threshold. 
llvm-svn: 169135
 2012-12-03 17:34:44 +00:00