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Commit Graph

123529 Commits

Author SHA1 Message Date
Colin LeMahieu
caeaa3d918 [Hexagon] Fixing load instruction parsing and reenabling tests.
llvm-svn: 252555
2015-11-10 00:02:27 +00:00
Matthias Braun
4741d0521e MachineVerifier: Streamline live interval related error reporting
Simply perform additional report_context() calls after a report()
instead of adding more and more overloaded variations of report().  Also
improve several instances where information was output in an ad-hoc way
probably because no matching report() overload was available.

llvm-svn: 252552
2015-11-09 23:59:33 +00:00
Matthias Braun
12671c208c MachineVerifier: Add missing linebreak
MachineInstr::print() with SkipOppers==true does not produce a
linebreak, so we have to do that in MachineVerifier::report().

llvm-svn: 252551
2015-11-09 23:59:29 +00:00
Matthias Braun
a06515f6f6 MachineVerifier: MI::print has no TargetMachine overload
The code was passing a target machine pointer which degraded to a true
operand to SkipOppers.

llvm-svn: 252550
2015-11-09 23:59:25 +00:00
Matthias Braun
8a14eebeb0 MachineVerifier: print list of live intervals if available
llvm-svn: 252549
2015-11-09 23:59:23 +00:00
David Blaikie
045f21cb70 Simplify some APIs I was cleaning up while fixing -Wpessimizing-move warning
(Reid fixed the original error, but this seems nice to do in any case)

llvm-svn: 252548
2015-11-09 23:51:45 +00:00
Reid Kleckner
e82c9383a4 Fix -Wpessimizing-move warning in llvm-config.cpp
llvm-svn: 252542
2015-11-09 23:37:26 +00:00
Reid Kleckner
da90738ed9 [WinEH] Remove isBarrier from instructions that do not return
Fixes machine verification failures with David's latest EH change.

llvm-svn: 252541
2015-11-09 23:34:42 +00:00
Sanjay Patel
a712e76470 add a SelectionDAG method to check if no common bits are set in two nodes; NFCI
This was suggested in:
http://reviews.llvm.org/D13956

and is a follow-on to:
http://reviews.llvm.org/rL252515
http://reviews.llvm.org/rL252519

This lets us remove logically equivalent/duplicated code from DAGCombiner and X86ISelDAGToDAG.

A corresponding function for IR instructions already exists in ValueTracking.

llvm-svn: 252539
2015-11-09 23:31:38 +00:00
Duncan P. N. Exon Smith
41883f05fc CodeGen: Be clear about semantics in SlotIndex::getNextSlot(), NFC
Be honest about using iterator semantics in `SlotIndex::getNextSlot()`
and `SlotIndex::getPrevSlot()`.  Instead of calling `getNextNode()` --
which is documented (but fails) to check for the sentinel -- call
`&*++getIterator()`.

This is (surprisingly!) a NFC commit.  `ilist_traits<IndexListEntry>`
has an `ilist_half_node<IndexListEntry>` as a sentinel (and no other
fields), and so the layout of `ilist<IndexListEntry>` is:
--
struct ilist<IndexListEntry> {
  ilist_half_node<IndexListEntry> Sentinel;
  IndexListEntry *Head;

  IndexListEntry *getHead() { return Head; }
  IndexListEntry *getSentinel() { return cast<...>(&Sentinel); }
};
--
In memory, this happens to look just like:
--
struct ilist<IndexListEntry> {
  ilist_node<IndexListEntry> Sentinel;

  IndexListEntry *getHead() { return Sentinel.getNext(); }
  IndexListEntry *getSentinel() { return cast<...>(&Sentinel); }
};
--
As a result, `ilist_node<IndexListEntry>::getNextNode()` that checks
`getNext()` of the possible sentinel will get a pointer to the head of
the list; it will never detect the sentinel, and will return the
sentinel itself instead of `nullptr` in the special cases.

Since `getNextNode()` and `getPrevNode()` don't work, just be honest
that we're not checking for the end/beginning of the list here.  Since
this code works, I guess we must never go past the sentinel.

(It's possible we're just getting lucky, and the new code will get
"lucky" in the same situations.  To properly fix that hypothetical bug,
we would need to check the iterator against `end()`/`begin()`.)

llvm-svn: 252538
2015-11-09 23:31:01 +00:00
David Blaikie
a11fb06e10 Fix -Wdeprecated warnings due to the use of copy ops on SCEVPredicate derived class objects
SCEVUnionPredicate is copied constructed here: lib/Transforms/Scalar/LoopDistribute.cpp:793
and move assigned (which can use the base class's copy ctor just
fine/without extra cost (I'd add it if it weren't for MSVC's issues
meaning = default is insufficient)) here: lib/Transforms/Utils/LoopVersioning.cpp:46

llvm-svn: 252537
2015-11-09 23:30:15 +00:00
Davide Italiano
24ffd22ca8 [TargetLibraryInfo] Add support for fls, flsl, flsll.
This is a prerequisite for further optimisations of these functions,
which will be commited as a separate patch.

Differential Revision:	http://reviews.llvm.org/D14219

llvm-svn: 252535
2015-11-09 23:23:20 +00:00
Kostya Serebryany
548bb85f31 [libFuzzer] make libFuzzer link if there is no sanitizer coverage instrumentation (it will fail at start-up time)
llvm-svn: 252533
2015-11-09 23:17:45 +00:00
Richard Diamond
de0a495c44 Fix llvm-config to adapt to the install environment.
Summary:
This patch does a couple of things:

  - Adds a new argument `--shared-mode` which accepts a list of components and prints whether or not the provided components need to be linked statically or shared.
  - Fixes `--libnames` when CMake BUILD_SHARED_LIBS is used.
  - Fixes `--libnames`, `--libs`, and `--libfiles` for dylib when static components aren't installed.
  - Fixes `--libnames`, `--libs`, `--libfiles`, and `--components` to use LLVM_DYLIB_COMPONENTS as the component manifest for dylib linking.
  - Uses the host platform's usual convention for filename extensions and such, instead of always defaulting to Unix-izms.

Because I don't own a Mac, I am not able to test the Mac platform dependent stuff locally. If someone would be willing to run a build for me on their machine (unless there's a better option), I'd appreciate it.

Reviewers: jfb, brad.king, whitequark, beanz

Subscribers: beanz, jauhien, llvm-commits

Differential Revision: http://reviews.llvm.org/D13198

llvm-svn: 252532
2015-11-09 23:15:38 +00:00
Reid Kleckner
c537c2f0b8 Combine ifdefs around dl_iterate_phdr in Unix/Signals.inc
This avoids the need to have two dummy implementations of
findModulesAndOffsets.

llvm-svn: 252531
2015-11-09 23:10:29 +00:00
David Majnemer
624c46d055 [WinEH] Don't emit CATCHRET from visitCatchPad
Instead, emit a CATCHPAD node which will get selected to a target
specific sequence.

llvm-svn: 252528
2015-11-09 23:07:48 +00:00
Chris Bieneman
b5ab75c303 Deprecate Autoconf
As per the very positive feedback from llvm-dev (http://lists.llvm.org/pipermail/llvm-dev/2015-November/092150.html), this commit officially deprecates the LLVM autoconf-based build system.

Anyone still using it should switch to CMake.

llvm-svn: 252520
2015-11-09 21:54:55 +00:00
Sanjay Patel
a1a53c13c8 specify triple so Windows bots won't be sad
llvm-svn: 252519
2015-11-09 21:53:58 +00:00
Rafael Espindola
dd2f566f81 Add templated read/write to support::endian.
Expose read and write functions that take endianess as a template
parameter.

llvm-svn: 252517
2015-11-09 21:34:45 +00:00
Sanjay Patel
4f4bd24ec4 [x86] try harder to match bitwise 'or' into an LEA
The motivation for this patch starts with the epic fail example in PR18007:
https://llvm.org/bugs/show_bug.cgi?id=18007

...unfortunately, this patch makes no difference for that case, but it solves some
simpler cases. We'll get there some day. :)

The current 'or' matching code was using computeKnownBits() via 
isBaseWithConstantOffset() -> MaskedValueIsZero(), but that's an unnecessarily limited use. 
We can do more by copying the logic in ValueTracking's haveNoCommonBitsSet(), so we can 
treat the 'or' as if it was an 'add'.

There's a TODO comment here because we should lift the bit-checking logic into a helper
function, so it's not duplicated in DAGCombiner.

An example of the better LEA matching:

leal (%rdi,%rdi), %eax
andl $1, %esi
orl %esi, %eax

Becomes:

andl $1, %esi
leal (%rsi,%rdi,2), %eax

Differential Revision: http://reviews.llvm.org/D13956

llvm-svn: 252515
2015-11-09 21:16:49 +00:00
Colin LeMahieu
ff6307914f [Hexagon] Separating statement to match what clang-format would do.
llvm-svn: 252513
2015-11-09 21:06:28 +00:00
Reid Kleckner
f7f2cdef8b [WinEH] Tweak funclet prologue/epilogue insertion to pass verifier
For some reason we'd never run MachineVerifier on WinEH code, and you
explicitly have to ask for it with llc. I added it to a few test cases
to get some coverage.

Fixes PR25461.

llvm-svn: 252512
2015-11-09 21:04:00 +00:00
Andrew Kaylor
766dfcbfcc [WinEH] Re-committing r252249 (Clone funclets with multiple parents) with additional fixes for determinism problems
Differential Revision: http://reviews.llvm.org/D14454

llvm-svn: 252508
2015-11-09 19:59:02 +00:00
Reid Kleckner
fb328c983a [Hexagon] Fix -Wmicrosoft-enum-value warning with explicit enum type
llvm-svn: 252505
2015-11-09 19:44:38 +00:00
Mike Aizatsky
733b1a089d Windows-specific test for sys::path::remove_dots.
Differential Revision: http://reviews.llvm.org/D14503

llvm-svn: 252504
2015-11-09 19:36:53 +00:00
Sanjay Patel
db0dd82683 don't repeat function names in comments; NFC
llvm-svn: 252502
2015-11-09 19:18:26 +00:00
Sanjay Patel
529bd0465e fix formatting; NFC
llvm-svn: 252500
2015-11-09 18:59:30 +00:00
Mike Aizatsky
e7f6232199 Moving FileManager::removeDotPaths to llvm::sys::path::remove_dots
Differential Revision: http://reviews.llvm.org/D14393

llvm-svn: 252499
2015-11-09 18:56:31 +00:00
Adhemerval Zanella
0d3a676058 [sanitizer] Use same shadow offset for ASAN on aarch64
This patch makes ASAN for aarch64 use the same shadow offset for all
currently supported VMAs (39 and 42 bits).  The shadow offset is the
same for 39-bit (36).  Similar to ppc64 port, aarch64 transformation
also requires to use an add instead of 'or' for 42-bit VMA.

llvm-svn: 252495
2015-11-09 18:03:48 +00:00
Dehao Chen
d1d1c30073 Add discriminators for call instructions that are from the same line and same basic block.
Summary: Call instructions that are from the same line and same basic block needs to have separate discriminators to distinguish between different callsites.

Reviewers: davidxl, dnovillo, dblaikie

Subscribers: dblaikie, probinson, llvm-commits

Differential Revision: http://reviews.llvm.org/D14464

llvm-svn: 252492
2015-11-09 17:30:38 +00:00
Chad Rosier
c47bdf955f Simplify. NFC.
llvm-svn: 252491
2015-11-09 16:56:06 +00:00
Oliver Stannard
989496fc9c GlobalOpt should maintain externally_initialized when splitting aggregates
When GlobalOpt splits an internal, global variable with an aggregate type, it
should propagate the externally_initialized flag to the newly created globals.

This makes the pass safe for our downstream use of this flag, while still
allowing some useful optimisations (such as removing dead parts of the split
aggregate) to be performed.

Differential Revision: http://reviews.llvm.org/D13382

llvm-svn: 252490
2015-11-09 16:47:16 +00:00
Jonathan Roelofs
fa6901b5fb Create Makefile variables for 'share' and 'libexec'
in preparation for a Clang commit.

http://reviews.llvm.org/D14405

llvm-svn: 252473
2015-11-09 16:10:00 +00:00
James Molloy
697ec724f3 [LoopVectorize] Address post-commit feedback on r250032
Implemented as many of Michael's suggestions as were possible:
  * clang-format the added code while it is still fresh.
  * tried to change Value* to Instruction* in many places in computeMinimumValueSizes - unfortunately there are several places where Constants need to be handled so this wasn't possible.
  * Reduce the pass list on loop-vectorization-factors.ll.
  * Fix a bug where we were querying MinBWs for I->getOperand(0) but using MinBWs[I].

llvm-svn: 252469
2015-11-09 14:32:05 +00:00
Silviu Baranga
7e3cf64ceb Allow LLE/LD and the loop versioning infrastructure to use SCEV predicates
Summary:
LAA currently generates a set of SCEV predicates that must be checked by users.
In the case of Loop Distribute/Loop Load Elimination, no such predicates could have
been emitted, since we don't allow stride versioning. However, in the future there
could be SCEV predicates that will need to be checked.

This change adds support for SCEV predicate versioning in the Loop Distribute, Loop
Load Eliminate and the loop versioning infrastructure.

Reviewers: anemet

Subscribers: mssimpso, sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D14240

llvm-svn: 252467
2015-11-09 13:26:09 +00:00
Charlie Turner
4ca51cd513 [AArch64] Add UABDL patterns for log2 shuffle.
Summary:
This matches the sum-of-absdiff patterns emitted by the vectoriser using log2 shuffles.

Relies on D14207 to be able to match the `extract_subvector(..., 0)`

Reviewers: t.p.northover, jmolloy

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14208

llvm-svn: 252465
2015-11-09 13:10:52 +00:00
Charlie Turner
fc688fc567 [AArch64] Handle extract_subvector(..., 0) in ISel.
Summary:
Lowering this pattern early to an `EXTRACT_SUBREG` was making it impossible to match larger patterns in tblgen that use `extract_subvector(..., 0)` as part of the their input pattern.

It seems like there will exist somewhere a better way of specifying this pattern over all relevant register value types, but I didn't manage to find it.

Reviewers: t.p.northover, jmolloy

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14207

llvm-svn: 252464
2015-11-09 12:45:11 +00:00
Renato Golin
75f12574da [EABI] Add LLVM support for -meabi flag
"GCC requires the freestanding environment provide memcpy, memmove, memset
and memcmp": https://gcc.gnu.org/onlinedocs/gcc-5.2.0/gcc/Standards.html

Hence in GNUEABI targets LLVM should not convert 'memops' to their equivalent
'__aeabi_memops'. This convertion violates GCC contract.

The -meabi flag controls whether or not LLVM will modify 'memops' in GNUEABI
targets.

Without -meabi: use the triple default EABI.
With -meabi=default: use the triple default EABI.
With -meabi=gnu: use 'memops'.
With -meabi=4 or -meabi=5: use '__aeabi_memops'.
With -meabi set to an unknown value: same as -meabi=default.

Patch by Vinicius Tinti.

llvm-svn: 252462
2015-11-09 12:40:30 +00:00
Renato Golin
ecabe1e17c Revert "[ARM] Combine CMOV into BFI where possible"
This reverts commit r252057, as it broke ARM self-hosting buildbots, probably
due to a code-gen fault.

llvm-svn: 252460
2015-11-09 12:19:10 +00:00
Oliver Stannard
62d3e33afa [CodeGen] Always promote f16 if not legal
We don't currently have any runtime library functions for operations on
f16 values (other than conversions to and from f32 and f64), so we
should always promote it to f32, even if that is not a legal type. In
that case, the f32 values would be softened to f32 library calls.

SoftenFloatRes_FP_EXTEND now needs to check the promoted operand's type,
as it may ne a no-op or require a different library call.

getCopyFromParts and getCopyToParts now need to cope with a
floating-point value stored in a larger integer part, as is the case for
any target that needs to store an f16 value in a 32-bit integer
register.

Differential Revision: http://reviews.llvm.org/D12856

llvm-svn: 252459
2015-11-09 11:03:18 +00:00
Colin LeMahieu
432c5802d8 [Hexagon] Adding override to methods.
llvm-svn: 252453
2015-11-09 07:10:24 +00:00
Colin LeMahieu
a2e274a6cd [Hexagon] Removing XFAIL on Hexagon target.
llvm-svn: 252450
2015-11-09 06:15:55 +00:00
Colin LeMahieu
9c4783c8cd [Hexagon] Fixing warnings.
llvm-svn: 252448
2015-11-09 05:47:56 +00:00
Colin LeMahieu
d80e0ce601 [Hexagon] Removing extra gen line.
llvm-svn: 252447
2015-11-09 05:31:39 +00:00
Colin LeMahieu
386150c550 [Hexagon] Maybe the makefile?
llvm-svn: 252446
2015-11-09 05:16:08 +00:00
Colin LeMahieu
733ea75725 [Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser.
llvm-svn: 252444
2015-11-09 04:31:02 +00:00
Colin LeMahieu
350f96d137 [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission.
llvm-svn: 252443
2015-11-09 04:07:48 +00:00
Mehdi Amini
f559a9a15a Add a method to the BitcodeReader to parse only the identification block
Summary: Mimic parseTriple(); and exposes it to LTOModule.cpp

Reviewers: dexonsmith, rafael

Subscribers: llvm-commits

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 252442
2015-11-09 02:46:41 +00:00
Colin LeMahieu
6d56088f23 [AsmParser] Generalize matching for grammars without mnemonic-lead statements
Differential Revision: http://reviews.llvm.org/D14257

llvm-svn: 252440
2015-11-09 00:46:46 +00:00
Colin LeMahieu
51dd820505 [AsmParser] Backends can parameterize ASM tokenization.
llvm-svn: 252439
2015-11-09 00:31:07 +00:00