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182893 Commits

Author SHA1 Message Date
Fangrui Song
ce5e3b1fce [UpdateTestChecks] Fix an incorrect %s added in r368006
llvm-svn: 368007
2019-08-06 09:44:18 +00:00
Fangrui Song
bcd97adc6f [UpdateTestChecks] Apply some string concatenation cleanup
Some were what I suggested in D65610.

llvm-svn: 368006
2019-08-06 09:42:00 +00:00
Hans Wennborg
61e38e5fe9 test-release.sh: Reorder sed commands for the binary comparison
llvm-svn: 368004
2019-08-06 09:30:10 +00:00
Tim Northover
ee608c40a5 AArch64: use xzr/wzr for constant 0 in GlobalISel.
COPYs from xzr and wzr can often be folded away entirely during register
allocation, unlike a movz.

llvm-svn: 368003
2019-08-06 09:18:41 +00:00
Guillaume Chatelet
8ded184cba [LLVM][Alignment] Introduce Alignment In Attributes
Summary:
This is patch is part of a serie to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: jfb

Subscribers: hiraditya, dexonsmith, llvm-commits, courbet

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65742

llvm-svn: 368002
2019-08-06 09:16:33 +00:00
Guillaume Chatelet
17e23310d6 [LLVM][Alignment] Introduce Alignment In GlobalObject
Summary:
This is patch is part of a serie to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: jfb

Subscribers: hiraditya, dexonsmith, llvm-commits, courbet

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65748

Address comments

llvm-svn: 368000
2019-08-06 09:03:21 +00:00
Hans Wennborg
e9787cf7d5 Revert r367941 "Add a note to the release not about a potentially breaking optimization"
The note was moved to the release_90 branch in r367997.

llvm-svn: 367998
2019-08-06 08:32:33 +00:00
George Rimar
38ab2e9c2f [llvm/test/Object] - Cleanup and move out the yaml2obj tests.
There are multiple yaml2obj-* tests in llvm/test/Object
folder. This is not correct place to have them and my intention
was to move them out to test\tools\yaml2obj folder. I reviewed
them, made some changes, and my comments are below.

For all tests I:

Added comments when needed.
Moved them from llvm/test/Object to yaml2obj tests.
Another changes performed:

1) yaml2obj-invalid.yaml. It was a test for an invalid YAML input.
I just moved it.

2) yaml2obj-coff-multi-doc.test/yaml2obj-elf-multi-doc.test:
these were a tests for testing --docnum=x functionality,
one was for COFF and one for ELF. I merged them into one.

3) yaml2obj-elf-bits-endian.test:
I removed its 4 YAML inputs (merged into the main test).

4) yaml2obj-readobj.test:
This file has a long history. It was added to check the
"parsing of header charactestics" initially. Then was used to test
how yaml2obj writes the relocations. Then was upgraded to check how
yaml2obj handle "-o" option. I think it should be heavily splitted
and refactored in a separate patch. For now I leaved it as is, but restyled
to reduce the changes in a follow-ups.

5) yaml2obj-elf-alignment.yaml: its intention was to check we
can set sh-addralign field. I moved, renamed (to elf-sh-addralign.yaml)
and updated this test.

6) yaml2obj-elf-file-headers.yaml: I removed it.
It's intention was to check that
yaml2obj handles OS/ABI and ELF type (e.g Relocatable).
We are testing this already, for example in D64800. We might want
to add a better (more complete) test, but keeping the existent test
does not have much sense I think.

7) yaml2obj-elf-file-headers-with-e_flags.yaml: I would describe its intention
as "testing MIPS e_flags". It is far from being complete and tests only
a few flags. I leaved it alone for now.

8) yaml2obj-elf-rel.yaml: its intention is to check the MIPS32 relocations.
We have a version for MIPS64 here: test\Object\Mips\elf-mips64-rel.yaml
Seems them both are incomplete. I leaved them alone for now.

9) yaml2obj-elf-rel-noref.yaml: was introduced to check the support of arm32
R_ARM_V4BX relocatiion. I leaved it alone for now.

10) yaml2obj-elf-section-basic.yaml: it just checked that we are able to recognise
trivial fields like section 'Name', 'Type', 'Flags' and others. All of our yaml2obj
tests are heavily using it. I just removed this test.

11) yaml2obj-elf-section-invalid-size.yaml: its intention was to check the
"Section size must be greater than or equal to the content size" error.
I moved this test to `tools\yaml2obj\section-size-content.yaml'

12) yaml2obj-elf-symbol-basic.yaml: its intention seems was to support declarations
of the symbols in yaml2obj. I removed it. We use this in almost each test we already have.

13) yaml2obj-elf-symbol-LocalGlobalWeak.yaml: its intention was to check that we can
declare different symbol bindings. I moved it to tools\yaml2obj\elf-symbol-binding.yaml.

14) yaml2obj-coff-invalid-alignment.test: check that error is reported for a too large coff
section alignment. Moved it to tools\yaml2obj\coff-invalid-alignment.test

15) yaml2obj-elf-symbol-visibility.yaml: tests ELF symbols visibility. I improved it and
moved to tools\yaml2obj\elf-symbol-visibility.yaml and tools\obj2yaml\elf-symbol-visibility.yaml

Differential revision: https://reviews.llvm.org/D65652

llvm-svn: 367988
2019-08-06 08:02:25 +00:00
Bill Wendling
8b99a6d0c3 Use "isa" since the variable isn't used.
llvm-svn: 367985
2019-08-06 07:27:26 +00:00
Hideki Saito
d420e88ebd [LV][NFC] Share the LV illegality reporting with LoopVectorize.
Reviewers: hsaito, fhahn, rengolin
 
Reviewed By: rengolin
 
Patch by psamolysov, thanks!
 
Differential Revision: https://reviews.llvm.org/D62997

llvm-svn: 367980
2019-08-06 06:08:48 +00:00
Matt Arsenault
4b0bf1cd34 CodeGen: Migration to using Register
llvm-svn: 367974
2019-08-06 03:59:31 +00:00
Nico Weber
901421f1f7 gn build: Add AMDGPU target
Differential Revision: https://reviews.llvm.org/D65767

llvm-svn: 367972
2019-08-06 02:25:49 +00:00
Nico Weber
384d4e4a01 gn build: Leave a comment why "-gen-searchable-table" tablegen()s are not called FooGenSearchableTable
llvm-svn: 367971
2019-08-06 02:21:50 +00:00
Nico Weber
c42f95186d gn build: Merge r367917
llvm-svn: 367970
2019-08-06 02:17:05 +00:00
Austin Kerbow
98f47b7ad5 Re-commit: [AMDGPU] Use S_DENORM_MODE for gfx10
Summary: During fdiv32 lowering use S_DENORM_MODE to select denorm mode in gfx10.

Reviewers: arsenm, rampitec

Reviewed By: arsenm, rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65620

llvm-svn: 367969
2019-08-06 02:16:11 +00:00
Daniel Sanders
ff07166879 Fix another MSVC issue after 367965
Repeated the fix for MCRegister in Register

This reverts r367932 (git commit eac86ec25f5cd5d7a973c913d3c2ca8c90b24115)

llvm-svn: 367967
2019-08-06 01:16:29 +00:00
Johannes Doerfert
ca214cfdce [Attributor][NFC] Outline common pattern into helper method
This helper will also allow to also place logic to determine if an
abstract attribute is necessary in the first place.

llvm-svn: 367966
2019-08-06 00:55:11 +00:00
Daniel Sanders
1582e9ea20 Re-commit Register/MCRegister: Add conversion operators to avoid use of implicit convert to unsigned. NFC
Added two more conversions to satisfy MSVC and moved the declaration of
MCPhysReg to MCRegister.h to enable that

This reverts r367932 (git commit eac86ec25f5cd5d7a973c913d3c2ca8c90b24115)

llvm-svn: 367965
2019-08-06 00:53:47 +00:00
Johannes Doerfert
b24b122e73 [Attributor][Fix] Add const qualifier
I forgot to add this as part of the last commit.

llvm-svn: 367964
2019-08-06 00:46:02 +00:00
Johannes Doerfert
54ce808dc0 [Attributor] Provide a generic interface to check live instructions
Summary:
Similar to `Attributor::checkForAllCallSites`, we now provide such
functionality for instructions of a certain opcode through
`Attributor::checkForAllInstructions` and the convenient wrapper
`Attributor::checkForAllCallLikeInstructions`. This cleans up code,
avoids duplication, and simplifies the usage of liveness information.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65731

llvm-svn: 367961
2019-08-06 00:32:43 +00:00
Shiva Chen
9378c79f70 [RISCV] Custom legalize i32 operations for RV64 to reduce signed extensions
Differential Revision: https://reviews.llvm.org/D65434

llvm-svn: 367960
2019-08-06 00:24:00 +00:00
Peter Collingbourne
bdaea2b2e6 Silence ubsan after r367926.
Fixes e.g.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap-ubsan/builds/14273

We can't left shift here because left shifting of a negative number is UB.
The same doesn't apply to unsigned arithmetic, but switching to unsigned
doesn't appear to stop ubsan from complaining, so we need to mask out the
high bits.

llvm-svn: 367959
2019-08-06 00:21:30 +00:00
JF Bastien
50ec2e8271 [NFC] Remove useless static
The function is already inline in the header, static isn't what we want.

llvm-svn: 367955
2019-08-05 23:52:38 +00:00
Puyan Lotfi
d4f7bde729 Reverting D65760/r367944 due to buildbot failure.
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/15952/steps/build/logs/stdio

JITTargetMachineBuilder.cpp fails to build.

llvm-svn: 367954
2019-08-05 23:47:07 +00:00
Johannes Doerfert
bd4564686c [Attributor] Introduce the IRAttribute helper struct
Summary:
Certain properties, e.g., an AttrKind, are not shared among all abstract
attributes. This patch extracts the functionality into a helper struct.

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65712

llvm-svn: 367953
2019-08-05 23:35:12 +00:00
Johannes Doerfert
38ae76516c [Attributor] Make abstract attributes stateless
To remove boilerplate, mostly passing through values to the
AbstractAttriubute base class, we extract the state into an IRPosition
helper. There is no function change intended but the IRPosition struct
will provide more functionality down the line.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65711

llvm-svn: 367952
2019-08-05 23:32:31 +00:00
Johannes Doerfert
06ebe89c8d [Attributor] Use proper ID for attribute lookup
Summary:
The new scheme is similar to the pass manager and dyn_cast scheme where
we identify classes by the address of a static member. This is better
than the old scheme in which we had to "invent" new Attributor enums if
there was no corresponding one.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65710

llvm-svn: 367951
2019-08-05 23:30:01 +00:00
Johannes Doerfert
320cd911e7 [Attributor][NFCI] Avoid duplication of the InformationCache reference
Summary:
Instead of storing the reference to the InformationCache we now pass it
whenever it might be needed.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65709

llvm-svn: 367950
2019-08-05 23:26:06 +00:00
Johannes Doerfert
4ab84c53b7 [Attributor] Deduce the "no-return" attribute for functions
A function is "no-return" if we never reach a return instruction, either
because there are none or the ones that exist are dead.

Test have been adjusted:
  - either noreturn was added, or
  - noreturn was avoided by modifying the code.

The new noreturn_{sync,async} test make sure we do handle invoke
instructions with a noreturn (and potentially nowunwind) callee
correctly, even in the presence of potential asynchronous exceptions.

llvm-svn: 367948
2019-08-05 23:22:05 +00:00
Amara Emerson
9cf5e68300 [GlobalISel][CallLowering] Rename isArgumentHandler() -> isIncomingArgumentHandler()
Previous name and comment incorrectly implied it was just for formal arg handlers,
which is not true.

llvm-svn: 367945
2019-08-05 23:05:28 +00:00
Diego Caballero
19cf557cf1 [ORC] Add CPU name and sub-target features to detectHost
This commit adds host CPU name and sub-target features to the
`JITTargetMachineBuilder` created by `JITTargetMachineBuilder::detectHost()`.

Differential Revision: https://reviews.llvm.org/D65760

llvm-svn: 367944
2019-08-05 23:02:12 +00:00
Wolfgang Pieb
205f1a60c6 [llvm-readelf] Support dumping of stack sizes sections with readelf --stack-sizes
Reviewers: jhenderson, grimar, rupprecht

Differential Revision: https://reviews.llvm.org/D65313

llvm-svn: 367942
2019-08-05 22:47:07 +00:00
Philip Reames
c0f1116865 Add a note to the release not about a potentially breaking optimization
This has come up twice already (once in pr42763 and once in the commit thread), so give warning of a new way in which UB can result in unexpected program behavior.

llvm-svn: 367941
2019-08-05 22:34:59 +00:00
Peter Collingbourne
1d8399cf17 Add "REQUIRES: x86-registered-target" to test.
llvm-svn: 367937
2019-08-05 21:44:45 +00:00
Keno Fischer
089fc0dcee [WebAssembly] Fix conflict between ret legalization and sjlj
Summary:
When the WebAssembly backend encounters a return type that doesn't
fit within i32, SelectionDAG performs sret demotion, adding an
additional argument to the start of the function that contains
a pointer to an sret buffer to use instead. However, this conflicts
with the emscripten sjlj lowering pass. There we translate calls like:

```
	call {i32, i32} @foo()
```

into (in pseudo-llvm)
```
	%addr = @foo
	call {i32, i32} @__invoke_{i32,i32}(%addr)
```

i.e. we perform an indirect call through an extra function.
However, the sret transform now transforms this into
the equivalent of
```
        %addr = @foo
        %sret = alloca {i32, i32}
        call {i32, i32} @__invoke_{i32,i32}(%sret, %addr)
```
(while simultaneously translation the implementation of @foo as well).
Unfortunately, this doesn't work out. The __invoke_ ABI expected
the function address to be the first argument, causing crashes.

There is several possible ways to fix this:
1. Implementing the sret rewrite at the IR level as well and performing
   it as part of lowering to __invoke
2. Fixing the wasm backend to recognize that __invoke has a special ABI
3. A change to the binaryen/emscripten ABI to recognize this situation

This revision implements the middle option, teaching the backend to
treat __invoke_ functions specially in sret lowering. This is achieved
by
1) Introducing a new CallingConv ID for invoke functions
2) When this CallingConv ID is seen in the backend and the first argument
   is marked as sret (a function pointer would never be marked as sret),
   swapping the first two arguments.

Reviewed By: tlively, aheejin
Differential Revision: https://reviews.llvm.org/D65463

llvm-svn: 367935
2019-08-05 21:36:09 +00:00
Johannes Doerfert
2251be7a5f [Attributor][Fix] Do not remove instructions during manifestation
When we remove instructions cached references could still be live. This
patch avoids removing invoke instructions that are replaced by calls and
instead keeps them around but in a dead block.

llvm-svn: 367933
2019-08-05 21:35:02 +00:00
Daniel Sanders
47bf1c6dce Revert Register/MCRegister: Add conversion operators to avoid use of implicit convert to unsigned. NFC
MSVC finds ambiguity where clang doesn't and it looks like it's not going to be an easy fix
Reverting while I figure out how to fix it

This reverts r367916 (git commit aa15ec3c231717826e3c262b5ef9813d2fb5cadb)
This reverts r367920 (git commit 5d14efe279b5db9f4746ff834ab5c70e249d3871)

llvm-svn: 367932
2019-08-05 21:34:45 +00:00
Johannes Doerfert
ad717d67c6 [Attributor][Fix] Keep invokes if handlers catch asynchronous exceptions
Similar to other places where we transform invokes to calls we need to
be careful if the handler (=personality) can catch asynchronous
exceptions as they are not modeled as part of nounwind.

This is tested with D59978.

llvm-svn: 367931
2019-08-05 21:34:45 +00:00
Eric Christopher
184fcafb77 BMI2 support is indicated in bit eight of EBX, not nine.
See Intel SDM, Vol 2A, Table 3-8:
https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-2a-manual.pdf#page=296

Differential Revision: https://reviews.llvm.org/D65766

llvm-svn: 367929
2019-08-05 21:25:59 +00:00
Peter Collingbourne
25530694a8 llvm-symbolizer: Untag addresses in object files by default.
Any addresses that we pass to llvm-symbolizer are going to be untagged,
while any HWASAN instrumented globals are going to be tagged in the
symbol table. Therefore we need to untag the addresses before using them.

Differential Revision: https://reviews.llvm.org/D65769

llvm-svn: 367926
2019-08-05 20:59:25 +00:00
Lang Hames
9e0a23cc50 [ORC] Work around broken GCC/libstdc++ by adding an explicit conversion.
This should fix the bots that have been failing due to r367712.

llvm-svn: 367921
2019-08-05 20:30:35 +00:00
Daniel Sanders
30ea78bbc8 Fix MSVC error after r367916
It seems that MSVC sees ambiguity between the operator==()'s where clang
doesn't

llvm-svn: 367920
2019-08-05 20:03:43 +00:00
Amara Emerson
71886ba279 [AArch64][GlobalISel] Inline tiny memcpy et al at -O0.
FastISel already does this since the initial arm64 port was upstreamed, so
it seems there are no issues with doing this at -O0 for very small memcpys.

Gives a 0.2% geomean code size improvement on CTMark.

Differential Revision: https://reviews.llvm.org/D65758

llvm-svn: 367919
2019-08-05 20:02:52 +00:00
Daniel Sanders
7d32867958 Register/MCRegister: Add conversion operators to avoid use of implicit convert to unsigned. NFC
Summary:
This has no functional effect but makes it more obvious which parts of the
compiler do not use Register/MCRegister when you mark the implicit conversion
deprecated.

Implicit conversions for comparisons accounted for ~20% (~3k of ~13k) of
the implicit conversions when I first measured it. I haven't maintained
those numbers as other patches have landed though so it may be out of date.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65678

llvm-svn: 367916
2019-08-05 19:50:25 +00:00
Dmitri Gribenko
064322ff9f Revert "Try to fix failing AMDGPU disasm test, both Lin/Win agree this is 0 not 0x0"
This reverts commit r367907, it broke the test.

llvm-svn: 367909
2019-08-05 19:07:09 +00:00
Anusha Basana
6944ca7039 [llvm-lipo] Implement -segalign
Sets section alignments of the specified architecture slices to the
alignment values.
Alignment values are hexadecimal values that are powers of 2.

Differential Revision: https://reviews.llvm.org/D65420

llvm-svn: 367908
2019-08-05 19:06:55 +00:00
Reid Kleckner
54778e9f35 Try to fix failing AMDGPU disasm test, both Lin/Win agree this is 0 not 0x0
llvm-svn: 367907
2019-08-05 18:46:26 +00:00
Dmitri Gribenko
f5776c8a6c Revert "[AMDGPU] Use S_DENORM_MODE for gfx10"
This reverts commit r367882. It broke the test
MC/Disassembler/AMDGPU/gfx10_dasm_all.txt.

llvm-svn: 367904
2019-08-05 18:36:43 +00:00
Louis Dionne
e9c54d25b3 [libc++] Take 2: Integrate the PSTL into libc++
Summary:
This commit allows specifying LIBCXX_ENABLE_PARALLEL_ALGORITHMS when
configuring libc++ in CMake. When that option is enabled, libc++ will
assume that the PSTL can be found somewhere on the CMake module path,
and it will provide the C++17 parallel algorithms based on the PSTL
(that is assumed to be available).

The commit also adds support for running the PSTL tests as part of
the libc++ test suite.

The first attempt to commit this failed because it exposed a bug in the
tests for modules. Now that this has been fixed, it should be safe to
commit this.

Reviewers: EricWF

Subscribers: mgorny, christof, jkorous, dexonsmith, libcxx-commits, mclow.lists, EricWF

Tags: #libc

Differential Revision: https://reviews.llvm.org/D60480

llvm-svn: 367903
2019-08-05 18:29:14 +00:00
Craig Topper
ad1b2fd4c0 [X86] Enable -x86-experimental-vector-widening-legalization by default.
This patch changes our defualt legalization behavior for 16, 32, and
64 bit vectors with i8/i16/i32/i64 scalar types from promotion to
widening. For example, v8i8 will now be widened to v16i8 instead of
promoted to v8i16. This keeps the elements widths the same and pads
with undef elements. We believe this is a better legalization strategy.
But it carries some issues due to the fragmented vector ISA. For
example, i8 shifts and multiplies get widened and then later have
to be promoted/split into vXi16 vectors.

This has the potential to cause regressions so we wanted to get
it in early in the 10.0 cycle so we have plenty of time to
address them.

Next steps will be to merge tests that explicitly test the command
line option. And then we can remove the option and its associated
code.

llvm-svn: 367901
2019-08-05 18:25:36 +00:00