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Author SHA1 Message Date
Bob Wilson
cf35a852f5 Remove old hack for compiling with gcc-4.0. 
llvm-svn: 140573
 2011-09-26 22:30:57 +00:00
Owen Anderson
c811b1bed2 Remove incorrect testcases. 
llvm-svn: 140572
 2011-09-26 22:13:55 +00:00
Akira Hatanaka
a641d087fc Set register class of a register according to value of HasMips64. 
llvm-svn: 140570
 2011-09-26 21:55:17 +00:00
Akira Hatanaka
37493224a9 Define variable HasMips64 in MipsTargetLowering. 
llvm-svn: 140569
 2011-09-26 21:47:02 +00:00
Akira Hatanaka
9db31c430a In single float mode, double precision FP arguments are passed in integer 
registers, so there is no need to check here.

llvm-svn: 140568
 2011-09-26 21:37:50 +00:00
Eli Friedman
d01fc33809 Convert more tests to new atomic instructions. 
llvm-svn: 140567
 2011-09-26 21:36:10 +00:00
Eli Friedman
6aaaadc188 Convert more tests over to the new atomic instructions. 
I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.

llvm-svn: 140566
 2011-09-26 21:30:17 +00:00
Bill Wendling
25243542da Fix grammar. 
llvm-svn: 140564
 2011-09-26 21:10:31 +00:00
Bill Wendling
8e22ba15b1 Remove dead table entry. 
llvm-svn: 140563
 2011-09-26 21:08:28 +00:00
Bill Wendling
df9218305c Some minor (and more involved) cleanups. No real context changes. 
llvm-svn: 140561
 2011-09-26 21:06:33 +00:00
Owen Anderson
7742c81cde ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. 
llvm-svn: 140560
 2011-09-26 21:06:22 +00:00
Eli Friedman
56e68f7271 Convert more tests over to the new atomic instructions. 
llvm-svn: 140559
 2011-09-26 20:27:49 +00:00
Eli Friedman
ed450a3064 Upgrade a couple more tests to the new atomic instructions. 
llvm-svn: 140558
 2011-09-26 20:15:56 +00:00
Eli Friedman
9c1a430966 Enhance alias analysis for atomic instructions a bit. Upgrade a couple alias-analysis tests to the new atomic instructions. 
llvm-svn: 140557
 2011-09-26 20:15:28 +00:00
Justin Holewinski
c26ed4bf64 PTX: Fix memcpy intrinsic to handle 64-bit pointers 
llvm-svn: 140556
 2011-09-26 19:19:48 +00:00
Eli Friedman
32d22b6d3f Fix this test so it doesn't fail on Mac. 
llvm-svn: 140553
 2011-09-26 19:13:47 +00:00
Justin Holewinski
9954f99c10 PTX: Implement PTXSelectionDAGInfo 
llvm-svn: 140549
 2011-09-26 18:57:27 +00:00
Justin Holewinski
3e9a0bfed0 PTX: Implement ISD::ANY_EXTEND 
llvm-svn: 140548
 2011-09-26 18:57:24 +00:00
Justin Holewinski
52c50104d7 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

llvm-svn: 140547
 2011-09-26 18:57:22 +00:00
James Molloy
d63e75cd59 Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more. 
llvm-svn: 140539
 2011-09-26 17:40:42 +00:00
Justin Holewinski
443a122ac3 PTX: Add .align tests to stack object test file 
llvm-svn: 140537
 2011-09-26 16:20:38 +00:00
Justin Holewinski
c2d7be1dd0 PTX: SM > 2.0 implies +double 
llvm-svn: 140536
 2011-09-26 16:20:36 +00:00
Justin Holewinski
859dd9fa59 PTX: Fix some lingering issues with stack allocation 
llvm-svn: 140535
 2011-09-26 16:20:34 +00:00
Justin Holewinski
848dd4cf7c PTX: Split up the TableGen instruction definitions into logical units 
llvm-svn: 140534
 2011-09-26 16:20:31 +00:00
Justin Holewinski
83ae9143fd PTX: Unify handling of loads/stores 
llvm-svn: 140533
 2011-09-26 16:20:28 +00:00
Justin Holewinski
e79db83e87 PTX: Handle FrameIndex nodes 
llvm-svn: 140532
 2011-09-26 16:20:25 +00:00
David Meyer
90ed5fdd4f Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 
llvm-svn: 140517
 2011-09-26 06:44:27 +00:00
David Meyer
a6e588d80c PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
llvm-svn: 140516
 2011-09-26 06:13:20 +00:00
Craig Topper
a08173e534 Fix VEX decoding in i386 mode. Fixes PR11008. 
llvm-svn: 140515
 2011-09-26 05:12:43 +00:00
Jakob Stoklund Olesen
cbd2c336ab Add target hook for pseudo instruction expansion. 
Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

llvm-svn: 140472
 2011-09-25 19:21:35 +00:00
Nadav Rotem
559e12a58a [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENT 
SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.

Fixes spill-q.ll when running -promote-elements.

llvm-svn: 140471
 2011-09-25 18:59:42 +00:00
Jakob Stoklund Olesen
7e8448c147 Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos. 
No functional change intended.

llvm-svn: 140470
 2011-09-25 16:46:08 +00:00
Jakob Stoklund Olesen
e5f42e93f7 Rename LowerSubregs to ExpandPostRAPseudos. 
I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

llvm-svn: 140469
 2011-09-25 16:46:00 +00:00
Benjamin Kramer
8cab81e0ef Sort CMakeLists.txt. 
llvm-svn: 140465
 2011-09-24 22:06:35 +00:00
Nadav Rotem
347c658183 Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal 
(this is always the case for scalars), otherwise use the promoted result type.

Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.

llvm-svn: 140464
 2011-09-24 19:48:19 +00:00
Nadav Rotem
f1449d75ba [Vector-Select] Address one of the problems in 10902. 
When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.

This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.

llvm-svn: 140463
 2011-09-24 18:32:19 +00:00
Akira Hatanaka
ba4a83a86b Add .td file. 
llvm-svn: 140446
 2011-09-24 01:40:18 +00:00
Akira Hatanaka
20ebca467d Revert change made in .gitignore. 
llvm-svn: 140445
 2011-09-24 01:37:58 +00:00
Akira Hatanaka
bf382ce7ed Preparation for adding simple Mips64 instructions. 
llvm-svn: 140443
 2011-09-24 01:34:44 +00:00
Jakob Stoklund Olesen
59b2982dcf Only run MF.verify() with EXPENSIVE_CHECKS=1. 
llvm-svn: 140441
 2011-09-24 01:11:19 +00:00
Daniel Dunbar
599366dcae sys::Process: Add a SetWorkingDirectory method. 
llvm-svn: 140433
 2011-09-23 23:23:36 +00:00
Andrew Trick
3540419340 LSR minor bug fix in RateRegister. 
No test case. Noticed by inspection and I doubt it ever affects the
outcome of the overall heuristic, let alone final codegen.

llvm-svn: 140431
 2011-09-23 23:05:19 +00:00
Chris Lattner
162cff8104 Duncan owns dragonegg too, it's all his fault :) 
llvm-svn: 140430
 2011-09-23 22:46:43 +00:00
Jakob Stoklund Olesen
bc6ae70907 Verify that terminators follow non-terminators. 
This exposes a -segmented-stacks bug.

llvm-svn: 140429
 2011-09-23 22:45:39 +00:00
Eli Friedman
a66a438876 PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that. 
llvm-svn: 140428
 2011-09-23 22:41:57 +00:00
Owen Anderson
fc9a0d104c Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0. 
llvm-svn: 140426
 2011-09-23 22:25:02 +00:00
Jakob Stoklund Olesen
ca6877343b Also match negative offsets for addrmode3 and addrmode5. 
Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

llvm-svn: 140425
 2011-09-23 22:10:33 +00:00
Owen Anderson
f9ff097fdd Fix incorrect disassembly test. 
llvm-svn: 140423
 2011-09-23 22:05:54 +00:00
Owen Anderson
e63c963148 Add more fixed bits to USAT16 encoding to filter out incorrect decodings. 
llvm-svn: 140422
 2011-09-23 21:57:50 +00:00
Owen Anderson
53c6b08ad8 Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions. 
llvm-svn: 140420
 2011-09-23 21:26:40 +00:00