1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
Commit Graph

62 Commits

Author SHA1 Message Date
Hiroshi Inoue
9e40efa572 [NFC] fix trivial typos in documents
llvm-svn: 334799
2018-06-15 05:10:09 +00:00
Craig Topper
c7900d3d4e [Docs] Remove some WIP X86 documentation I accidentally leaked into r328031.
I didn't mean to commit it, but I guess I failed to switch branches or stash it in my local tree.

llvm-svn: 328124
2018-03-21 17:32:57 +00:00
Craig Topper
271cc75f56 [TableGen] Pass result of std::unique to vector::erase instead of calculating a size and calling resize.
llvm-svn: 328031
2018-03-20 20:24:10 +00:00
Sean Eveson
b01a058fa6 [MC] Fix -stack-size-section on ARM
Change symbol values in the stack_size section from being 8 bytes, to being a target dependent size.

Differential Revision: https://reviews.llvm.org/D42108

llvm-svn: 322619
2018-01-17 09:01:29 +00:00
Sean Eveson
d3fdef109a [MC] Function stack size section.
Re applying after fixing issues in the diff, sorry for any painful conflicts/merges!

Original RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-August/117028.html

This change adds a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. The section contains pairs of function symbol references (8 byte) and stack sizes (unsigned LEB128).

The contents of this section can be used to measure changes to stack sizes between different versions of the compiler or a source base. The advantage of having a section is that we can extract this information when examining binaries that we didn't build, and it allows users and tools easy access to that information just by referencing the binary.

There is a follow up change to add an option to clang.

Thanks.

Reviewers: hfinkel, MatzeB

Reviewed By: MatzeB

Subscribers: thegameg, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D39788

llvm-svn: 319430
2017-11-30 13:05:14 +00:00
Sean Eveson
b9a62958c9 Revert r319423: [MC] Function stack size section.
I messed up the diff.

llvm-svn: 319429
2017-11-30 12:43:25 +00:00
Sean Eveson
4b5d214bc5 [MC] Function stack size section.
Summary:
Original RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-August/117028.html

I wasn't sure who to put as reviewers, so please add/remove people as appropriate.

This change adds a '.stack-size' section containing metadata on function stack sizes to output ELF files behind the new -stack-size-section flag. The section contains pairs of function symbol references (8 byte) and stack sizes (unsigned LEB128).

The contents of this section can be used to measure changes to stack sizes between different versions of the compiler or a source base. The advantage of having a section is that we can extract this information when examining binaries that we didn't build, and it allows users and tools easy access to that information just by referencing the binary.

There is a follow up change to add an option to clang.

Thanks.

Reviewers: hfinkel, MatzeB

Reviewed By: MatzeB

Subscribers: thegameg, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D39788

llvm-svn: 319423
2017-11-30 12:01:16 +00:00
Tony Tye
44bb2c5151 Add documentation for various aspects of the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304831
2017-06-06 20:31:59 +00:00
Jonathan Roelofs
a355e0aeb8 [docs] Fix typo
llvm-svn: 294645
2017-02-09 23:02:37 +00:00
Konstantin Zhuravlyov
60d312012b [Support/ELF/AMDGPU] Add 32-bit lo/hi got and pc relative relocations
Added relocation names:
  - R_AMDGPU_GOTPCREL32_LO
  - R_AMDGPU_GOTPCREL32_HI
  - R_AMDGPU_REL32_LO
  - R_AMDGPU_REL32_HI

AMDGPU isa only supports 32-bit immediates. In order to access 64-bit address we need to generate 32-bit lo/hi relocations, and do the right math (separate patch). Currently we only generate one 32 bit relocation for lower bits for each access, losing higher bits. Hence we need relocations listed above.

Differential Revision: https://reviews.llvm.org/D25546

llvm-svn: 284191
2016-10-14 04:03:49 +00:00
Sylvestre Ledru
ea722a5808 Fix some typos in the doc
llvm-svn: 279943
2016-08-28 20:29:18 +00:00
Renato Golin
dfb328c437 [docs] Fixing Sphinx warnings to unclog the buildbot
Lots of blocks had "llvm" or "nasm" syntax types but either weren't following
the syntax, or the syntax has changed (and sphinx hasn't keep up) or the type
doesn't even exist (nasm?).

Other documents had :options: what were invalid. I only removed those that had
warnings, and left the ones that didn't, in order to follow the principle of
least surprise.

This is like this for ages, but the buildbot is now failing on errors. It may
take a while to upgrade the buildbot's sphinx, if that's even possible, but
that shouldn't stop us from getting docs updates (which seem down for quite
a while).

Also, we're not losing any syntax highlight, since when it doesn't parse, it
doesn't colour. Ie. those blocks are not being highlighted anyway.

I'm trying to get all docs in one go, so that it's easy to revert later if we
do fix, or at least easy to know what's to fix.

llvm-svn: 276109
2016-07-20 12:16:38 +00:00
Krzysztof Parzyszek
c413d833f7 [Docs][CodeGenerator] Don't specify the number of operands in BuildMI
Patch by Visoiu Mistrih Francis.

Differential Revision: http://reviews.llvm.org/D21819

llvm-svn: 274128
2016-06-29 14:14:59 +00:00
Tom Stellard
1bc8ee7065 Support/ELF: Add R_AMDGPU_GOTPCREL relocation
Summary:
We will start generating this in a future patch.

Reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21482

llvm-svn: 273628
2016-06-23 23:11:29 +00:00
Konstantin Zhuravlyov
035608a55b [docs] Update AMDGPU relocation information
- Added new notation for specifying relocation calculation
  - Renamed:
    - R_AMDGPU_32_LOW -> R_AMDGPU_ABS32_LO
    - R_AMDGPU_32_HIGH -> R_AMDGPU_ABS32_HI
    - R_AMDGPU_64 -> R_AMDGPU_ABS64
  - Added:
    - R_AMDGPU_REL32
    - R_AMDGPU_REL64
    - R_AMDGPU_ABS32
  - Updated calculations for relative relocations

Differential Revision: http://reviews.llvm.org/D21215

llvm-svn: 272684
2016-06-14 17:20:29 +00:00
Tom Stellard
b49c569b73 docs: Add AMDGPU relocation information
Summary:
This documents the various relocation types that are supported by the
Radeon Open Compute (ROC) runtime (which is essentially the dynamic
linker for AMDGPU).

Only R_AMDGPU_32 is not currently supported by the ROC runtime, but
it will usually be resolved at link time by lld.

Patch by: Konstantin Zhuravlyov

Reviewers: kzhuravl, rafael

Subscribers: rafael, arsenm, llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D20952

llvm-svn: 272352
2016-06-10 00:31:13 +00:00
James Y Knight
49bc30f7bb Remove bit-rotten CppBackend.
This backend was supposed to generate C++ code which will re-construct
the LLVM IR passed as input. This seems to me to have very marginal
usefulness in the first place.

However, the code has never been updated to use IRBuilder, which makes
its current value negative -- people who look at the output may be
steered to use the *wrong* C++ APIs to construct IR.

Furthermore, it's generated code that doesn't compile since at least
2013.

Differential Revision: http://reviews.llvm.org/D19942

llvm-svn: 268631
2016-05-05 14:35:40 +00:00
David L Kreitzer
ed75c93233 Add an address space for the X86 SS segment.
Patch by Michael LeMay (michael.lemay@intel.com)

Differential Revision: http://reviews.llvm.org/D17093

llvm-svn: 268431
2016-05-03 20:16:08 +00:00
Justin Lebar
5b85fcee4a [docs] "Straightforward" is one word.
llvm-svn: 263480
2016-03-14 20:18:51 +00:00
Justin Lebar
94ff383b84 [docs] Fix typo in docs/CodeGenerator.rst.
llvm-svn: 263479
2016-03-14 20:17:08 +00:00
Artyom Skrobov
2bb62cb91a Fixing a typo in docs/CodeGenerator.rst
llvm-svn: 253045
2015-11-13 15:14:04 +00:00
Alexei Starovoitov
b3909438e8 [bpf] add documentation and instruction set description
llvm-svn: 245105
2015-08-14 22:00:45 +00:00
Charlie Turner
3bc933f220 [NFC] Minor editorial fixes to the CodeGen docs.
llvm-svn: 241249
2015-07-02 09:32:01 +00:00
Eric Christopher
d1c4eedddb Fix grammar in documentation.
Patch by Ralph Campbell!

llvm-svn: 229884
2015-02-19 18:46:25 +00:00
Mehdi Amini
54e3de76f7 SelectionDAG: add a -filter-view-dags option to llc
This option takes the name of the basic block you want to visualize
with -view-*-dags

Differential Revision: http://reviews.llvm.org/D6948

llvm-svn: 225953
2015-01-14 06:03:18 +00:00
Dan Liew
20fb2f8367 [sphinx cleanup]
Fix sphinx warning introduced by r217537

llvm-svn: 217541
2014-09-10 20:43:03 +00:00
Nico Weber
1c48a79f5f Fix docs reference to inexistent class.
Patch sent via telegraph by TNorthover. Thanks!

llvm-svn: 217537
2014-09-10 19:50:55 +00:00
Matt Arsenault
0e3d3ae960 Add note to documentation about machine node chains.
I've been assuming chain operands were always the first operand,
since the documentation says this. I was confused about why they
were missing after instruction selection. Apparently the convention
changes to using the last operand for MachineSDNodes and I've never
noticed before.

llvm-svn: 216934
2014-09-02 19:18:52 +00:00
Sean Silva
31dbd2c8cd [docs] Fix a mangled sentence.
Fixes PR20169

llvm-svn: 212116
2014-07-01 18:22:32 +00:00
Sean Silva
35569409fe [docs] Remove stray HTML tag.
Fixes PR20167

llvm-svn: 212115
2014-07-01 18:15:00 +00:00
Alp Toker
000fb20af5 Fix 'platform-specific' hyphenations
llvm-svn: 212056
2014-06-30 18:57:16 +00:00
Jay Foad
a704f5fc73 Fix strange typo in markup.
llvm-svn: 208759
2014-05-14 08:10:16 +00:00
Reid Kleckner
86ad66783f Revert "[ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'"
This reverts commit r200561.

This calling convention was an attempt to match the MSVC C++ ABI for
methods that return structures by value.  This solution didn't scale,
because it would have required splitting every CC available on Windows
into two: one for methods and one for free functions.

Now that we can put sret on the second arg (r208453), and Clang does
that (r208458), revert this hack.

llvm-svn: 208459
2014-05-09 22:56:42 +00:00
Sean Silva
6361f43825 [docs] Fix up some links to the preferred style.
:doc:`...` and :ref:`...` links help Sphinx keep track the dependencies
between documents and ensure that they are not pointing to nowhere.

Raw HTML links work just fine and are easier for people less familiar
with reST/Sphinx. They are easy to change over to the :doc:/:ref: style
after the fact so this is not a problem.

This commit doesn't fix all of them.

llvm-svn: 205792
2014-04-08 21:06:22 +00:00
Sean Silva
72748c6bf7 [docs] Fix some links
The TableGen docs have changed structure

Patch by Tay Ray Chuan!

llvm-svn: 205744
2014-04-07 22:46:40 +00:00
Reid Kleckner
8ff8b30e4d [ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'
MSVC always places the 'this' parameter for a method first.  The
implicit 'sret' pointer for methods always comes second.  We already
implement this for __thiscall by putting sret parameters on the stack,
but __cdecl methods require putting both parameters on the stack in
opposite order.

Using a special calling convention allows frontends to keep the sret
parameter first, which avoids breaking lots of assumptions in LLVM and
Clang.

Fixes PR15768 with the corresponding change in Clang.

Reviewers: ributzka, majnemer

Differential Revision: http://llvm-reviews.chandlerc.com/D2663

llvm-svn: 200561
2014-01-31 17:41:22 +00:00
Tim Northover
7eec1d8532 Docs: fix sign of division and increase equivocation on code generated.
I should have been a politician.

llvm-svn: 199092
2014-01-13 10:47:04 +00:00
Rafael Espindola
69e679267f Add more documentation about the TargetStreamer interface.
llvm-svn: 192796
2013-10-16 14:54:39 +00:00
Rafael Espindola
a6f424f877 Add a paragraph about MCTargetStreamer.
llvm-svn: 192265
2013-10-09 02:05:08 +00:00
Sylvestre Ledru
804e76cb31 Fix a typo in the documentation. Thanks to Diana Vasile for the patch
llvm-svn: 191752
2013-10-01 13:17:09 +00:00
Rafael Espindola
32f9d6abe2 Remove the mblaze backend from llvm.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

llvm-svn: 187145
2013-07-25 18:55:05 +00:00
Richard Sandiford
77796bbc7d [SystemZ] Add disassembler support
llvm-svn: 181777
2013-05-14 10:17:52 +00:00
Richard Sandiford
31a90f913c Add SystemZ feats to CodeGenerator.rst
llvm-svn: 181431
2013-05-08 14:23:43 +00:00
Richard Osborne
1c4909b705 [docs] Update Target Feature Matrix for the XCore backend.
Disassembler support has recently been added. Fill in some other unknowns
at the same time.

llvm-svn: 181156
2013-05-05 14:09:55 +00:00
Ulrich Weigand
6cee29625a Extend TableGen instruction selection matcher to improve handling
of complex instruction operands (e.g. address modes).

Currently, if a Pat pattern creates an instruction that has a complex
operand (i.e. one that consists of multiple sub-operands at the MI
level), this operand must match a ComplexPattern DAG pattern with the
correct number of output operands.

This commit extends TableGen to alternatively allow match a complex
operands against multiple separate operands at the DAG level.

This allows using Pat patterns to match pre-increment nodes like
pre_store (which must have separate operands at the DAG level) onto
an instruction pattern that uses a multi-operand memory operand,
like the following example on PowerPC (will be committed as a
follow-on patch):

  def STWU  : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst),
                    "stwu $rS, $dst", LdStStoreUpd, []>,
                    RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">;

  def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff),
            (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>;

Here, the pair of "ptroff" and "ptrreg" operands is matched onto the
complex operand "dst" of class "memri" in the "STWU" instruction.

Approved by Jakob Stoklund Olesen.

llvm-svn: 177428
2013-03-19 19:51:09 +00:00
Eli Bendersky
7ab8793a0a Remove a mention of TargetInstrDescriptor, which no longer exists in the code
llvm-svn: 173971
2013-01-30 20:54:21 +00:00
Justin Holewinski
4744632031 Remove PTX->NVPTX in CodeGenerator document and update its text.
llvm-svn: 172235
2013-01-11 18:47:10 +00:00
Justin Holewinski
42297e1413 Update CodeGenerator document to add a "Not Applicable" category to the
Target Feature Matrix, and update the PTX column with this new category.

llvm-svn: 172234
2013-01-11 18:37:54 +00:00
Sean Silva
e593654d4f docs: Fix long standing linking antipattern.
Before we learned about :doc:, we used :ref: and put a dummy link at the
top of each page. Don't do that anymore.

This fixes PR14891 as a special case.

llvm-svn: 172162
2013-01-11 02:28:08 +00:00
Dmitri Gribenko
891cde588c Documentation: convert ReleaseNotes.html to reST.
Patch by Anthony Mykhailenko with small fixes by me.

llvm-svn: 169714
2012-12-09 23:14:26 +00:00