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Commit Graph

126635 Commits

Author SHA1 Message Date
Davide Italiano
d5e6621b4e [llvm-nm] Roll several conditions into a single if. NFCI.
llvm-svn: 258846
2016-01-26 19:57:42 +00:00
Hemant Kulkarni
e89fec8eee [llvm-readobj] Add -elf-section-groups option
Adds a way to inspect SHT_GROUP sections in ELF objects.
Displays signature, member sections of these sections.

Differential revision: http://reviews.llvm.org/D16555

llvm-svn: 258845
2016-01-26 19:46:39 +00:00
Chad Rosier
218caa8595 [ScheduleDAGInstrs] Simplify logic to improve readability. NFC.
The call to isInvariantLoad() already returns false for non-load instructions.

llvm-svn: 258841
2016-01-26 19:33:57 +00:00
Sanjay Patel
b8123e239a tidy up; NFC
llvm-svn: 258838
2016-01-26 19:30:14 +00:00
Davide Italiano
d54157738e [llvm-nm] Simplify. No functional changes intended.
llvm-svn: 258837
2016-01-26 19:28:51 +00:00
Sanjay Patel
d7994b665a [x86] simplify getOnesVector() ; NFCI
Let DAG.getConstant() handle the splatting; there's no need
to repeat that logic here.

llvm-svn: 258833
2016-01-26 18:49:36 +00:00
Eugene Zelenko
966902f532 Fix Clang-tidy modernize-use-nullptr and modernize-use-override warnings; other minor fixes.
Differential revision: reviews.llvm.org/D16568

llvm-svn: 258831
2016-01-26 18:48:36 +00:00
Aditya Nandakumar
90ba1bcb73 Reassociate: Reprocess RedoInsts after each inst
Previously the RedoInsts was processed at the end of the block.
However it was possible that it left behind some instructions that
were not canonicalized.
This should guarantee that any previous instruction in the basic
block is canonicalized before we process a new instruction.

llvm-svn: 258830
2016-01-26 18:42:36 +00:00
Sanjay Patel
32b88f60db [x86, AVX] tighten checks
llvm-svn: 258828
2016-01-26 18:22:50 +00:00
Benjamin Kramer
96bd0333a7 Update wasm target for r258819.
llvm-svn: 258827
2016-01-26 18:21:38 +00:00
Kevin Enderby
bfbad8d3aa Update the comments for the macho-invalid-zero-ncmds test and fix
llvm-objdump when printing the Mach Header to print the unknown
cputype and cpusubtype fields as decimal instead of not printing
them at all.  And change the test to check for that.

llvm-svn: 258826
2016-01-26 18:20:49 +00:00
Sanjay Patel
3823f0b2bd fix formatting; NFC
llvm-svn: 258825
2016-01-26 18:14:37 +00:00
Sanjay Patel
f17d5e0627 don't repeat names in documentation comments; NFC
llvm-svn: 258820
2016-01-26 17:06:13 +00:00
Benjamin Kramer
75511fc092 Reflect the MC/MCDisassembler split on the include/ level.
No functional change, just moving code around.

llvm-svn: 258818
2016-01-26 16:44:37 +00:00
Sanjay Patel
906306d436 [LibCallSimplifier] fold memset(malloc(x), 0, x) --> calloc(1, x)
This is a step towards solving PR25892:
https://llvm.org/bugs/show_bug.cgi?id=25892

It won't handle the reported case. As noted by the 'TODO' comments in the patch, 
we need to relax the hasOneUse() constraint and also match patterns that include
memset_chk() and the llvm.memset() intrinsic in addition to memset().

Differential Revision: http://reviews.llvm.org/D16337

llvm-svn: 258816
2016-01-26 16:17:24 +00:00
Matthew Simpson
973e079b66 Revert "Reapply commit r258404 with fix"
This commit exposes a crash in computeKnownBits on the Chromium buildbots.
Reverting to investigate.

Reference: https://llvm.org/bugs/show_bug.cgi?id=26307
llvm-svn: 258812
2016-01-26 15:45:49 +00:00
Igor Laevsky
7660fa06ad Re-submit r256008 "Improve DWARFDebugFrame::parse to also handle __eh_frame."
Originally this change was causing failures on windows buildbots.
But those problems were fixed in r258806.

llvm-svn: 258811
2016-01-26 15:09:42 +00:00
Dan Gohman
5af9a1aad6 [WebAssembly] Fix a typo in a comment.
llvm-svn: 258810
2016-01-26 14:55:17 +00:00
Igor Laevsky
3044550590 [DebugInfo] Fix DWARFDebugFrame instruction operand ordering
We can't rely on the evalution order of function arguments.

Differential Revision: http://reviews.llvm.org/D16509

llvm-svn: 258806
2016-01-26 13:31:11 +00:00
Simon Pilgrim
0800d72a1a [X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecutiveLoads
This patch adds support for trailing zero elements to VZEXT_LOAD loads (and checks that no zero elts occur within the consecutive load).

It also generalizes the 64-bit VZEXT_LOAD load matching to work for loads other than 2x32-bit loads.

After this patch it will also be easier to add support for other basic load patterns like 32-bit VZEXT_LOAD loads, PMOVZX and subvector load insertion.

Differential Revision: http://reviews.llvm.org/D16217

llvm-svn: 258798
2016-01-26 09:30:08 +00:00
Craig Topper
6dd1abcce8 [X86] Mark LDS/LES as not being allowed in 64-bit mode.
Their opcodes are used as part of the VEX prefix in 64-bit mode. Clearly the disassembler implicitly decoded them as AVX instructions in 64-bit mode, but I think the AsmParser would have encoded them.

llvm-svn: 258793
2016-01-26 06:10:15 +00:00
Matt Arsenault
9094a66425 AMDGPU: Move AMDGPU intrinsics only used by R600
llvm-svn: 258790
2016-01-26 04:49:24 +00:00
Matt Arsenault
f5c703425b AMDGPU: Tidy minor td file issues
Make comments and indentation more consistent.

Rearrange a few things to be in a more consistent order,
such as organizing subtarget features from those describing
an actual device property, and those used as options.

llvm-svn: 258789
2016-01-26 04:49:22 +00:00
Matt Arsenault
51a14cbbc7 AMDGPU: Make v32i8/v64i8 illegal types
Old intrinsics were forcing these, but they have now all
been removed. This fixes large i8 vector operations generally
being broken.

llvm-svn: 258788
2016-01-26 04:43:48 +00:00
Matt Arsenault
b7742acaf4 AMDGPU: Remove old sample intrinsics
I did my best to try to update all the uses in tests that
just happened to use the old ones to the newer intrinsics.

I'm not sure I got all of the immediate operand conversions
correct, since the value seems to have been ignored by the
old pattern but I don't think it really matters.

llvm-svn: 258787
2016-01-26 04:38:08 +00:00
Matt Arsenault
581518df24 AMDGPU: Add new amdgcn intrinsics for cube instructions
More cleanup to try to get all intrinsics using the correct
amdgcn prefix that are as close to the instruction as possible.

llvm-svn: 258786
2016-01-26 04:29:56 +00:00
Matt Arsenault
667cd15c1c AMDGPU: Implement read_register and write_register intrinsics
Some of the special intrinsics now that now correspond to a instruction
also have special setting of some registers, e.g. llvm.SI.sendmsg sets
m0 as well as use s_sendmsg. Using these explicit register intrinsics
may be a better option.

Reading the exec mask and others may be useful for debugging. For this
I'm not sure this is entirely correct because we would want this to
be convergent, although it's possible this is already treated
sufficently conservatively.

llvm-svn: 258785
2016-01-26 04:29:24 +00:00
Matt Arsenault
31798fd428 AMDGPU: Note mesa version in release notes
llvm-svn: 258784
2016-01-26 04:29:15 +00:00
Matt Arsenault
97a3b39dcb AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now
Also move into backend intrinsics to discourage use of the old name.

llvm-svn: 258783
2016-01-26 04:14:16 +00:00
Dan Gohman
bf8e0c60a6 [WebAssembly] Optimize memcpy/memmove/memcpy calls.
These calls return their first argument, but because LLVM uses an intrinsic
with a void return type, they can't use the returned attribute. Generalize
the store results pass to optimize these calls too.

llvm-svn: 258781
2016-01-26 04:01:11 +00:00
Dan Gohman
82741c1205 [WebAssembly] Remove a completed entry from the README.txt.
llvm-svn: 258780
2016-01-26 03:43:48 +00:00
Dan Gohman
e694253126 [WebAssembly] Implement unaligned loads and stores.
Differential Revision: http://reviews.llvm.org/D16534

llvm-svn: 258779
2016-01-26 03:39:31 +00:00
Haicheng Wu
5302d65f58 [LIR] Add support for structs and hand unrolled loops
This is a recommit of r258620 which causes PR26293.

The original message:

Now LIR can turn following codes into memset:

typedef struct foo {
  int a;
  int b;
} foo_t;

void bar(foo_t *f, unsigned n) {
  for (unsigned i = 0; i < n; ++i) {
    f[i].a = 0;
    f[i].b = 0;
  }
}

void test(foo_t *f, unsigned n) {
  for (unsigned i = 0; i < n; i += 2) {
    f[i] = 0;
    f[i+1] = 0;
  }
}

llvm-svn: 258777
2016-01-26 02:27:47 +00:00
Reid Kleckner
0081990bfb Use binary search for intrinsic ID lookups
This improves compile time of Function.cpp from 57s to 37s for me
locally.  Intrinsic IDs are cached on the Function object, so this
shouldn't regress performance.

llvm-svn: 258774
2016-01-26 02:06:41 +00:00
Matthias Braun
036b32dcef LiveIntervalAnalysis: Improve some comments
As recommended by Justin.

llvm-svn: 258771
2016-01-26 01:40:48 +00:00
Reid Kleckner
b834dd994c Sort intrinsics by LLVM intrinsic name, rather than tablegen def name
Step one towards using a simple binary search to lookup intrinsic IDs
instead of our crazy table generated switch+memcmp+startswith code that
makes Function.cpp take about a minute to compile.  See PR24785 and
PR11951 for why we should do this.

The X86 backend contains tables that need to be sorted on intrinsic ID,
so reorder those.

llvm-svn: 258757
2016-01-26 00:55:00 +00:00
Matthias Braun
7d3caf5306 LiveIntervalAnalysis: Cleanup handleMove{Down|Up}() functions, NFC
These two functions are hard to reason about. This commit makes the code
more comprehensible:

- Use four distinct variables (OldIdxIn, OldIdxOut, NewIdxIn, NewIdxOut)
  with a fixed value instead of a changing iterator I that points to
  different things during the function.
- Remove the early explanation before the function in favor of more
  detailed comments inside the function. Should have more/clearer comments now
  stating which conditions are tested and which invariants hold at
  different points in the functions.

The behaviour of the code was not changed.

I hope that this will make it easier to review the changes in
http://reviews.llvm.org/D9067 which I will adapt next.

Differential Revision: http://reviews.llvm.org/D16379

llvm-svn: 258756
2016-01-26 00:43:50 +00:00
Dan Gohman
2bd89d3994 Followup to 258750; update more tests to use .p2align .
llvm-svn: 258755
2016-01-26 00:35:07 +00:00
Dan Gohman
39414df67d Followup to 258750; update all MC tests to use .p2align .
llvm-svn: 258754
2016-01-26 00:27:59 +00:00
Dan Gohman
afdd4e6630 Followup to 258750; update this test to use .p2align .
llvm-svn: 258752
2016-01-26 00:17:24 +00:00
Dan Gohman
a72e83c26e [MC] Use .p2align instead of .align
For historic reasons, the behavior of .align differs between targets.
Fortunately, there are alternatives, .p2align and .balign, which make the
interpretation of the parameter explicit, and which behave consistently across
targets.

This patch teaches MC to use .p2align instead of .align, so that people reading
code for multiple architectures don't have to remember which way each platform
does its .align directive.

Differential Revision: http://reviews.llvm.org/D16549

llvm-svn: 258750
2016-01-26 00:03:25 +00:00
Philip Reames
75dc59c9a3 [GVN] Rearrange code to make local vs non-local cases more obvious [NFCI]
llvm-svn: 258747
2016-01-25 23:37:53 +00:00
Evgeniy Stepanov
258db6665b [cfi] Cross-DSO CFI diagnostic mode (LLVM part).
* __cfi_check gets a 3rd argument: ubsan handler data
* Instead of trapping on failure, call __cfi_check_fail which must be
  present in the module (generated in the frontend).

llvm-svn: 258746
2016-01-25 23:35:03 +00:00
Philip Reames
9298d3408c [GVN] Factor out common code [NFCI]
We had the same code duplicated for each type of Def.  We also have the entire block duplicated between the local and non-local case, but let's start with local cleanup.

llvm-svn: 258740
2016-01-25 23:19:12 +00:00
Vedant Kumar
b5f67b4e31 [docs] Document how to merge patches into release branches
llvm-svn: 258736
2016-01-25 22:47:54 +00:00
Matthias Braun
69950e68ba X86ISelLowering: Fix cmov(cmov) special lowering bug
There's a special case in EmitLoweredSelect() that produces an improved
lowering for cmov(cmov) patterns. However this special lowering is
currently broken if the inner cmov has multiple users so this patch
stops using it in this case.

If you wonder why this wasn't fixed by continuing to use the special
lowering and inserting a 2nd PHI for the inner cmov: I believe this
would incur additional copies/register pressure so the special lowering
does not improve upon the normal one anymore in this case.

This fixes http://llvm.org/PR26256 (= rdar://24329747)

llvm-svn: 258729
2016-01-25 22:08:25 +00:00
Teresa Johnson
a52cfbb4e3 [ThinLTO] Find all needed metadata when linking metadata as postpass
For metadata postpass linking, after importing all functions, we need
to recursively walk through any nodes reached via imported functions to
locate needed subprogram metadata. Some might only be reached indirectly
via the variable list for an inlined function.

llvm-svn: 258728
2016-01-25 22:04:56 +00:00
Simon Pilgrim
a63717e4c0 [X86][AVX] Add commutation support for VPERM2X128 instructions
Its main use is to allow memory folding of the 1st operand

Differential Revision: http://reviews.llvm.org/D16521

llvm-svn: 258726
2016-01-25 21:51:34 +00:00
Teresa Johnson
8b2ed4fc5e [ThinLTO] Handle DISubprogram reached indirectly from DIImportedEntity
Extend fix for PR26037 to identify DISubprogram reached from a
DIImportedEntity via a DILexicalBlock.

llvm-svn: 258722
2016-01-25 21:29:55 +00:00
Xinliang David Li
50d58058da Fix a typo
llvm-svn: 258716
2016-01-25 20:38:13 +00:00