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97057 Commits

Author SHA1 Message Date
Rafael Espindola
d875d09386 Add calls to doInitialization() and doFinalization() in verifyFunction()
The function verifyFunction() in lib/IR/Verifier.cpp misses some
calls. It creates a temporary FunctionPassManager that will run a
single Verifier pass. Unfortunately, FunctionPassManager is no
PassManager and does not call doInitialization() and doFinalization()
by itself. Verifier does important tasks in doInitialization() such as
collecting type information used to check DebugInfo metadata and
doFinalization() does some additional checks. Therefore these checks
were missed and debug info couldn't be verified at all, it just
crashed if the function had some.

verifyFunction() is currently not used in llvm unless -debug option is
enabled, and in unittests/IR/VerifierTest.cpp

VerifierTest had to be changed to create the function in a module from
which the type debug info can be collected.

Patch by Michael Kruse.

llvm-svn: 193719
2013-10-30 22:37:51 +00:00
Rafael Espindola
bdb3c4f195 Produce .weak_def_can_be_hidden for some linkonce_odr values
With this patch llvm produces a weak_def_can_be_hidden for linkonce_odr
if they are also unnamed_addr or don't have their address taken.

There is not a lot of documentation about .weak_def_can_be_hidden, but
from the old discussion about linkonce_odr_auto_hide and the name of
the directive this looks correct: these symbols can be hidden.

Testing this with the ld64 in Xcode 5 linking clang reduces the number of
exported symbols from 21053 to 19049.

llvm-svn: 193718
2013-10-30 22:08:11 +00:00
David Blaikie
1cac440e90 DebugInfo: Push header handling down into CompileUnit
This is a preliminary step to handling type units by abstracting over
all (type or compile) units.

llvm-svn: 193714
2013-10-30 20:42:41 +00:00
Simon Atanasyan
4e71702c4e [Mips] Add more SHF_MIPS_xxx ELF section flags.
llvm-svn: 193713
2013-10-30 20:41:45 +00:00
Will Dietz
da0e56a8a1 Add DebugInfo testcase for high_pc encoded as constant, fixed in r193555.
llvm-svn: 193711
2013-10-30 20:27:17 +00:00
Matt Arsenault
f608b07c6f Fix GVN creating bitcast between address spaces
llvm-svn: 193710
2013-10-30 19:05:41 +00:00
Tom Roeder
9290de3a99 This commit adds some (but not all) of the x86-64 relocations that are not
currently supported in the ELF object writer, along with a simple test case.

llvm-svn: 193709
2013-10-30 18:47:25 +00:00
Rui Ueyama
75714118ae Add {start,end}with_lower methods to StringRef.
startswith_lower is ocassionally useful and I think worth adding.
endwith_lower is added for completeness.

Differential Revision: http://llvm-reviews.chandlerc.com/D2041

llvm-svn: 193706
2013-10-30 18:32:26 +00:00
Artyom Skrobov
de6ac0d99e [ARM] NEON instructions were erroneously decoded from certain invalid encodings
llvm-svn: 193705
2013-10-30 18:10:09 +00:00
Tom Stellard
e058534e9a R600: Custom lower f32 = uint_to_fp i64
llvm-svn: 193701
2013-10-30 17:22:05 +00:00
David Blaikie
8f9b0650cf DwarfDebug: Change Abbreviations member from pointer to reference
llvm-svn: 193699
2013-10-30 17:14:24 +00:00
Benjamin Kramer
80500b8f5b fix RST reference in Writing an LLVM Pass
Currently, instead of showing up as link, it is rendered as

  ...of FunctionPass <writing-an-llvm-pass-FunctionPass>. The...

PR17733. Patch by Tay Ray Chuan!

llvm-svn: 193698
2013-10-30 17:09:32 +00:00
Hans Wennborg
281c56f956 Add #include of raw_ostream.h to MipsSEISelLowering.cpp
Fixing this Windows build error:

..\lib\Target\Mips\MipsSEISelLowering.cpp(997) : error C2027: use of undefined type 'llvm::raw_ostream'

llvm-svn: 193696
2013-10-30 16:10:10 +00:00
Daniel Sanders
f38eb463ae [mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related tests
llvm-svn: 193695
2013-10-30 15:45:42 +00:00
Nuno Lopes
79e69672f4 make ConstantRange::signExtend() optimal
the case [x, INT_MIN) was not handled optimally

llvm-svn: 193694
2013-10-30 15:36:50 +00:00
Daniel Sanders
a305fb792d [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from normal IR (i.e. not intrinsics)
Also corrected the definition of the intrinsics for these instructions (the
result register is also the first operand), and added intrinsics for bsel and
bseli to clang (they already existed in the backend).

These four operations are mostly equivalent to bsel, and bseli (the difference
is which operand is tied to the result). As a result some of the tests changed
as described below.

bitwise.ll:
- bsel.v test adapted so that the mask is unknown at compile-time. This stops
  it emitting bmnzi.b instead of the intended bsel.v.
- The bseli.b test now tests the right thing. Namely the case when one of the
  values is an uimm8, rather than when the condition is a uimm8 (which is
  covered by bmnzi.b)

compare.ll:
- bsel.v tests now (correctly) emits bmnz.v instead of bsel.v because this
  is the same operation (see MSA.txt).

i8.ll
- CHECK-DAG-ized test.
- bmzi.b test now (correctly) emits equivalent bmnzi.b with swapped operands
  because this is the same operation (see MSA.txt).
- bseli.b still emits bseli.b though because the immediate makes it
  distinguishable from bmnzi.b.

vec.ll:
- CHECK-DAG-ized test.
- bmz.v tests now (correctly) emits bmnz.v with swapped operands (see
  MSA.txt).
- bsel.v tests now (correctly) emits bmnz.v with swapped operands (see
  MSA.txt).

llvm-svn: 193693
2013-10-30 15:20:38 +00:00
Chad Rosier
02e430c891 [AArch64] Add support for NEON scalar floating-point compare instructions.
llvm-svn: 193691
2013-10-30 15:19:37 +00:00
Cameron McInally
41fc626495 Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate vector extension class within the .td file.
llvm-svn: 193690
2013-10-30 15:19:10 +00:00
Howard Hinnant
49d7513e4d Rehash but don't grow when full of tombstones.
This problem was found and fixed by José Fonseca in March 2011 for
SmallPtrSet, committed r128566.  But as far as I can tell, all other
llvm hash tables retain the same problem:  the bucket count can grow
without bound while size() remains near constant by repeated
insert/erase cycles that tend to fill the container with tombstones. 
Here is a demo that has been reduced to a trivial case:

int
main()
{
   llvm::DenseSet<unsigned> d;
   for (unsigned i = 0; i < 0xFFFFFFF; ++i)
   {
       d.insert(i);
       d.erase(i);
   }
}

While the container size() never grows above 1, the bucket count grows
like this:

nb = 64
nb = 128
nb = 256
nb = 512
nb = 1024
nb = 2048
nb = 4096
nb = 8192
nb = 16384
nb = 32768
nb = 65536
nb = 131072
nb = 262144
nb = 524288
nb = 1048576
nb = 2097152
nb = 4194304
nb = 8388608
nb = 16777216
nb = 33554432
nb = 67108864
nb = 134217728
nb = 268435456

The above program currently consumes a few GB ram.  This patch brings
the memory consumption down by several orders of magnitude, and keeps
the bucket count at 64 for the above test.

llvm-svn: 193689
2013-10-30 15:10:54 +00:00
Daniel Sanders
b9f927b698 [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. not intrinsics)
This required correcting the definition of the bins[lr]i intrinsics because
the result is also the first operand.

It also required removing the (arbitrary) check for 32-bit immediates in
MipsSEDAGToDAGISel::selectVSplat().

Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d
because the constant is legalized into a ConstantPool. Similar things can
happen with binsri.d with more than 10 bits set in the mask. The resulting
code when this happens is correct but not optimal.

llvm-svn: 193687
2013-10-30 14:45:14 +00:00
Daniel Sanders
03fb352b8b [mips][msa] Combine binsri-like DAG of AND and OR into equivalent VSELECT
(or (and $a, $mask), (and $b, $inverse_mask)) => (vselect $mask, $a, $b).
where $mask is a constant splat. This allows bitwise operations to make use
of bsel.

It's also a stepping stone towards matching bins[lr], and bins[lr]i from
normal IR.

Two sets of similar tests have been added in this commit. The bsel_* functions
test the case where binsri cannot be used. The binsr_*_i functions will
start to use the binsri instruction in the next commit.

llvm-svn: 193682
2013-10-30 13:51:01 +00:00
Daniel Sanders
8c2c943784 [mips] MipsSETargetLowering now reports DAGCombiner changes when using -debug-only=mips-isel
No test since -debug output is intended for developers and not end-users.

llvm-svn: 193681
2013-10-30 13:31:27 +00:00
Daniel Sanders
4e28dd3570 [mips][msa] Added support for matching splat.[bhw] from normal IR (i.e. not intrinsics)
splat.d is implemented but this subtest is currently disabled. This is because
it is difficult to match the appropriate IR on MIPS32. There is a patch under
review that should help with this so I hope to enable the subtest soon.

llvm-svn: 193680
2013-10-30 13:07:44 +00:00
Juergen Ributzka
6c6240a024 Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."
Now Hexagon and SystemZ are not happy with it :-(

llvm-svn: 193677
2013-10-30 06:36:19 +00:00
Juergen Ributzka
746eeed753 SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.

This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask type for the given target. This mask has
usually the same size as the VSELECT return type (except for Intel KNL). Now the
type legalizer will split both VSELECT and SETCC.

This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.

Reviewed by Nadav

llvm-svn: 193676
2013-10-30 05:48:18 +00:00
Bill Wendling
3a00680150 Reformat Makefile. No other changes.
llvm-svn: 193675
2013-10-30 04:03:03 +00:00
Akira Hatanaka
49d18cd7b5 [mips] Compute stack alignment on the fly.
llvm-svn: 193673
2013-10-30 02:29:43 +00:00
Josh Magee
4b74743099 Reformat code with clang-format.
Differential Revision: http://llvm-reviews.chandlerc.com/D2057

llvm-svn: 193672
2013-10-30 02:25:14 +00:00
NAKAMURA Takumi
579bb406bf StackProtector.h: Fix trailing comments for doxygen. [-Wdocumentation]
s!//<!///<!

llvm-svn: 193669
2013-10-30 00:49:39 +00:00
NAKAMURA Takumi
7388ca6af3 Trailing whitespace in a comment line.
llvm-svn: 193668
2013-10-30 00:49:33 +00:00
Manman Ren
31c265a601 Debug Info: code clean up.
Use EmitLabelOffsetDifference for handling on darwin platform when
non-darwin platforms use EmitLabelPlusOffset.

Also fix a bug in EmitLabelOffsetDifference where the size is hard-coded
to 4 even though Size is passed in as an argument.

llvm-svn: 193660
2013-10-29 23:14:15 +00:00
Manman Ren
4c36c44e3f Debug Info: support for DW_FORM_ref_addr.
To support ref_addr, we calculate the section offset of a DIE (i.e. offset
of a DIE from beginning of the debug info section). The Offset field in DIE
is currently CU-relative. To calculate the section offset, we add a
DebugInfoOffset field in CompileUnit to store the offset of a CU from beginning
of the debug info section. We set the value in DwarfUnits::computeSizeAndOffset
for each CompileUnit.

A helper function DIE::getCompileUnit is added to return the CU DIE that
the input DIE belongs to. We also add a map CUDieMap in DwarfDebug to help
finding the CU for a given CU DIE.

For a cross-referenced DIE, we first find the CU DIE it belongs to with
getCompileUnit, then we use CUDieMap to get the corresponding CU for the CU DIE.
Adding the section offset of the CU with the CU-relative offset of a DIE gives
us the seciton offset of the DIE.

We correctly emit ref_addr with relocation using EmitLabelPlusOffset when
doesDwarfUseRelocationsAcrossSections is true.

This commit handles the emission of DW_FORM_ref_addr when we have an attribute
with FORM_ref_addr. A follow-on patch will start using ref_addr when adding a
DIEEntry. This commit will be tested and verified in the follow-on patch.

Reviewed off-list by Eric, Thanks.

llvm-svn: 193658
2013-10-29 22:57:10 +00:00
Manman Ren
cc5f3ed483 Debug Info: instead of calling addToContextOwner which constructs the context
after the DIE creation, we construct the context first.

Ensure that we create the context before we create a type so that we can add
the newly created type to the parent. Remove last use of addToContextOwner
now that it's not needed.

We use createAndAddDIE to wrap around "new DIE(". Now all shareable DIEs
should be added to their parents right after the creation.

Reviewed off-list by Eric, Thanks.

llvm-svn: 193657
2013-10-29 22:49:29 +00:00
Manman Ren
92012bba37 Struct byval cleanup: add helper functions to reduce code duplication.
Helper functions are added:
emitPostLd: emit a post-increment load operation with given size.
emitPostSt: emit a post-increment store operation with given size.

No functionality change.

llvm-svn: 193656
2013-10-29 22:27:32 +00:00
Josh Magee
5a6fad91a3 [stackprotector] Update the StackProtector pass to perform datalayout analysis.
This modifies the pass to classify every SSP-triggering AllocaInst according to
an SSPLayoutKind (LargeArray, SmallArray, AddrOf).  This analysis is collected
by the pass and made available for use, but no other pass uses it yet.

The next patch will make use of this analysis in PEI and StackSlot
passes.  The end goal is to support ssp-strong stack layout rules.

WIP.

Differential Revision: http://llvm-reviews.chandlerc.com/D1789

llvm-svn: 193653
2013-10-29 21:16:16 +00:00
Matt Arsenault
c0487521f8 Update comment
llvm-svn: 193651
2013-10-29 21:04:19 +00:00
Matt Arsenault
9c33ca743d Workaround MSVC 32-bit miscompile of getCondCodeAction.
Use 32-bit types for the array instead of 64. This should
generally be better anyway.

In optimized + assert builds, I saw a failure when a
cond code / type combination that is never set was loading
a non-zero value and hitting the != Promote assert.

It turns out when loading the 64-bit value to do the shift,
the assembly loads the 2 32-bit halves from non-consecutive
addresses. The address the second half of the loaded uint64_t
doesn't include the offset of the array in the struct. Instead
of being offset + 4, it's just + 4.

I'm not entirely sure why this wasn't observed before.
setCondCodeAction isn't heavily used by the in-tree targets,
and not with the higher valued vector SimpleValueTypes. Only
PPC is using one of the > 32 valued types, and that is probably
never used by anyone on a 32-bit MSVC compiled host.

I ran into this when upgrading LLVM versions, so I guess the
value loaded from the nonsense address happened to work out
before.

No test since I'm not really sure if / how it can be reproduced
with the current in tree targets, and it's not supposed to change
anything.

llvm-svn: 193650
2013-10-29 20:59:29 +00:00
Aaron Ballman
01baa8b3ef Removing a switch statement that contains only a default label. This resolves an MSVC warning. No functional change intended.
llvm-svn: 193649
2013-10-29 20:40:52 +00:00
Akira Hatanaka
85d9f22808 [mips] Align the stack to 16-bytes for mfp64.
llvm-svn: 193641
2013-10-29 19:29:03 +00:00
Rafael Espindola
0b68f0368b Remove declared but not implemented function.
llvm-svn: 193637
2013-10-29 18:31:14 +00:00
Benjamin Kramer
76237a9923 Fix common typos in the docs.
llvm-svn: 193632
2013-10-29 17:53:27 +00:00
Rafael Espindola
3e081640d5 Move getSymbol to TargetLoweringObjectFile.
This allows constructing a Mangler with just a TargetMachine.

llvm-svn: 193630
2013-10-29 17:28:26 +00:00
Manman Ren
2cb9a934ad Debug Info: clean up testing case.
Add a tag before the name attribute for readability. Use CHECK-NEXT
instead of CHECK-NOT followed by a CHECK. Add new lines to separate checking
of different DIEs.

llvm-svn: 193629
2013-10-29 17:27:14 +00:00
Rafael Espindola
68ddc56344 Add a helper getSymbol to AsmPrinter.
llvm-svn: 193627
2013-10-29 17:07:16 +00:00
Weiming Zhao
6ef9f618fc add test cases for frameaddr and returnaddr for aarch64
llvm-svn: 193626
2013-10-29 17:01:29 +00:00
Weiming Zhao
02f69c25b7 [AArch64] Implement FrameAddr and ReturnAddr
Fixes PR17690

llvm-svn: 193625
2013-10-29 17:00:25 +00:00
Amara Emerson
010fd3dfe5 [ARM] Make sure HasCRC is initialized to false in Subtarget.
llvm-svn: 193624
2013-10-29 16:54:52 +00:00
Zoran Jovanovic
929213f2ec Support for microMIPS jump instructions
llvm-svn: 193623
2013-10-29 16:38:59 +00:00
Tom Stellard
bf6d714576 R600/SI: Add compute support for CI v2
v2:
  - Fix LDS size calculation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 193621
2013-10-29 16:37:28 +00:00
Tom Stellard
6e8144c932 R600: Expand vector FSQRT ops
llvm-svn: 193620
2013-10-29 16:37:20 +00:00