RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 05:52:53 +02:00
Code Issues Projects Releases Wiki Activity
70,581 Commits 4 Branches 5 Tags 704 MiB
da1364d669
Commit Graph

4171 Commits

Author SHA1 Message Date
Bill Wendling
da1364d669 Generate a VTBL instruction instead of a series of loads and stores when we 
can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better
than this:

_shuf:
@ BB#0:       @ %entry
  push        {r4, r7, lr}
  add         r7, sp, #4
  sub         sp, #12
  mov         r4, sp
  bic         r4, r4, #7
  mov         sp, r4
  mov         r2, sp
  vmov        d16, r0, r1
  orr         r0, r2, #6
  orr         r3, r2, #7
  vst1.8      {d16[0]}, [r3]
  vst1.8      {d16[5]}, [r0]
  subs        r4, r7, #4
  orr         r0, r2, #5
  vst1.8      {d16[4]}, [r0]
  orr         r0, r2, #4
  vst1.8      {d16[4]}, [r0]
  orr         r0, r2, #3
  vst1.8      {d16[0]}, [r0]
  orr         r0, r2, #2
  vst1.8      {d16[2]}, [r0]
  orr         r0, r2, #1
  vst1.8      {d16[1]}, [r0]
  vst1.8      {d16[3]}, [r2]
  vldr.64     d16, [sp]
  vmov        r0, r1, d16
  mov         sp, r4
  pop         {r4, r7, pc}

The "illegal" testcase in vext.ll is no longer illegal.
<rdar://problem/9078775>

llvm-svn: 127630
 2011-03-14 23:02:38 +00:00
Eric Christopher
8180806e0f Fix this test up a bit. 
llvm-svn: 127621
 2011-03-14 21:05:21 +00:00
Evan Cheng
cb70b9e80b Minor optimization. sign-ext/anyext of undef is still undef. 
llvm-svn: 127598
 2011-03-14 18:15:55 +00:00
Justin Holewinski
a2f7c8557c PTX: Emit global arrays with proper sizes 
- Emit all arrays as type .b8 and proper sizes in bytes to conform
  to the output of nvcc

llvm-svn: 127584
 2011-03-14 15:40:11 +00:00
Justin Holewinski
995d10cfea PTX: Add support for sqrt/sin/cos intrinsics 
llvm-svn: 127578
 2011-03-14 14:09:33 +00:00
Che-Liang Chiou
6ff0aa8ab3 ptx: add set.p instruction and related changes to predicate execution 
llvm-svn: 127577
 2011-03-14 11:26:01 +00:00
Eric Christopher
392d8f7d08 Saving files before committing is overrated. 
Add a RUN line to this test.

llvm-svn: 127520
 2011-03-12 01:36:23 +00:00
Eric Christopher
80a45901e0 Sometimes isPredicable lies to us and tells us we don't need the operands. 
Go ahead and add them on when we might want to use them and let
later passes remove them.

Fixes rdar://9118569

llvm-svn: 127518
 2011-03-12 01:09:29 +00:00
Jim Grosbach
27eaca3e0d Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side- 
effect that we get proper instruction printing using the "pop" mnemonic for it.

llvm-svn: 127502
 2011-03-11 22:51:41 +00:00
Cameron Zwarich
bf5c9cd119 Roll r127459 back in: 
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

llvm-svn: 127498
 2011-03-11 21:52:04 +00:00
Cameron Zwarich
39a49276db Fix the GCC test suite issue exposed by r127477, which was caused by stack 
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.

llvm-svn: 127497
 2011-03-11 21:51:56 +00:00
Daniel Dunbar
a02706c889 Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get 
created from the", it broke some GCC test suite tests.

llvm-svn: 127477
 2011-03-11 19:30:30 +00:00
Cameron Zwarich
9ed726c151 Optimize trivial branches in CodeGenPrepare, which often get created from the 
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

llvm-svn: 127459
 2011-03-11 04:54:27 +00:00
Eric Christopher
46f43c9cce Change the x86 32-bit scheduler to register pressure and fix up the 
corresponding testcases back to the previous versions.

Fixes some performance regressions only seen on 32-bit.

llvm-svn: 127441
 2011-03-11 01:05:58 +00:00
Evan Cheng
d5d2d4a158 Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613. 
llvm-svn: 127440
 2011-03-11 00:48:56 +00:00
Jim Grosbach
1986d9ac8f Properly pseudo-ize MOVCCr and MOVCCs. 
llvm-svn: 127434
 2011-03-10 23:56:09 +00:00
Justin Holewinski
a26d2f782e PTX: Add preliminary support for floating-point divide and multiply-and-add 
llvm-svn: 127410
 2011-03-10 16:57:18 +00:00
Che-Liang Chiou
fc6c7ba9d5 ptx: add the rest of special registers of ISA version 2.0 
llvm-svn: 127397
 2011-03-10 04:05:57 +00:00
Stuart Hastings
fd42046d56 Revert 127359; it broke lencod. 
llvm-svn: 127382
 2011-03-10 00:25:53 +00:00
Daniel Dunbar
11a8b6c4ff Revert "Re-enable test and hope to silence the buildbots", still broken. 
llvm-svn: 127369
 2011-03-09 22:48:46 +00:00
Benjamin Kramer
8313cf1cf4 Fix mistyped CHECK lines. 
llvm-svn: 127366
 2011-03-09 22:07:31 +00:00
Stuart Hastings
6c99b422b1 Tweak test to work on Linux. 
llvm-svn: 127364
 2011-03-09 21:35:10 +00:00
Stuart Hastings
5c555821bb Disable this test temporarily to reduce BuildBot complaints. 
llvm-svn: 127363
 2011-03-09 21:33:47 +00:00
Stuart Hastings
61f9a3dab2 X86 byval copies no longer always_inline. <rdar://problem/8706628> 
llvm-svn: 127359
 2011-03-09 21:10:30 +00:00
Bruno Cardoso Lopes
f34376b0e1 Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka 
llvm-svn: 127358
 2011-03-09 21:05:32 +00:00
Bruno Cardoso Lopes
51df3638f8 Re-enable test and hope to silence the buildbots 
llvm-svn: 127357
 2011-03-09 21:00:16 +00:00
Bruno Cardoso Lopes
64f0169989 try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka. 
llvm-svn: 127356
 2011-03-09 20:59:05 +00:00
Jakob Stoklund Olesen
4d0c9d0af7 Make physreg coalescing independent on the number of uses of the virtual register. 
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.

The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.

Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.

llvm-svn: 127351
 2011-03-09 19:27:06 +00:00
Jakob Stoklund Olesen
10d5d5d25c Delete a test case that is very sensitive to coalescer behavior. 
The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.

llvm-svn: 127350
 2011-03-09 19:27:02 +00:00
Bruno Cardoso Lopes
88bef593d8 Improve varags handling, with testcases. Patch by Sasa Stankovic 
llvm-svn: 127349
 2011-03-09 19:22:22 +00:00
Andrew Trick
0b0002dfba This test case should work with list-ilp or list-burr. 
llvm-svn: 127348
 2011-03-09 19:17:10 +00:00
NAKAMURA Takumi
fe84f8672a Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4. 
llvm-svn: 127328
 2011-03-09 11:33:15 +00:00
Eric Christopher
3ffd0d2f15 Fix testcase. 
llvm-svn: 127298
 2011-03-09 00:41:41 +00:00
Benjamin Kramer
c3944efb6f Strip cruft. 
llvm-svn: 127269
 2011-03-08 20:19:10 +00:00
Eric Christopher
1be4747d53 Add a testcase for r127263. 
llvm-svn: 127266
 2011-03-08 19:49:15 +00:00
Benjamin Kramer
d5782492c8 X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1. 
Found by inspection.

llvm-svn: 127247
 2011-03-08 15:20:20 +00:00
Justin Holewinski
d7426856e9 PTX: Add intrinsic support for ntid, ctaid, and nctaid registers 
llvm-svn: 127246
 2011-03-08 14:10:18 +00:00
Eric Christopher
72d7cc25f3 Turn on list-ilp scheduling by default on x86 and x86-64, fix up 
testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208
 2011-03-08 02:42:25 +00:00
Bob Wilson
f8c4d1ded9 Fix a compiler crash where a Glue value had multiple uses. Radar 9049552. 
llvm-svn: 127198
 2011-03-08 01:17:20 +00:00
Che-Liang Chiou
15aba09539 ptx: add basic intrinsic support 
llvm-svn: 127084
 2011-03-05 14:17:37 +00:00
NAKAMURA Takumi
ef9dd6b5db test/CodeGen/X86/vec_cast.ll: [PR8311] Add explicit -mtriple=x86_64-linux and -mtriple=x86_64-win32. Thanks to Nadav, it might be fixed in r126424. 
llvm-svn: 127060
 2011-03-05 02:38:02 +00:00
Bruno Cardoso Lopes
52c64a2eb3 Improve div/rem node handling on mips. Patch by Akira Hatanaka 
llvm-svn: 127034
 2011-03-04 21:03:24 +00:00
Bruno Cardoso Lopes
1deaf83a77 Add testcase for r127032 
llvm-svn: 127033
 2011-03-04 20:48:39 +00:00
Dan Gohman
a8389213a0 When decling to reuse existing expressions that involve casts, ignore 
bitcasts, which are really no-ops here. This fixes slowdowns on
MultiSource/Applications/aha and others.

llvm-svn: 127031
 2011-03-04 20:46:46 +00:00
Joerg Sonnenberger
5f2f5fa638 Be nice to Xcore and the XMOS assembler and avoid quoting section names 
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
 2011-03-04 20:03:14 +00:00
Bruno Cardoso Lopes
99619e5bef Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka 
llvm-svn: 127027
 2011-03-04 20:01:52 +00:00
Devang Patel
3efe510847 XFAIL for all. These tests are darwin specific anyway. 
llvm-svn: 127022
 2011-03-04 19:38:10 +00:00
Devang Patel
23ee9fdba3 Disable ARMGlobalMerge on darwin. The debugger is not yet able to extract individual variable's info from merged global. 
llvm-svn: 127019
 2011-03-04 19:11:05 +00:00
Kalle Raiskila
6e33c92ffb Allow vector shifts (shl,lshr,ashr) on SPU. 
There was a previous implementation with patterns that would 
have matched e.g. 
	shl <v4i32> <i32>,
but this is not valid LLVM IR so they never were selected.

llvm-svn: 126998
 2011-03-04 13:19:18 +00:00
Kalle Raiskila
72cfda1a29 Allow load from constant on SPU. 
A 'load <4 x i32>* null' crashes llc before this fix.

llvm-svn: 126995
 2011-03-04 12:00:11 +00:00