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Author SHA1 Message Date
Bob Wilson
da87e36649 Remove old code to strip out unwanted PPC slices for Apple llvmCore. 
llvm-svn: 154706
 2012-04-13 22:58:53 +00:00
Richard Smith
d5004a79d9 Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y. 
llvm-svn: 154705
 2012-04-13 22:47:00 +00:00
Sirish Pande
fc7e619733 Remove iostream from New Value Jump. 
llvm-svn: 154703
 2012-04-13 21:01:35 +00:00
Hal Finkel
12b4c41203 Add support to BBVectorize for vectorizing selects. 
llvm-svn: 154700
 2012-04-13 20:45:45 +00:00
Sirish Pande
6c3fc0ca53 Add support for Hexagon Architectural feature, New Value Jump. 
llvm-svn: 154696
 2012-04-13 20:22:31 +00:00
Sirish Pande
01b53a9593 Pass to replace tranfer/copy instructions into combine instruction where possible. 
llvm-svn: 154695
 2012-04-13 20:22:19 +00:00
Benjamin Kramer
191fe619aa Reduce malloc traffic in DwarfAccelTable 
- Don't copy offsets into HashData, the underlying vector won't change once the table is finalized.
- Allocate HashData and HashDataContents in a BumpPtrAllocator.
- Allocate string map entries in the same allocator.
- Random cleanups.

llvm-svn: 154694
 2012-04-13 20:06:17 +00:00
Tony Linthicum
053413c3e8 Support for Hexagon backend. 
llvm-svn: 154692
 2012-04-13 19:09:44 +00:00
Tony Linthicum
36d03a30fa Support for Hexagon backend. 
llvm-svn: 154691
 2012-04-13 19:09:18 +00:00
Evan Cheng
3499593c7e On Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly. 
llvm-svn: 154689
 2012-04-13 18:59:28 +00:00
Dan Gohman
0387e6b701 Add some comments, and fix a few places that missed setting Changed. 
llvm-svn: 154687
 2012-04-13 18:57:48 +00:00
Kevin Enderby
84e97c7df2 For ARM disassembly only print 32 unsigned bits for the address of branch 
targets so if the branch target has the high bit set it does not get printed as:
	 beq     0xffffffff8008c404

llvm-svn: 154685
 2012-04-13 18:46:37 +00:00
Dan Gohman
d5743c7fd0 Consider ObjC runtime calls objc_storeWeak and others which make a copy of 
their argument as "escape" points for objc_retainBlock optimization.
This fixes rdar://11229925.

llvm-svn: 154682
 2012-04-13 18:28:58 +00:00
Hal Finkel
f8611de2a6 By default, use Early-CSE instead of GVN for vectorization cleanup. 
As has been suggested by Duncan and others, Early-CSE and GVN should
do similar redundancy elimination, but Early-CSE is much less expensive.
Most of my autovectorization benchmarks show a performance regresion, but
all of these are < 0.1%, and so I think that it is still worth using
the less expensive pass.

llvm-svn: 154673
 2012-04-13 17:15:33 +00:00
Sylvestre Ledru
53db93eead Catch the Python exception when subprocess.Popen is failing. 
For example, if llc cannot be found, the full python stacktrace is displayed
and no interesting information are provided.
+ fail the process when an exception occurs

llvm-svn: 154665
 2012-04-13 11:22:18 +00:00
Benjamin Kramer
9087b1f54a Remove unused variable. 
llvm-svn: 154661
 2012-04-13 08:09:12 +00:00
Craig Topper
7c0af9b204 Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds. 
llvm-svn: 154660
 2012-04-13 06:38:11 +00:00
Craig Topper
da52eeedcb Fix target specific intrinsic handling to adjust intrinsic number before doing attribute table lookup. Also fix attribute table lookup to handle 'invalid' intrinsic correctly. Fixes PR12542 
llvm-svn: 154658
 2012-04-13 06:14:57 +00:00
Craig Topper
79c030996a Remove getElfArchType from ELF.h. It's only used in ELFObjectFile.cpp and there's already a copy there. ELF.h was hiding the one there and causing an unused function warning. 
llvm-svn: 154657
 2012-04-13 05:58:19 +00:00
Dan Gohman
81ac0c921f Use the new Use-aware dominates method to apply the objc runtime 
library return value optimization for phi uses. Even when the
phi itself is not dominated, the specific use may be dominated.

llvm-svn: 154647
 2012-04-13 01:08:28 +00:00
Bill Wendling
8659a23f4a Code-gen may inject code into the IR before it emits the ASM. The linker 
obviously cannot know that this code is present, let alone used. So prevent the
internalize pass from internalizing those global values which code-gen may
insert.

llvm-svn: 154645
 2012-04-13 01:06:27 +00:00
Dan Gohman
6a5b02f8ee Don't move objc_autorelease calls past autorelease pool boundaries when 
optimizing autorelease calls on phi nodes with null operands.
This fixes rdar://11207070.

llvm-svn: 154642
 2012-04-13 00:59:57 +00:00
Dan Gohman
cde3a46455 Def here is an Instruction, so !isa<Instruction>(Def) is always false, 
as Eli noticed.

llvm-svn: 154641
 2012-04-13 00:50:57 +00:00
Dan Gohman
c0a906405e Add forms of dominates and isReachableFromEntry that accept a Use 
directly instead of a user Instruction. This allows them to test
whether a def dominates a particular operand if the user instruction
is a PHI.

llvm-svn: 154631
 2012-04-12 23:31:46 +00:00
Kevin Enderby
5118ccf4c7 Fix a few more places in the ARM disassembler so that branches get 
symbolic operands added when using the C disassembler API.

llvm-svn: 154628
 2012-04-12 23:13:34 +00:00
Ted Kremenek
de82fd5282 Update CMake build. 
llvm-svn: 154622
 2012-04-12 22:15:23 +00:00
Evandro Menezes
dcd4bebf98 Hexagon: fix CMake error. 
llvm-svn: 154620
 2012-04-12 21:44:58 +00:00
Sirish Pande
04c82d35b9 Disable Hexagon test temporarily. 
There is an assert at line 558 in ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA).
This assert needs to addressed for post RA scheduler. Until that assert is addressed,
any passes that uses post ra scheduler will fail. So, I am temporarily disabling the
hexagon tests until that fix is in.

The assert is as follows:
    assert(!MI->isTerminator() && !MI->isLabel() &&
               "Cannot schedule terminators or labels!");

llvm-svn: 154617
 2012-04-12 21:06:54 +00:00
Sirish Pande
ff74c0b4e8 HexagonPacketizer patch. 
llvm-svn: 154616
 2012-04-12 21:06:38 +00:00
Preston Gurd
6e9bcca355 This patch improves the MCJIT runtime dynamic loader by adding new handling 
of zero-initialized sections, virtual sections and common symbols
and preventing the loading of sections which are not required for
execution such as debug information.

Patch by Andy Kaylor!

llvm-svn: 154610
 2012-04-12 20:13:57 +00:00
Evan Cheng
d9958dcd91 Generalize r153635 to deal with TokenFactor chains; also clean up the logic and fix the tests. rdar://11069732, rdar://11236106 
llvm-svn: 154604
 2012-04-12 19:14:21 +00:00
Evandro Menezes
f199e6b61f Hexagon: enable assembler output through the MC layer. 
llvm-svn: 154597
 2012-04-12 17:55:53 +00:00
Anshuman Dasgupta
e3ba827561 Add DFA generator for VLIW targets to ReleaseNotes.html and CREDITS.TXT. 
llvm-svn: 154590
 2012-04-12 15:17:35 +00:00
Benjamin Kramer
c672ae3ee2 Remove README entry obsoleted by register masks. 
llvm-svn: 154588
 2012-04-12 12:47:29 +00:00
Jean-Daniel Dupas
fb960f6837 Remove a remaining reference to the obsolete C backend in configure 
llvm-svn: 154587
 2012-04-12 12:02:39 +00:00
Craig Topper
448790d566 Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions. 
llvm-svn: 154580
 2012-04-12 07:23:00 +00:00
Jim Grosbach
ceb845983c ARM 'adr' fixups don't need the interworking addend tweaking. 
They reference the PC directly, so things work properly that way.

rdar://11231229

llvm-svn: 154576
 2012-04-12 01:19:35 +00:00
Akira Hatanaka
103a1edc4d Revert changes that were accidentally committed. 
llvm-svn: 154563
 2012-04-11 23:19:55 +00:00
Akira Hatanaka
991d556243 Fix string that is being checked. 
llvm-svn: 154547
 2012-04-11 23:11:33 +00:00
Akira Hatanaka
48dbb62cb1 Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user, 
otherwise expand FNEG during legalization.

llvm-svn: 154546
 2012-04-11 22:59:08 +00:00
Akira Hatanaka
11a442d515 Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user. 
Invalid operation is signaled if the operand of these instructions is NaN.

llvm-svn: 154545
 2012-04-11 22:49:04 +00:00
Kevin Enderby
64c95fb56a Fixed a case of ARM disassembly getting an assert on a bad encoding 
of a VST instruction.

llvm-svn: 154544
 2012-04-11 22:40:17 +00:00
Akira Hatanaka
6636922675 Fix bugs in lowering of FCOPYSIGN nodes. 
- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.

Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).

llvm-svn: 154540
 2012-04-11 22:13:04 +00:00
Jim Grosbach
8327980405 Remove incorrect comment. 
llvm-svn: 154533
 2012-04-11 21:09:54 +00:00
Jim Grosbach
80c9f4d837 Tidy up. Remove hard tab characters. 
llvm-svn: 154532
 2012-04-11 21:02:33 +00:00
Jim Grosbach
51aa44347a Tidy up. Whitespace. 
llvm-svn: 154531
 2012-04-11 21:02:30 +00:00
Benjamin Kramer
7341ba24fa Fix pasto. 
llvm-svn: 154527
 2012-04-11 20:20:37 +00:00
Chad Rosier
b41586c8e1 Typo. 
llvm-svn: 154522
 2012-04-11 19:21:58 +00:00
Andrew Trick
6d7aff8241 TableGen's regpressure: emit per-registerclass weight limits. 
llvm-svn: 154518
 2012-04-11 18:16:28 +00:00
Jim Grosbach
86b5cd7421 ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction. 
While there is an encoding for it in VUZP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11222366

llvm-svn: 154511
 2012-04-11 17:40:18 +00:00