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1088 Commits

Author SHA1 Message Date
Chris Lattner
8e628685d9 Fix compilation on gcc 2.96 
llvm-svn: 5116
 2002-12-23 23:46:55 +00:00
Chris Lattner
285f1458f0 Add definition for the bswap instruction 
*** FIX: the encoding of the SUB instruction

llvm-svn: 5115
 2002-12-23 23:46:31 +00:00
Chris Lattner
9e13907a4f Add support for the bswap instruction 
llvm-svn: 5114
 2002-12-23 23:46:00 +00:00
Chris Lattner
2dc1b58c11 Fix warning 
llvm-svn: 5109
 2002-12-20 04:13:28 +00:00
Chris Lattner
f8876bb77d CBW doesn't modify AL 
llvm-svn: 5108
 2002-12-20 04:13:11 +00:00
Chris Lattner
d838414ec1 fix warning 
llvm-svn: 5107
 2002-12-20 04:12:48 +00:00
Chris Lattner
c21fd773b8 Don't force setCC instructions into AL 
llvm-svn: 5104
 2002-12-18 01:44:31 +00:00
Chris Lattner
b1c74bb421 Add comments, switch uses/defs to match InstrInfo.def file 
llvm-svn: 5102
 2002-12-18 01:05:54 +00:00
Chris Lattner
0607e84008 Add reg clobber list for direct calls 
Represent empty use/def list as a null pointer

llvm-svn: 5101
 2002-12-18 01:05:31 +00:00
Chris Lattner
0b617b0e1d Update to use new interface for register info 
llvm-svn: 5098
 2002-12-17 04:19:17 +00:00
Chris Lattner
dbca3de031 Round number of bytes allocated on the stack up to a multiple of 4 so that the 
stack remains aligned

llvm-svn: 5095
 2002-12-17 03:15:26 +00:00
Chris Lattner
305d72e965 Local register allocator is now stable enough for use, it passes all tests 
llvm-svn: 5094
 2002-12-17 02:51:15 +00:00
Chris Lattner
4a60d804c2 Register allocator is responsible for spilling callee saved regs 
llvm-svn: 5092
 2002-12-17 02:48:57 +00:00
Chris Lattner
c7e6dd2341 Build add instructions of the correct form! 
llvm-svn: 5090
 2002-12-16 23:36:57 +00:00
Chris Lattner
f5da16f2f6 Two fixes: 
* Only load incoming arguments into virtual registers once at the
    beginning of the function
  * Assign different virtual registers to each reference to constants/globals

llvm-svn: 5088
 2002-12-16 22:54:46 +00:00
Chris Lattner
9d64c1e53a Fix prolog/epilog in the presence of alloca 
llvm-svn: 5087
 2002-12-16 22:29:30 +00:00
Chris Lattner
2e17697e81 Make sure stack manipulation refers to ESP the right number of times 
llvm-svn: 5086
 2002-12-16 22:29:06 +00:00
Chris Lattner
de4d89ef9f Add some special cases to make common getelementptr cases easier to read/faster 
llvm-svn: 5084
 2002-12-16 19:32:50 +00:00
Chris Lattner
4576429b7c Finish implementation of alias list impl 
llvm-svn: 5083
 2002-12-16 19:31:48 +00:00
Chris Lattner
4d0ca4b442 Add mechanism to select register allocator to use 
llvm-svn: 5079
 2002-12-16 16:15:51 +00:00
Chris Lattner
b833239d6b Try #2 to get alias set stuff to work 
llvm-svn: 5077
 2002-12-16 16:14:51 +00:00
Chris Lattner
eae93bdb93 Add comments 
llvm-svn: 5076
 2002-12-16 15:57:44 +00:00
Chris Lattner
fd065b6b1a Add info about register aliases, add prototype for createLocalRegisterAllocator 
llvm-svn: 5075
 2002-12-16 15:55:51 +00:00
Chris Lattner
b413ce63d5 Add info about register file aliasing 
llvm-svn: 5074
 2002-12-16 15:55:25 +00:00
Chris Lattner
e6ad4941fc Add information about register file aliasing 
llvm-svn: 5073
 2002-12-16 15:54:59 +00:00
Chris Lattner
68af8985f4 Add call clobber info 
llvm-svn: 5072
 2002-12-16 15:54:42 +00:00
Chris Lattner
566fb4c7b7 Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator 
llvm-svn: 5071
 2002-12-16 14:38:13 +00:00
Brian Gaeke
e4da1d5de6 brg 
Fix some bugs in use of MBB vs. BB and iterators that are invalidated before
we use them.

Reference targetClass by enum name, not by number.

llvm-svn: 5069
 2002-12-16 04:23:29 +00:00
Chris Lattner
4964e751cd Correct the setting of Def flags on registers that are modified! 
llvm-svn: 5065
 2002-12-15 22:38:47 +00:00
Chris Lattner
ea2d8ad746 Give passes nice names! 
llvm-svn: 5059
 2002-12-15 21:13:40 +00:00
Chris Lattner
4214ac384a Simplify interfaces used by regalloc to insert code 
llvm-svn: 5052
 2002-12-15 20:06:35 +00:00
Chris Lattner
ce23fdeee2 Changes to make new TargetRegisterClass interface. 
llvm-svn: 5050
 2002-12-15 19:29:34 +00:00
Chris Lattner
caa325a559 * Simplify TargetRegisterClass implementations 
* Change regclass iterators to use an extra level of pointers

llvm-svn: 5047
 2002-12-15 18:40:36 +00:00
Chris Lattner
50d99540cf Add support to cast from a bool type 
Add support for boolean constants
add getClassB method

llvm-svn: 5034
 2002-12-15 08:02:15 +00:00
Chris Lattner
534876a78c Use MachineOperand::isFoo methods instead of our own global functions 
llvm-svn: 5033
 2002-12-15 08:01:39 +00:00
Chris Lattner
bd4d66147f Implement indirect function calls 
llvm-svn: 5024
 2002-12-13 14:13:27 +00:00
Misha Brukman
3587ffc7b1 Make function code generation printing debug-only. 
llvm-svn: 5023
 2002-12-13 13:16:14 +00:00
Chris Lattner
c7db3e855f Fix bork in doMultiply 
llvm-svn: 5021
 2002-12-13 13:07:42 +00:00
Chris Lattner
7d5d4f7ab4 Add sanity checks 
llvm-svn: 5020
 2002-12-13 13:04:04 +00:00
Misha Brukman
2f2cf00a9f Cleaned up the code: factored out switch/case into a separate function, put 
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.

llvm-svn: 5017
 2002-12-13 12:00:06 +00:00
Chris Lattner
de2f97c5e6 Insert phi code at top of block 
llvm-svn: 5015
 2002-12-13 11:52:34 +00:00
Brian Gaeke
460fe53768 lib/Target/X86/InstSelectSimple.cpp: 
The MachineBasicBlock variable name patrol hereby fines Chris Lattner
one bag of nachos, for shadowing global names while his license to do so
was under suspension.

llvm-svn: 5014
 2002-12-13 11:39:18 +00:00
Chris Lattner
2c2a5f128e Implement cast bool to X 
llvm-svn: 5012
 2002-12-13 11:31:59 +00:00
Brian Gaeke
b101130d19 Rename all BMI MachineBasicBlock operands to MBB. 
Try to mess around with emitGEPOperation's elementSizeReg to make it work,
again.

llvm-svn: 5011
 2002-12-13 11:22:48 +00:00
Chris Lattner
cad7e99ea1 Finish up iterator stuph 
llvm-svn: 5009
 2002-12-13 10:50:40 +00:00
Misha Brukman
b6fb990276 Treat longs as ints => pretend they're all 32-bit values and squeeze them into 
32-bit registers.

llvm-svn: 5008
 2002-12-13 10:43:09 +00:00
Chris Lattner
416a9ca8f1 Code gen phi's correctly 
llvm-svn: 5004
 2002-12-13 10:09:43 +00:00
Chris Lattner
505ace489e Print X86 PHI nodes in a sane manner 
llvm-svn: 5003
 2002-12-13 09:59:26 +00:00
Misha Brukman
fb02408496 Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to 
PHI nodes.

llvm-svn: 5001
 2002-12-13 09:54:12 +00:00
Brian Gaeke
34ad176df5 lib/Target/X86/InstSelectSimple.cpp: Start counting arguments with 2, 
because arguments start two stack slots off of EBP. Break out of the
 for loop once the argument is found. Increment the counter at the end
 of the loop instead of the beginning. Use addRegOffset and compute
 the scale * index part at compile time instead of using the fancy
 load instruction. Just because an instruction set has wacky addressing
 modes doesn't mean we ought to use them (at least, if you believe Dave
 Patterson).

lib/Target/X86/X86InstrBuilder.h: Add some comments.

test/Regression/Jello/test-loadstore.ll:  Let main return int 0.

llvm-svn: 4999
 2002-12-13 09:28:50 +00:00
Brian Gaeke
5da234a1d7 InstSelectSimple.cpp: Give promote32 a comment. Add initial 
implementation of getReg() for arguments.

MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
 displacement (whew!) due to Chris.

Printer.cpp: Fix printing out index and scale in memory references.

llvm-svn: 4998
 2002-12-13 07:56:18 +00:00
Chris Lattner
9e7b73b55f Implement getelementptr constant exprs 
Implement ConstantPointerRefs
Treat long/ulongs as if they were integers.  A hack, but an effective one

llvm-svn: 4995
 2002-12-13 06:56:29 +00:00
Brian Gaeke
641c6fa60a brg 
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
 Add comments that mention how we are failing to implement malloc/free.
 Add initial implementation of visitAllocaInst.

X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
 Add LowerAllocations pass before instruction selection.

jello/Makefile: Add scalaropts.a.

llvm-svn: 4994
 2002-12-13 06:46:31 +00:00
Chris Lattner
62454d83f0 Emit the right form of mod/rm mod field 
llvm-svn: 4986
 2002-12-13 05:05:05 +00:00
Chris Lattner
7ec625a157 Nicify a bit 
llvm-svn: 4985
 2002-12-13 05:04:37 +00:00
Chris Lattner
4cc9894c71 Fix encoding of CBW instruction 
llvm-svn: 4983
 2002-12-13 04:41:31 +00:00
Misha Brukman
20c9c61c6d Moves now select correct opcode based on the data size. 
llvm-svn: 4981
 2002-12-13 04:24:53 +00:00
Chris Lattner
10f305cec7 Remove extranous #include 
llvm-svn: 4980
 2002-12-13 04:12:24 +00:00
Chris Lattner
723ca2522d Rename MemArg* to Arg* 
llvm-svn: 4979
 2002-12-13 03:51:55 +00:00
Chris Lattner
b698cd8236 Make mem size an assert 
Add mem size flags to all instructions using an imm

llvm-svn: 4978
 2002-12-13 03:50:13 +00:00
Misha Brukman
6a5788bb6f This is supposed to provide correct size for datatypes. Supposedly. 
llvm-svn: 4977
 2002-12-13 02:13:15 +00:00
Misha Brukman
bf2857eb5c Added the flag to mark instructions which are really 2-address instructions in 
X86, but would be 3-address in any normail architecture.

llvm-svn: 4974
 2002-12-12 23:19:11 +00:00
Brian Gaeke
9b38597288 This checkin is brought to you by the brian gaeke allnighter fund. 
(lib/Target/X86) InstSelectSimple.cpp:
 Include llvm/DerivedTypes.h and iostream.
 Refactor visitMul out into a wrapper around doMultiply(), so that we
  can do multiplications on temporary values when we are doing
  getelementptrs.
 Refactor part of getReg out into makeAnotherReg, so that we can create
  registers willy-nilly to hold temporary values, when we are doing
  getelementptrs.
 Add stub implementations of visitMallocInst and visitAllocaInst.
 Add initial implementation of visitGetElementPtrInst.
 In copyConstantToRegister:
  We throw a *lot* of our asserts here. So, when we want to throw an
   assert, print out to stderr whatever expr or whatever constant made
   us barf.
  Support copying ConstantPointerNull to register, using a move immediate
   of zero.
 Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
  of the numbers in the other instruction names. All uses modified.
 Teach visitCallInst to extract byte- and short-class return values
  from subregs of EAX.  Add a FIXME note about how we would do it for
  float-class return values.
 Add a FIXME note about how we would cast float to int and back.

X86InstrInfo.def:
 Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
  of the numbers in the other instruction names. All uses modified.

(tools/jello) GlobalVars.cpp:
 Include iostream.
 If we have to emit a floating-point constant to memory, gamble and use
  the same method as for ints.
 If we have to emit a ConstantPointerNull to memory, try using a "void *"
  and "NULL".
 Otherwise, if we are going to throw an assert, print out whatever constant
  made us barf, first.

llvm-svn: 4973
 2002-12-12 15:33:40 +00:00
Brian Gaeke
250d5a3e95 Implement a lot of cast functionality (no FP or 64) 
llvm-svn: 4944
 2002-12-06 10:49:33 +00:00
Brian Gaeke
dbc34a2a95 Target/X86/Printer.cpp: Add sizePtr function, and use it instead of 
" <SIZE> PTR " string when emitting assembly.

Target/X86/X86InstrInfo.def: Tidy up a bit:
 Squashed everything down to 118 chars wide, wrapping lines so that
 comment is at the same point on each line. Rename "NoImpRegs" as
 "NoIR". (most instructions have NoImpRegs twice on a line, so this
 saves 10 columns).

 Also, annotate various instructions with flags for size of memory operand.
  (MemArg16, MemArg32, MemArg64, etc.)

Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
 (MemArg16, MemArg32, MemArg64, etc.)

llvm-svn: 4932
 2002-12-05 08:30:40 +00:00
Misha Brukman
7dc6877ce2 Implemented functions for emitting prologues and epilogues; 
removed EBP from the list of callee-saved registers (it isn't one).

llvm-svn: 4929
 2002-12-04 23:57:03 +00:00
Misha Brukman
e93c7f9d32 Added push and pop instructions. 
llvm-svn: 4928
 2002-12-04 23:56:26 +00:00
Chris Lattner
70aa4e41ce Fix handling of function calls that return void 
llvm-svn: 4925
 2002-12-04 23:50:28 +00:00
Chris Lattner
b71d7b4dab Implement initial support for return values from call instructions 
llvm-svn: 4924
 2002-12-04 23:45:28 +00:00
Misha Brukman
f8634130dc Adjust the stack pointer after a function call, proportional to the number of 
arguments pushed onto the stack.

llvm-svn: 4922
 2002-12-04 19:22:53 +00:00
Misha Brukman
cf80ad35f3 Added instructions to add/subtract imm32 to/from a reg32. 
llvm-svn: 4921
 2002-12-04 19:15:22 +00:00
Chris Lattner
96edaabdb2 Fix bogus assertion failures 
llvm-svn: 4919
 2002-12-04 17:32:52 +00:00
Chris Lattner
b538ae0dba Avoid bad assertion 
llvm-svn: 4918
 2002-12-04 17:28:40 +00:00
Chris Lattner
feeb16616e Remove think-o assertion 
llvm-svn: 4917
 2002-12-04 17:18:30 +00:00
Chris Lattner
e21cfc9b6c Avoid crashing on Arguments, just silently miscompile 
llvm-svn: 4916
 2002-12-04 17:15:34 +00:00
Misha Brukman
101076f586 storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value 
instead of by reference, since they return the modified iterator.

llvm-svn: 4914
 2002-12-04 17:14:13 +00:00
Misha Brukman
6e1c4851ea Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since 
it is target-independent.

llvm-svn: 4911
 2002-12-04 16:47:04 +00:00
Chris Lattner
29f4c79239 Add a "Lazy Function Resolution in Jello" section 
Remove some todo's

llvm-svn: 4910
 2002-12-04 16:12:54 +00:00
Chris Lattner
6c1a85e870 Fix a bug I introduced in a previous change 
llvm-svn: 4909
 2002-12-04 06:56:56 +00:00
Chris Lattner
73ac28801e Add support for referencing global variables/functions 
llvm-svn: 4907
 2002-12-04 06:45:19 +00:00
Misha Brukman
5639a6279e Added support for callee- and caller-save registers. 
llvm-svn: 4897
 2002-12-03 23:11:21 +00:00
Chris Lattner
8cadeb99ab Fix broken ret opcode, grr... 
llvm-svn: 4895
 2002-12-03 22:50:02 +00:00
Chris Lattner
a31be4e958 Fix instsel for calls 
llvm-svn: 4891
 2002-12-03 20:30:12 +00:00
Chris Lattner
5629544811 Fix the build 
llvm-svn: 4884
 2002-12-03 18:15:59 +00:00
Brian Gaeke
c850694f49 brg 
Add support for cast ... to bool in visitCastInst (it's a start, anyways...)

llvm-svn: 4883
 2002-12-03 07:36:03 +00:00
Chris Lattner
5f0614914e Split the machine code emitter completely out of the printer 
llvm-svn: 4882
 2002-12-03 06:34:06 +00:00
Chris Lattner
99e7784512 * Move information about Implicit Defs/Uses into X86InstrInfo.def. 
* Expose information about implicit defs/uses of register through the
  MachineInstrInfo.h file.

llvm-svn: 4877
 2002-12-03 05:42:53 +00:00
Brian Gaeke
48759a6af9 brg 
X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.

llvm-svn: 4874
 2002-12-03 00:51:09 +00:00
Chris Lattner
e66d3e90ce More support for machine code emission: raw instructions 
llvm-svn: 4872
 2002-12-02 21:56:18 +00:00
Chris Lattner
c1d0d21002 Expose explicit type 
llvm-svn: 4871
 2002-12-02 21:50:41 +00:00
Chris Lattner
f48a330fd8 Start implementing MachineCodeEmitter 
llvm-svn: 4870
 2002-12-02 21:44:34 +00:00
Chris Lattner
cd65711437 Eliminate OtherFrm 
llvm-svn: 4868
 2002-12-02 21:40:58 +00:00
Chris Lattner
e8640c05cc Remove comment 
Remove handling of OtherFrm

llvm-svn: 4867
 2002-12-02 21:40:46 +00:00
Chris Lattner
8227eea4fe Initial support for machine code emission 
llvm-svn: 4866
 2002-12-02 21:24:12 +00:00
Misha Brukman
0b310e3359 Fix order of operands on a store from reg to [reg+offset]. 
llvm-svn: 4857
 2002-12-02 21:10:35 +00:00
Chris Lattner
89de3f1fc5 Add rawfrm flags 
llvm-svn: 4841
 2002-12-01 23:25:59 +00:00
Chris Lattner
d7ae75d381 Don't add implicit regs 
llvm-svn: 4840
 2002-12-01 23:24:58 +00:00
Brian Gaeke
1700fefdeb brg 
InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
  from visitReturnInst() to new method, promote32().
 Use it in both visitReturnInst() and visitCallInst().

llvm-svn: 4839
 2002-11-30 11:57:28 +00:00
Brian Gaeke
b6fc905124 brg 
InstSelectSimple.cpp: First draft of visitCallInst method, handling
 int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
 PUSH with 32-bit reg arg.

llvm-svn: 4838
 2002-11-29 12:01:58 +00:00
Brian Gaeke
d944e15946 brg 
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
 calls and casts.

llvm-svn: 4832
 2002-11-26 10:43:30 +00:00
Misha Brukman
3ba057b8c4 Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out 
instructions correctly.

llvm-svn: 4830
 2002-11-22 23:15:27 +00:00
Misha Brukman
a301022017 Enable the register allocator pass. 
llvm-svn: 4829
 2002-11-22 22:45:07 +00:00
Misha Brukman
02c0acabb9 Added methods to read/write values to stack in .h, fixed implementation in 
.cpp to return the iterator correctly.

llvm-svn: 4827
 2002-11-22 22:43:47 +00:00
Misha Brukman
23d923ff18 Added -*- C++ -*- mode to the comments. 
llvm-svn: 4826
 2002-11-22 22:42:50 +00:00
Misha Brukman
e43fe85591 Add a simple way to add memory locations of format [reg+offset] 
llvm-svn: 4825
 2002-11-22 22:42:12 +00:00
Brian Gaeke
2d771c7b5f lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst. 
llvm-svn: 4821
 2002-11-22 11:07:01 +00:00
Chris Lattner
fe85dd13d2 Handle cmp Reg, 0 correctly 
llvm-svn: 4819
 2002-11-21 23:30:00 +00:00
Chris Lattner
6021c0d120 Printing support for more stuff 
llvm-svn: 4818
 2002-11-21 22:49:46 +00:00
Chris Lattner
a147d38780 Don't add implicit operands 
llvm-svn: 4817
 2002-11-21 22:49:20 +00:00
Chris Lattner
de36dd3a36 Fix off by one bug 
llvm-svn: 4816
 2002-11-21 22:48:15 +00:00
Chris Lattner
de6d53e549 Add fixme 
llvm-svn: 4815
 2002-11-21 22:48:01 +00:00
Chris Lattner
93c5c3ff44 Minor code cleanups 
llvm-svn: 4814
 2002-11-21 21:04:50 +00:00
Chris Lattner
af8c29b47d Implement printing of store instructions 
llvm-svn: 4813
 2002-11-21 21:03:39 +00:00
Chris Lattner
918179475a The big change here is to handle printing/emission of X86II::MRMSrcMem 
instructions.  Right now the only users are load instructions, and Misha's
spill code

llvm-svn: 4812
 2002-11-21 20:44:15 +00:00
Chris Lattner
2112a6d7b8 Remove implicit information from instruction selector 
llvm-svn: 4811
 2002-11-21 18:54:29 +00:00
Chris Lattner
c9e824d750 Add printing information for MUL and DIV 
llvm-svn: 4810
 2002-11-21 18:54:14 +00:00
Chris Lattner
d2207d5464 Fix a bug that prevented compilation of multiple functions 
llvm-svn: 4809
 2002-11-21 17:26:58 +00:00
Chris Lattner
fab5468d86 Remove opcode information for instructions that are completely defined now 
llvm-svn: 4805
 2002-11-21 17:12:55 +00:00
Chris Lattner
d432d2f75e Add printing support for sahf & setcc 
llvm-svn: 4804
 2002-11-21 17:10:57 +00:00
Chris Lattner
766d0da035 Add printing support for /0 /1 type instructions 
llvm-svn: 4803
 2002-11-21 17:09:01 +00:00
Chris Lattner
9f9d6aef08 Add support for /0 /1, etc type instructions 
llvm-svn: 4802
 2002-11-21 17:08:49 +00:00
Chris Lattner
b1b5855551 Rename the SetCC X86 instructions to reflect the fact that they are the 
register versions

llvm-svn: 4800
 2002-11-21 16:19:42 +00:00
Chris Lattner
d6236d8100 Simplify setcc code a bit 
llvm-svn: 4799
 2002-11-21 15:52:38 +00:00
Chris Lattner
2f9488d131 Support Registers of the form (B8+ rd) for example 
llvm-svn: 4798
 2002-11-21 02:00:20 +00:00
Chris Lattner
32bfb6a115 Dont' set flags 
llvm-svn: 4797
 2002-11-21 01:59:50 +00:00
Chris Lattner
aa8aa73902 Implement printing more, implement opcode output more 
llvm-svn: 4796
 2002-11-21 01:33:44 +00:00
Chris Lattner
53a9c9aac6 Huge diff do to reindeinting comments. 
Basically just adds OpSize flags for instructions that need them.

llvm-svn: 4795
 2002-11-21 01:33:28 +00:00
Chris Lattner
92a3c2c77d Add new prefix flag 
llvm-svn: 4794
 2002-11-21 01:32:55 +00:00
Chris Lattner
228180c2ae Print another class of instructions correctly, giving us: xorl EDX, EDX 
for example.

llvm-svn: 4793
 2002-11-21 00:30:01 +00:00
Misha Brukman
5d89dbcf41 Booleans are types too. And they get stored in bytes. And InstructionSelection 
doesn't assert fail. And everyone's happy. Yay!

llvm-svn: 4792
 2002-11-21 00:25:56 +00:00
Misha Brukman
96283090dc Add definitions for function headers from MRegisterInfo.h: 
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.

llvm-svn: 4784
 2002-11-20 18:59:43 +00:00
Misha Brukman
42f51b24e1 Check not only for MO_VirtualRegister, but MO_MachineRegister as well when 
printing out assembly. After all, we want the real thing too.

llvm-svn: 4783
 2002-11-20 18:56:41 +00:00
Misha Brukman
505ca2e419 Add mapping in MachineFunction from SSA regs to Register Classes. Also, 
uncovered a bug where registers were not being put in a map if they were not
found...

llvm-svn: 4776
 2002-11-20 00:58:23 +00:00
Misha Brukman
8d3bef2e1b Sigh. Fixed some speling. 
llvm-svn: 4775
 2002-11-20 00:56:42 +00:00
Misha Brukman
00d8343760 Thanks to the R8, R16, and R32 macros, I can now deal with registers that 
belong to different register classes easier.

llvm-svn: 4773
 2002-11-20 00:47:40 +00:00
Brian Gaeke
49acd3c0ba Brian Gaeke says: 
lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8

llvm-svn: 4755
 2002-11-19 09:08:47 +00:00
Chris Lattner
cd1f56fc36 Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well. 
llvm-svn: 4743
 2002-11-18 06:56:51 +00:00
Chris Lattner
8301d751ee Expose base opcode 
llvm-svn: 4742
 2002-11-18 06:56:24 +00:00
Chris Lattner
54bb9d64a3 Start to add more information to instr.def 
llvm-svn: 4741
 2002-11-18 05:37:11 +00:00
Chris Lattner
e921369cf7 Add instruction annotation about whether it has a 0x0F opcode prefix 
llvm-svn: 4740
 2002-11-18 01:59:28 +00:00
Chris Lattner
acf38562df Add more void flags 
llvm-svn: 4739
 2002-11-18 01:37:48 +00:00
Chris Lattner
7a67557e29 Set the void flag on instructions that should get it 
llvm-svn: 4738
 2002-11-18 01:34:36 +00:00
Chris Lattner
a7d7b16161 Arrange to have a TargetMachine available in X86InstrInfo::print 
llvm-svn: 4734
 2002-11-17 23:20:37 +00:00
Chris Lattner
700e8f6a01 Wow, I'm incapable of the simplest things today... 
llvm-svn: 4732
 2002-11-17 23:05:21 +00:00
Chris Lattner
1cd77c9933 Rename registers to follow the intel style of all caps 
llvm-svn: 4731
 2002-11-17 23:03:46 +00:00
Chris Lattner
5374a3be97 Reorganize printing interface a bit 
llvm-svn: 4728
 2002-11-17 22:53:13 +00:00
Chris Lattner
970ae6d569 Fix minor detail 
llvm-svn: 4725
 2002-11-17 22:33:26 +00:00
Chris Lattner
72e99c8344 Fix Mul/Div clobbers 
llvm-svn: 4718
 2002-11-17 21:56:38 +00:00
Chris Lattner
dcb6f1dbf9 Fix a few typos, implement load/store 
llvm-svn: 4716
 2002-11-17 21:11:55 +00:00
Chris Lattner
06066e17c3 Add functions to buld X86 specific constructs 
llvm-svn: 4714
 2002-11-17 21:03:35 +00:00
Chris Lattner
5e21732045 Add information about memory index representation 
llvm-svn: 4712
 2002-11-17 20:33:26 +00:00
Chris Lattner
99b5e2f073 Add load/store instructions 
llvm-svn: 4711
 2002-11-17 20:33:12 +00:00
Chris Lattner
fb67938381 Switch visitRet to use getClass() 
llvm-svn: 4710
 2002-11-17 20:07:45 +00:00
Brian Gaeke
492e05ba01 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline 
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.

llvm-svn: 4707
 2002-11-14 22:32:30 +00:00
Brian Gaeke
8cfe5d95f1 InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return 
values.
X86InstrInfo.def: add LEAVE instruction.

llvm-svn: 4691
 2002-11-11 19:37:09 +00:00
Brian Gaeke
100510d2a8 Add instruction selection code and tests for setcc instructions 
llvm-svn: 4603
 2002-11-07 17:59:21 +00:00
Chris Lattner
79296d7609 Implement signed and unsigned division and remainder 
llvm-svn: 4508
 2002-11-02 20:54:46 +00:00
Chris Lattner
234cc2848a Implement multiply operator 
llvm-svn: 4506
 2002-11-02 20:28:58 +00:00
Chris Lattner
efa2b8226f * Implement subtract 
* Merge add code into logical code

llvm-svn: 4503
 2002-11-02 20:13:22 +00:00
Chris Lattner
5d1648c792 shuffle code around a bit, implement and, or, xor 
llvm-svn: 4502
 2002-11-02 20:04:26 +00:00
Chris Lattner
45000f0eb7 Add PHI node support, add comment for branch function 
llvm-svn: 4500
 2002-11-02 19:45:49 +00:00
Chris Lattner
d4010481a7 Implement unconditional branching support 
llvm-svn: 4498
 2002-11-02 19:27:56 +00:00
Chris Lattner
2634141328 * Fix nonconstant shift case 
* Turn table into 2d table

llvm-svn: 4496
 2002-11-02 01:41:55 +00:00
Chris Lattner
14ce86f5b0 Use a more table driven approach to handling types. Seems to simplify the 
code a bit

llvm-svn: 4493
 2002-11-02 01:15:18 +00:00
Chris Lattner
ef1d6548bb Make switch statements denser, but only because of the follow-on patch 
llvm-svn: 4492
 2002-11-02 00:49:56 +00:00
Chris Lattner
b3e08ace0c * Remove dead variable 
* Shift amount is always guaranteed to be 8 bits

llvm-svn: 4491
 2002-11-02 00:44:25 +00:00
Brian Gaeke
2ad8a9cf8b InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst. 
Add ISel::visitShiftInst() to instruction select shift instructions.
 Add a comment in visitAdd about how to do 64 bit adds.

X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.

llvm-svn: 4477
 2002-10-31 23:03:59 +00:00
Chris Lattner
47bbeeac43 Add lots more info 
llvm-svn: 4450
 2002-10-30 06:04:46 +00:00
Chris Lattner
cbbc96bd8d Make sure to set the destination register correctly 
llvm-svn: 4444
 2002-10-30 01:49:01 +00:00
Chris Lattner
d18210e53f Set the destination register field based on the target specific flags 
llvm-svn: 4442
 2002-10-30 01:15:31 +00:00
Chris Lattner
80f1f696e8 Add flag to specify when no value is produced by an instruction 
llvm-svn: 4441
 2002-10-30 01:09:34 +00:00
Chris Lattner
a8069b87b3 Implement the new optional getRegisterInfo 
llvm-svn: 4437
 2002-10-30 00:56:18 +00:00
Chris Lattner
faa5c82486 Print machine code after instruction selection 
llvm-svn: 4434
 2002-10-30 00:47:49 +00:00
Chris Lattner
40d5ff97c1 Make sure to pass the LLVM basic block in 
llvm-svn: 4433
 2002-10-30 00:47:40 +00:00
Chris Lattner
4352ba0640 Construct annotation, to make sure it's attached to function 
llvm-svn: 4429
 2002-10-29 23:40:58 +00:00
Chris Lattner
d3b57a0084 Convert backend to use passes, implement X86TargetMachine 
llvm-svn: 4421
 2002-10-29 22:37:54 +00:00
Chris Lattner
82479f668c Rename X86InstructionInfo to X86InstrInfo 
llvm-svn: 4413
 2002-10-29 21:05:24 +00:00
Chris Lattner
0518ad4aea Minor renaming 
llvm-svn: 4410
 2002-10-29 20:48:56 +00:00
Chris Lattner
af52d6564a Switch to generating machineinstr's instead of MInstructions 
llvm-svn: 4396
 2002-10-29 17:43:55 +00:00
Chris Lattner
483afe2221 Be compatible with sparc backend 
llvm-svn: 4395
 2002-10-29 17:43:38 +00:00
Chris Lattner
9e3867d6d3 Implement MachineInstrInfo interface 
llvm-svn: 4394
 2002-10-29 17:43:19 +00:00
Chris Lattner
f963781fcb Switch to different flag set 
llvm-svn: 4393
 2002-10-29 17:42:40 +00:00
Chris Lattner
152b53fc64 Initial stab at MachineInstr'ication 
llvm-svn: 4367
 2002-10-28 23:55:19 +00:00
Misha Brukman
c4be791be2 Fixed spelling and grammar. 
llvm-svn: 4353
 2002-10-28 20:01:52 +00:00
Chris Lattner
28d6f5bc40 Remove dead fixme 
llvm-svn: 4300
 2002-10-27 21:23:43 +00:00
Chris Lattner
e4e731b30c Instruction select constant arguments correctly 
llvm-svn: 4297
 2002-10-27 21:16:59 +00:00
Chris Lattner
046cb65220 Add instruction definitions for mov r, imm instructions 
llvm-svn: 4296
 2002-10-27 21:16:44 +00:00
Chris Lattner
d25a097994 Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.

llvm-svn: 4284
 2002-10-25 22:55:53 +00:00