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Commit Graph

36 Commits

Author SHA1 Message Date
Zoran Jovanovic
3aa8010f59 [mips][microMIPS] Implement ANDI16 instruction
llvm-svn: 221367
2014-11-05 17:31:00 +00:00
Zoran Jovanovic
9298c57c2a Reverted revisions 221351, 221352 and 221353.
llvm-svn: 221354
2014-11-05 16:19:59 +00:00
Zoran Jovanovic
d61600192c [mips][microMIPS] Implement ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5163

llvm-svn: 221351
2014-11-05 15:39:41 +00:00
Zoran Jovanovic
417b0378da [mips][microMIPS] Implement ADDIUR1SP instruction
Differential Revision: http://reviews.llvm.org/D5153

llvm-svn: 220477
2014-10-23 11:13:59 +00:00
Zoran Jovanovic
7d4ae91afe ps][microMIPS] Implement ADDIUR2 instruction
Differential Revision: http://reviews.llvm.org/D5151

llvm-svn: 220476
2014-10-23 11:06:34 +00:00
Zoran Jovanovic
c644ce2e43 ps][microMIPS] Implement LI16 instruction
Differential Revision: http://reviews.llvm.org/D5149

llvm-svn: 220475
2014-10-23 10:59:24 +00:00
Zoran Jovanovic
0172553d1e [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D5774

llvm-svn: 220474
2014-10-23 10:42:01 +00:00
Zoran Jovanovic
5e356e74e3 [mips][microMIPS] Implement ADDU16 and SUBU16 instructions
Differential Revision: http://reviews.llvm.org/D5118

llvm-svn: 220276
2014-10-21 08:44:58 +00:00
Zoran Jovanovic
26b6fdd712 [mips][microMIPS] Implement AND16, NOT16, OR16 and XOR16 instructions
Differential Revision: http://reviews.llvm.org/D5117

llvm-svn: 220275
2014-10-21 08:32:40 +00:00
Zoran Jovanovic
d8488142ad [mips][microMIPS] Implement ADDIUSP instruction
Differential Revision: http://reviews.llvm.org/D5084

llvm-svn: 219500
2014-10-10 14:37:30 +00:00
Zoran Jovanovic
454a101d3d [mips][microMIPS] Implement ADDIUS5 instruction
Differential Revision: http://reviews.llvm.org/D5049

llvm-svn: 219495
2014-10-10 13:45:34 +00:00
Zoran Jovanovic
f1edd29dad [mips][microMIPS] Implement JRADDIUSP instruction
Differential Revision: http://reviews.llvm.org/D5046

llvm-svn: 217681
2014-09-12 14:29:54 +00:00
Zoran Jovanovic
4d73b21714 [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
Differential Revision: http://reviews.llvm.org/D5211

llvm-svn: 217675
2014-09-12 13:33:33 +00:00
Zoran Jovanovic
25db0be672 [mips][microMIPS] MicroMIPS Compact Branch Instructions BEQZC and BNEZC
Differential Revision: http://reviews.llvm.org/D3545

llvm-svn: 215636
2014-08-14 12:09:10 +00:00
Zoran Jovanovic
712fef1943 Implementation of 16-bit microMIPS instructions MFHI and MFLO.
Differential Revision: http://llvm-reviews.chandlerc.com/D3141

llvm-svn: 205532
2014-04-03 12:47:34 +00:00
Zoran Jovanovic
ad16697119 Provide an operand for microMIPS wait instruction.
llvm-svn: 204329
2014-03-20 10:41:37 +00:00
Zoran Jovanovic
35c85f0c11 Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
2014-03-20 10:18:24 +00:00
Zoran Jovanovic
ebb68d0712 Fixed encoding of SYSCALL microMIPS instruction.
llvm-svn: 202523
2014-02-28 18:17:08 +00:00
Zoran Jovanovic
d914bd8ae2 Revert revision 202518 because of wrong commit message.
llvm-svn: 202521
2014-02-28 18:14:16 +00:00
Zoran Jovanovic
43ca53260b Fix operand of SC instruction.
llvm-svn: 202518
2014-02-28 18:02:17 +00:00
Zoran Jovanovic
427d20b793 Support for microMIPS FPU instructions 2.
llvm-svn: 198009
2013-12-25 10:09:27 +00:00
Zoran Jovanovic
b55909330e Support for microMIPS FPU instructions 1.
llvm-svn: 197815
2013-12-20 15:44:08 +00:00
Zoran Jovanovic
e6baed485f Support for microMIPS control instructions.
llvm-svn: 197696
2013-12-19 16:25:00 +00:00
Zoran Jovanovic
a4d6da998d Support for microMIPS LL and SC instructions.
llvm-svn: 197692
2013-12-19 16:12:56 +00:00
Zoran Jovanovic
e87258135d Use instr mapping for microMIPS in llvm-mc.
llvm-svn: 194792
2013-11-15 08:07:34 +00:00
Zoran Jovanovic
feadcc01d7 Support for microMIPS trap instruction with immediate operands.
llvm-svn: 194569
2013-11-13 13:15:03 +00:00
Zoran Jovanovic
935364b314 Support for microMIPS trap instructions 1.
llvm-svn: 194205
2013-11-07 14:35:24 +00:00
Zoran Jovanovic
134add2b71 Support for microMIPS branch instructions.
llvm-svn: 193992
2013-11-04 14:53:22 +00:00
Zoran Jovanovic
929213f2ec Support for microMIPS jump instructions
llvm-svn: 193623
2013-10-29 16:38:59 +00:00
Zoran Jovanovic
579084a489 Support for misc microMIPS instructions.
llvm-svn: 190744
2013-09-14 06:49:25 +00:00
Vladimir Medic
c122b6c139 This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch.
llvm-svn: 190152
2013-09-06 12:53:21 +00:00
Vladimir Medic
a00506588f This patch adds support for microMIPS Move Conditional instructions. Test cases are included in patch.
llvm-svn: 190148
2013-09-06 12:41:17 +00:00
Jack Carter
cb8856c2c6 [Mips] Support for unaligned load/store microMips instructions
This includes instructions lwl, lwr, swl and swr.

Patch by Zoran Jovnovic

llvm-svn: 188312
2013-08-13 20:19:16 +00:00
Akira Hatanaka
587ba11650 [mips] Add definitions of micromips load and store instructions.
Patch by Zoran Jovanovic.

llvm-svn: 180241
2013-04-25 01:21:25 +00:00
Akira Hatanaka
fd15a7b67e [mips] Add definitions of micromips shift instructions.
Patch by Zoran Jovanovic.

llvm-svn: 180238
2013-04-25 01:11:15 +00:00
Akira Hatanaka
0a152f4724 [mips] First patch which adds support for micromips.
This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.

Patch by Zoran Jovanovic.

llvm-svn: 179873
2013-04-19 19:03:11 +00:00