Nate Begeman
e371cb595a
Update scheduling info for vrsave instruction
...
llvm-svn: 26776
2006-03-15 05:25:05 +00:00
Chris Lattner
392087f5bd
Fix an off by one error that caused PPC LLC failures last night.
...
llvm-svn: 26758
2006-03-14 17:56:49 +00:00
Evan Cheng
ae7469b2c5
PPC LSR pass should use target lowering hooks.
...
llvm-svn: 26743
2006-03-13 23:56:51 +00:00
Evan Cheng
7ec94f2ff7
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
...
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Chris Lattner
d0505331d2
For functions that use vector registers, save VRSAVE, mark used
...
registers, and update it on entry to each function, then restore it on exit.
This compiles:
void func(vfloat *a, vfloat *b, vfloat *c) {
*a = *b * *c + *c;
}
to this:
_func:
mfspr r2, 256
oris r6, r2, 49152
mtspr 256, r6
lvx v0, 0, r5
lvx v1, 0, r4
vmaddfp v0, v1, v0, v0
stvx v0, 0, r3
mtspr 256, r2
blr
GCC produces this (which has additional stack accesses):
_func:
mfspr r0,256
stw r0,-4(r1)
oris r0,r0,0xc000
mtspr 256,r0
lvx v0,0,r5
lvx v1,0,r4
lwz r12,-4(r1)
vmaddfp v0,v0,v1,v0
stvx v0,0,r3
mtspr 256,r12
blr
llvm-svn: 26733
2006-03-13 21:52:10 +00:00
Chris Lattner
3aff8e6acf
Fix a couple of bugs that broke the alpha tester build
...
llvm-svn: 26722
2006-03-13 05:23:59 +00:00
Chris Lattner
9898674f99
Handle cracked instructions in dispatch group formation.
...
llvm-svn: 26721
2006-03-13 05:20:04 +00:00
Chris Lattner
ba10d4e4ab
Mark instructions that are cracked by the PPC970 decoder as such.
...
llvm-svn: 26720
2006-03-13 05:15:10 +00:00
Chris Lattner
a278639f29
Several big changes:
...
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
type instead of a table in the .cpp file. Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
accurately.
llvm-svn: 26719
2006-03-12 09:13:49 +00:00
Chris Lattner
19b93158c1
blr is a branch too
...
llvm-svn: 26710
2006-03-11 21:49:49 +00:00
Chris Lattner
2370965e55
teach the JIT to encode vector registers
...
llvm-svn: 26697
2006-03-10 20:19:50 +00:00
Chris Lattner
3f23d22d3f
Change the interface for getting a target HazardRecognizer to be more clean.
...
llvm-svn: 26608
2006-03-08 04:25:59 +00:00
Chris Lattner
24aa564456
add a note
...
llvm-svn: 26605
2006-03-08 00:25:47 +00:00
Jim Laskey
91d5ce2531
Use "llvm.metadata" section for debug globals. Filter out these globals in the
...
asm printer.
llvm-svn: 26599
2006-03-07 22:00:35 +00:00
Chris Lattner
27f87a6955
add another missing store.
...
llvm-svn: 26595
2006-03-07 16:26:48 +00:00
Chris Lattner
dfdeec73bc
add a couple more load/store instrs, add a newline to the end of file.
...
llvm-svn: 26594
2006-03-07 16:19:46 +00:00
Nate Begeman
a8bc3c0c3c
This kinda sorta implements "things that have to lead a dispatch group".
...
llvm-svn: 26591
2006-03-07 08:30:27 +00:00
Chris Lattner
842436586c
add some new instructions to the classifier. With this, we correctly insert
...
a nop into Freebench/neural, which speeds it up from 136->129s (~5.4%).
llvm-svn: 26590
2006-03-07 07:14:55 +00:00
Chris Lattner
0cd4bd574c
add some comments that describe what we model
...
llvm-svn: 26588
2006-03-07 06:44:19 +00:00
Chris Lattner
4cd6cd499d
Implement a very very simple hazard recognizer for LSU rejects and ctr set/read
...
flushes
llvm-svn: 26587
2006-03-07 06:32:48 +00:00
Chris Lattner
ae34bbf56b
add a note
...
llvm-svn: 26585
2006-03-07 04:42:59 +00:00
Chris Lattner
af44ead7f3
implement TII::insertNoop
...
llvm-svn: 26562
2006-03-05 23:49:55 +00:00
Chris Lattner
6b0947c277
Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
...
implement copysign as a native op if they have it.
llvm-svn: 26541
2006-03-05 05:08:37 +00:00
Chris Lattner
317021b6c4
Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668.
...
llvm-svn: 26450
2006-03-01 07:14:48 +00:00
Chris Lattner
caec0d887c
add a note
...
llvm-svn: 26448
2006-03-01 06:36:20 +00:00
Chris Lattner
137c02aa60
Compile this:
...
void foo(float a, int *b) { *b = a; }
to this:
_foo:
fctiwz f0, f1
stfiwx f0, 0, r4
blr
instead of this:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
stw r2, 0(r4)
blr
This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.
llvm-svn: 26447
2006-03-01 05:50:56 +00:00
Chris Lattner
6ba976b557
Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll.
...
llvm-svn: 26445
2006-03-01 04:57:39 +00:00
Evan Cheng
ebe1f272b7
Vector op lowering.
...
llvm-svn: 26438
2006-03-01 01:11:20 +00:00
Chris Lattner
9f70a7924d
Add a subtarget feature for the stfiwx instruction. I know the G5 has it,
...
but I don't know what other PPC impls do. If someone could update the proc
table, I would appreciate it :)
llvm-svn: 26421
2006-02-28 07:08:22 +00:00
Chris Lattner
866634d77f
remove implemented item
...
llvm-svn: 26418
2006-02-28 06:36:04 +00:00
Nate Begeman
56a4dafd8d
readme updates
...
llvm-svn: 26405
2006-02-27 22:08:36 +00:00
Chris Lattner
bc35137363
Add memory printing support for PPC. Input memory operands now work with
...
inline asms! :)
llvm-svn: 26365
2006-02-24 20:27:40 +00:00
Chris Lattner
3d451516ec
Implement selection of inline asm memory operands
...
llvm-svn: 26348
2006-02-24 02:13:12 +00:00
Evan Cheng
2720cd1d7e
PPC JIT relocation model should be DynamicNoPIC.
...
llvm-svn: 26338
2006-02-23 22:18:07 +00:00
Chris Lattner
cdbd9d6d4c
Implement the PPC inline asm "L" modifier. This allows us to compile:
...
long long test(long long X) {
__asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
return X;
}
to:
foo r2 r3 r2 r3
llvm-svn: 26333
2006-02-23 19:31:10 +00:00
Evan Cheng
305141c1ba
- Added option -relocation-model to set relocation model. Valid values include static, pic,
...
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Jim Laskey
b62a583c99
Coordinate activities with llvm-gcc4 and dwarf.
...
llvm-svn: 26314
2006-02-22 19:02:11 +00:00
Chris Lattner
6bb2c3e9cd
split register class handling from explicit physreg handling.
...
llvm-svn: 26308
2006-02-22 00:56:39 +00:00
Chris Lattner
a124432746
Updates to match change of getRegForInlineAsmConstraint prototype
...
llvm-svn: 26305
2006-02-21 23:11:00 +00:00
Evan Cheng
c4cda2b89a
Moved PICEnabled to include/llvm/Target/TargetOptions.h
...
llvm-svn: 26272
2006-02-18 00:08:58 +00:00
Nate Begeman
9c0ab71f4a
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
...
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
llvm-svn: 26255
2006-02-17 05:43:56 +00:00
Evan Cheng
131901cbb8
If the false case is the current basic block, then this is a self loop.
...
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
llvm-svn: 26231
2006-02-16 08:27:56 +00:00
Chris Lattner
af26f481e9
If we have zero initialized data with external linkage, use .zerofill to
...
emit it (instead of .space), saving a bit of space in the .o file.
For example:
int foo[100];
int bar[100] = {};
when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space. The X86 backend can also do this on darwin.
llvm-svn: 26185
2006-02-14 22:18:23 +00:00
Chris Lattner
02f3db9781
Make sure that weak functions are aligned properly
...
llvm-svn: 26181
2006-02-14 20:42:33 +00:00
Chris Lattner
9db5a1fd19
Switch to using getCALLSEQ_START instead of using our own creation calls
...
llvm-svn: 26142
2006-02-13 08:55:29 +00:00
Nate Begeman
7261b82dd7
Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/
...
PowerPC/and-imm.ll
llvm-svn: 26136
2006-02-12 09:09:52 +00:00
Evan Cheng
6bd0f9c4ba
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
...
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng
521e5a1bfe
Change Select() from
...
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Chris Lattner
2e1a495967
Darwin doesn't support #APP/#NO_APP
...
llvm-svn: 26066
2006-02-08 23:42:22 +00:00
Chris Lattner
47ef931412
Rename BSel -> PPCBSel for the benefit of doxygen users.
...
Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.
llvm-svn: 26064
2006-02-08 19:33:26 +00:00
Chris Lattner
86d1dcf613
Emit the 'mr' pseudoop for easier reading.
...
llvm-svn: 26053
2006-02-08 06:56:40 +00:00
Chris Lattner
881c8c12ff
Move emails from nate into public places
...
llvm-svn: 26051
2006-02-08 06:43:51 +00:00
Chris Lattner
abaa15898f
Implement getConstraintType for PPC.
...
llvm-svn: 26042
2006-02-07 20:16:30 +00:00
Chris Lattner
50af3c6eb7
Add the simple PPC integer constraints
...
llvm-svn: 26027
2006-02-07 00:47:13 +00:00
Chris Lattner
b6fae6bad7
Change prototype
...
llvm-svn: 26022
2006-02-06 22:18:19 +00:00
Jim Laskey
62908083eb
We seem to have settled to __DWARF for section name.
...
llvm-svn: 26015
2006-02-06 14:16:15 +00:00
Evan Cheng
9fb67ea859
Complex pattern isel code shouldn't select nodes.
...
llvm-svn: 26010
2006-02-05 08:45:01 +00:00
Evan Cheng
fb902782e8
Use SelectRoot() as entry of any tblgen based isel.
...
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Chris Lattner
59378e7675
add a note
...
llvm-svn: 25984
2006-02-05 05:27:35 +00:00
Chris Lattner
085a324bfc
Use the asmprinter to find out what the preferred alignment of a global is.
...
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.
llvm-svn: 25979
2006-02-05 01:30:45 +00:00
Nate Begeman
ba19f3f93c
Remove some stuff that now works
...
llvm-svn: 25963
2006-02-04 07:29:35 +00:00
Chris Lattner
393e9d10dd
add a note
...
llvm-svn: 25944
2006-02-03 22:06:45 +00:00
Chris Lattner
172cf85d48
remove some target-indep and implemented notes
...
llvm-svn: 25930
2006-02-03 06:22:11 +00:00
Nate Begeman
85f3c9f566
Flesh out a couple of the items in the README
...
llvm-svn: 25928
2006-02-03 05:17:06 +00:00
Chris Lattner
06f54e7cb3
Add a note
...
llvm-svn: 25921
2006-02-03 01:49:49 +00:00
Chris Lattner
66d0341e73
update a note
...
llvm-svn: 25918
2006-02-02 23:50:22 +00:00
Nate Begeman
09bdfffaa6
add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
...
llvm-svn: 25916
2006-02-02 21:07:50 +00:00
Chris Lattner
8337a1050d
implement isStoreToStackSlot for PPC
...
llvm-svn: 25914
2006-02-02 20:16:12 +00:00
Chris Lattner
15cb732cd7
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
...
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner
c434ee61a3
new example
...
llvm-svn: 25903
2006-02-02 07:37:11 +00:00
Nate Begeman
dd4acf9710
Update the README
...
llvm-svn: 25902
2006-02-02 07:27:56 +00:00
Chris Lattner
d202c4d3cc
add a method
...
llvm-svn: 25884
2006-02-01 22:38:46 +00:00
Chris Lattner
821f93a659
add a note
...
llvm-svn: 25876
2006-02-01 17:54:23 +00:00
Nate Begeman
0be60963bd
Fix some of the stuff in the PPC README file, and clean up legalization
...
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Chris Lattner
c270dd87a9
another testcase.
...
llvm-svn: 25862
2006-02-01 00:28:12 +00:00
Evan Cheng
f115c17f23
Allow the specification of explicit alignments for constant pool entries.
...
llvm-svn: 25855
2006-01-31 22:23:14 +00:00
Chris Lattner
892fe31362
add info about the inline asm register constraints for PPC
...
llvm-svn: 25853
2006-01-31 19:20:21 +00:00
Nate Begeman
7a83bb4285
Codegen
...
bool %test(int %X) {
%Y = seteq int %X, 13
ret bool %Y
}
as
_test:
addi r2, r3, -13
cntlzw r2, r2
srwi r3, r2, 5
blr
rather than
_test:
cmpwi cr7, r3, 13
mfcr r2
rlwinm r3, r2, 31, 31, 31
blr
This has very little effect on most code, but speeds up analyzer 23% and
mason 11%
llvm-svn: 25848
2006-01-31 08:17:29 +00:00
Chris Lattner
186b5f0887
example nate pointed out
...
llvm-svn: 25841
2006-01-31 07:16:34 +00:00
Chris Lattner
830b1ad8cf
add the 'lucas' optimization
...
llvm-svn: 25830
2006-01-31 02:55:28 +00:00
Chris Lattner
2ab7f21d20
Functions that are lazily streamed in from the .bc file are *not* external.
...
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704
llvm-svn: 25793
2006-01-29 20:49:17 +00:00
Chris Lattner
4c6384a412
Now that OpActions is big enough, we can specify actions for vector types
...
llvm-svn: 25784
2006-01-29 08:41:37 +00:00
Chris Lattner
00e9ba5526
disable this for now
...
llvm-svn: 25778
2006-01-29 07:31:33 +00:00
Chris Lattner
6c4173145e
Request expansion of ConstantVec nodes.
...
llvm-svn: 25773
2006-01-29 06:32:58 +00:00
Chris Lattner
5f0a3df176
Targets all now request ConstantFP to be legalized into TargetConstantFP.
...
'fpimm' in .td files is now TargetConstantFP.
llvm-svn: 25771
2006-01-29 06:26:08 +00:00
Chris Lattner
d2eb15f467
Fix a bug in my elimination of ISD::CALL this morning. PPC now has to
...
provide the expansion for i64 calls itself
llvm-svn: 25735
2006-01-28 07:33:03 +00:00
Chris Lattner
170727421b
add a note about how we should implement this FIXME from the legalizer:
...
// FIXME: revisit this when we have some kind of mechanism by which targets
// can decided legality of vector constants, of which there may be very
// many.
llvm-svn: 25733
2006-01-28 05:40:47 +00:00
Nate Begeman
a46156da35
Add a couple more things to the readme.
...
llvm-svn: 25724
2006-01-28 01:22:10 +00:00
Chris Lattner
6a5d2450a3
Use PPCISD::CALL instead of ISD::CALL
...
llvm-svn: 25717
2006-01-27 23:34:02 +00:00
Chris Lattner
59a4f3f637
Make llvm.frame/returnaddr not crash on ppc
...
llvm-svn: 25710
2006-01-27 22:25:06 +00:00
Nate Begeman
d2c6fbef4a
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
...
the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
llvm-svn: 25696
2006-01-27 21:09:22 +00:00
Evan Cheng
77885c204d
Subtarget feature can now set any variable to any value
...
llvm-svn: 25678
2006-01-27 08:09:42 +00:00
Chris Lattner
20d4194a0d
PHI and INLINEASM are now built-in instructions provided by Target.td
...
llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Jim Laskey
583aae3110
Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
...
Global Variable information is now pulled from "llvm.dbg.globals"
llvm-svn: 25655
2006-01-26 20:21:46 +00:00
Evan Cheng
7da6daadc7
Set SchedulingForLatency to be the default scheduling preference for all.
...
llvm-svn: 25607
2006-01-25 18:52:42 +00:00
Nate Begeman
c29fac7fce
First part of bug 680:
...
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
c368fb710f
Default scheduling preference is SchedulingForLatency.
...
llvm-svn: 25603
2006-01-25 09:15:54 +00:00
Jim Laskey
18ba7ce7b3
Crude Dwarf global variable debugging.
...
llvm-svn: 25569
2006-01-24 00:49:18 +00:00
Chris Lattner
aafc339b4e
Add explicit #includes of <iostream>
...
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Chris Lattner
adff158fbd
Add explicit #includes of <iostream>
...
llvm-svn: 25509
2006-01-22 22:53:01 +00:00
Chris Lattner
1ecabc5a6f
trivial formatting improvement: don't insert extra blank lines between .comm
...
vars.
llvm-svn: 25492
2006-01-21 01:35:26 +00:00
Chris Lattner
60bc56e930
add a note
...
llvm-svn: 25439
2006-01-19 02:09:38 +00:00
Chris Lattner
23da2dc2ac
Don't assert on 'select_cc SETUO'
...
llvm-svn: 25423
2006-01-18 19:42:35 +00:00
Chris Lattner
00a483f966
fix out of date comment
...
llvm-svn: 25422
2006-01-18 19:37:44 +00:00
Chris Lattner
b0d3080ca8
Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll
...
llvm-svn: 25421
2006-01-18 19:35:21 +00:00
Jim Laskey
6b25a4e659
Added minimum Dwarf aranges. Cleaned up some section headers. Line number
...
support now works in gdb.
llvm-svn: 25417
2006-01-18 16:54:26 +00:00
Jim Laskey
52d9832e70
Add frame work for additional dwarf sections. Comments will improve as code
...
is added.
llvm-svn: 25410
2006-01-17 20:41:40 +00:00
Jim Laskey
0c4202b0ba
Adding basic support for Dwarf line number debug information.
...
I promise to keep future commits smaller.
llvm-svn: 25396
2006-01-17 17:31:53 +00:00
Chris Lattner
88572bb5c4
add notes from my *other* email acct.
...
llvm-svn: 25362
2006-01-16 17:58:54 +00:00
Chris Lattner
62ab456f6b
transfer some notes from my email to somewhere useful.
...
llvm-svn: 25361
2006-01-16 17:53:00 +00:00
Chris Lattner
4d2c4cb7a7
Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.
...
llvm-svn: 25334
2006-01-15 09:02:48 +00:00
Nate Begeman
85b2dc0c4e
bswap implementation
...
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Nate Begeman
10813e4f97
Remove some redundant stuff out of the readme.
...
llvm-svn: 25308
2006-01-14 01:24:22 +00:00
Chris Lattner
c615ed65ac
implement stacksave/stackrestore on PPC
...
llvm-svn: 25277
2006-01-13 17:52:03 +00:00
Chris Lattner
80fed2d66e
expand unsupported stacksave/stackrestore nodes
...
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Chris Lattner
29e1825fd3
ahem :)
...
llvm-svn: 25239
2006-01-12 02:05:36 +00:00
Chris Lattner
452a84e2b6
these cases are autogenerated
...
llvm-svn: 25238
2006-01-12 02:01:45 +00:00
Chris Lattner
861897037b
remove dead code
...
llvm-svn: 25237
2006-01-12 01:54:15 +00:00
Chris Lattner
e88b032f85
Goodbye PPC pattern isel. You have served us well, but it is now time for
...
you to ride off into the sunset.
llvm-svn: 25236
2006-01-12 01:46:07 +00:00
Chris Lattner
c8527856c1
Fix an off-by-one error that Nate's eagle eyes caught
...
llvm-svn: 25231
2006-01-11 23:16:29 +00:00
Chris Lattner
5633c9bccf
Use the auto-insert BuildMI constructor to avoid an explicit insert. No
...
functionality change, just code cleanup.
llvm-svn: 25230
2006-01-11 23:07:57 +00:00
Chris Lattner
2c8238e494
If a function has a non-zero sized frame, use an add to adjust the stack
...
pointer in the epilog, not a load.
llvm-svn: 25229
2006-01-11 23:03:54 +00:00
Nate Begeman
cff96008ac
Add bswap, rotl, and rotr nodes
...
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner
5a59c88c17
Fix calls that need to store values in stack slots, to not copy the stack
...
pointer. This allows us to emit stuff like this:
li r10, 0
stw r10, 56(r1)
or r3, r10, r10
or r4, r10, r10
or r5, r10, r10
or r6, r10, r10
or r7, r10, r10
or r8, r10, r10
or r9, r10, r10
bl L_bar$stub
instead of this:
or r2, r1, r1 ;; Extraneous copy.
li r10, 0
stw r10, 56(r2)
or r3, r10, r10
or r4, r10, r10
or r5, r10, r10
or r6, r10, r10
or r7, r10, r10
or r8, r10, r10
or r9, r10, r10
bl L_bar$stub
wowness.
llvm-svn: 25221
2006-01-11 19:55:07 +00:00
Chris Lattner
6b8fb2e9bc
Dead FP arguments still use an incoming FP reg. This fixes
...
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was
distilled from a miscompilation in 252.eon.
llvm-svn: 25217
2006-01-11 18:21:25 +00:00
Nate Begeman
7ed9b8b287
Remove a comment that no longer applies.
...
llvm-svn: 25167
2006-01-10 00:15:59 +00:00
Chris Lattner
a59d6394d2
Give PPCISD:: nodes legible names in dumps.
...
llvm-svn: 25166
2006-01-09 23:52:17 +00:00
Chris Lattner
95443534bf
add ret void support back
...
llvm-svn: 25164
2006-01-09 23:20:37 +00:00
Evan Cheng
e720cfd690
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
...
hasInFlag, hasOutFlag.
llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Chris Lattner
00d77e22d4
Fix the PPC JIT failures last night, which were due to mishandling of linkonce globals
...
llvm-svn: 25141
2006-01-07 06:22:16 +00:00
Chris Lattner
d583872b9e
linkonce symbols have an extra indirection, just like weak ones do. This fixes
...
Prolangs-C++/family and Prolangs-C++/primes.
llvm-svn: 25119
2006-01-06 01:04:03 +00:00
Chris Lattner
5488b43338
Fix a compile crash building MultiSource/Applications/d with the new front-end.
...
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.
llvm-svn: 25114
2006-01-05 18:32:49 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
...
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
...
inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Jim Laskey
61138e28ff
Applied some recommend changes from sabre. The dominate one beginning "let the
...
pass manager do it's thing." Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.
llvm-svn: 25100
2006-01-04 22:28:25 +00:00
Jim Laskey
897ad8ddb7
Add unique id to debug location for debug label use (work in progress.)
...
llvm-svn: 25096
2006-01-04 15:04:11 +00:00
Jim Laskey
62b29812a6
Tie dwarf generation to darwin assembler.
...
llvm-svn: 25093
2006-01-04 13:52:30 +00:00
Nate Begeman
ec7c28a28c
Add support for generating v4i32 altivec code
...
llvm-svn: 25046
2005-12-30 00:12:56 +00:00
Nate Begeman
e1fdcf5a20
Remove a fixme
...
llvm-svn: 25045
2005-12-30 00:11:07 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
...
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Nate Begeman
96c7e22231
Fix one of the things in the todo file, and get a bit closer to folding
...
constant offsets from statics into the address arithmetic.
llvm-svn: 24999
2005-12-24 01:00:15 +00:00
Evan Cheng
d87688fe72
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
...
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Chris Lattner
8b2bd265f4
make sure bit_converts are expanded
...
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
Chris Lattner
3c4a3dd86e
Simplify some code by using BIT_CONVERT
...
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
Chris Lattner
73f38507d9
remove dead code
...
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Chris Lattner
8c2622a14e
fix handling of weak linkage
...
llvm-svn: 24964
2005-12-22 21:15:17 +00:00
Chris Lattner
f7ed832fcf
move some random notes out of my email into someplace useful
...
llvm-svn: 24956
2005-12-22 17:19:28 +00:00
Evan Cheng
e458553c73
Bye bye HACKTROCITY.
...
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
05ad906ccf
Flip the meaning of FPContractions to reflect Requires<[]> change.
...
llvm-svn: 24884
2005-12-20 20:08:53 +00:00
Nate Begeman
a114534620
Pattern-match return. Includes gross hack!
...
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman
d4562971b3
Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
...
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register. This also requires some asm printer work
to satisfy the darwin assembler.
For
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
We now produce:
_foo:
lvx v0, 0, r3
vaddfp v0, v0, v0
stvx v0, 0, r3
blr
Instead of:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
llvm-svn: 24872
2005-12-19 23:40:42 +00:00
Nate Begeman
9c7dce88b5
Convert load/store over to being pattern matched
...
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
Chris Lattner
0124442495
This is handled by the autogen'd code
...
llvm-svn: 24834
2005-12-18 21:06:11 +00:00
Jim Laskey
37957b1ad3
Added source file/line correspondence for dwarf (PowerPC only at this point.)
...
llvm-svn: 24748
2005-12-16 22:45:29 +00:00
Chris Lattner
ba98d302be
Weak and linkonce global vars should still have a .globl emitted for them
...
llvm-svn: 24747
2005-12-16 21:46:14 +00:00
Nate Begeman
69da94a1b9
Add a second vector type to the VRRC register class, and fix some patterns
...
so that tablegen can infer all types.
llvm-svn: 24746
2005-12-16 09:19:13 +00:00
Chris Lattner
890fd4e66c
Update the darwin handling of linkonce & weak functions and GV stubs. This
...
should work in all permutations.
llvm-svn: 24728
2005-12-16 00:22:14 +00:00
Nate Begeman
f5ac708070
Remove a now unused statistic.
...
llvm-svn: 24720
2005-12-14 22:56:16 +00:00
Nate Begeman
fe7a3f28e3
Use the new predicate support that Evan Cheng added to remove some code
...
from the DAGToDAG cpp file. This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.
Allows us to match:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
%tmp3 = add <4 x float> %tmp2, %tmp1
store <4 x float> %tmp3, <4 x float> *%a
ret void
}
As:
_foo:
li r2, 0
lvx v0, r2, r3
vmaddfp v0, v0, v0, v0
stvx v0, r2, r3
blr
Or, with llc -disable-excess-fp-precision,
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v1, v0, v0, v1
vaddfp v0, v1, v0
stvx v0, r2, r3
blr
llvm-svn: 24719
2005-12-14 22:54:33 +00:00
Evan Cheng
fbc29bb3dd
Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
...
llvm-svn: 24716
2005-12-14 22:07:12 +00:00
Nate Begeman
09855eafd1
Add support for fmul node of type v4f32.
...
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = mul <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
Is selected to:
_foo:
li r2, 0
lvx v0, r2, r3
vxor v1, v1, v1
vmaddfp v0, v0, v0, v1
stvx v0, r2, r3
blr
llvm-svn: 24701
2005-12-14 00:34:09 +00:00
Nate Begeman
1700fe3f71
Prepare support for AltiVec multiply, divide, and sqrt.
...
llvm-svn: 24700
2005-12-13 22:55:22 +00:00
Chris Lattner
95555853ad
Use the shared asmprinter code for printing special llvm globals
...
llvm-svn: 24695
2005-12-13 06:32:50 +00:00
Chris Lattner
1468c52811
reindent a loop, unswitch a loop. No functionality changes
...
llvm-svn: 24692
2005-12-13 04:33:58 +00:00
Chris Lattner
6d4db7c732
Remove type casts that are no longer needed
...
llvm-svn: 24661
2005-12-11 07:45:47 +00:00
Chris Lattner
d27c96f723
Fix the JIT failures from last night.
...
llvm-svn: 24659
2005-12-11 07:37:41 +00:00
Nate Begeman
a0e26b25f4
Add support for TargetConstantPool nodes to the dag isel emitter, and use
...
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
llvm-svn: 24657
2005-12-10 02:36:00 +00:00
Nate Begeman
5c6a84b5fc
Add support patterns to many load and store instructions which will
...
hopefully use patterns in the near future.
llvm-svn: 24651
2005-12-09 23:54:18 +00:00
Chris Lattner
cdeeb94947
Teach the PPC backend about the ctor and dtor list when not using __main and
...
linking the entire program into one bc file.
llvm-svn: 24645
2005-12-09 18:24:29 +00:00
Chris Lattner
9d9313e3c1
Add another important case we miss
...
llvm-svn: 24639
2005-12-08 07:13:28 +00:00
Chris Lattner
46ca9774fc
Silence another annoying GCC warning
...
llvm-svn: 24627
2005-12-06 20:56:18 +00:00
Chris Lattner
68a0fed879
Use new PPC-specific nodes to represent shifts which require the 6-bit
...
amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
llvm-svn: 24615
2005-12-06 02:10:38 +00:00
Chris Lattner
b2d4850394
Add some explicit type casts so that tblgen knows the type of the shift
...
amount, which is not necessarily the same as the type being shifted.
llvm-svn: 24594
2005-12-05 02:34:05 +00:00
Chris Lattner
e6daa0e5bc
The basic fneg cases are already autogen'd
...
llvm-svn: 24592
2005-12-04 19:04:38 +00:00
Chris Lattner
f38170bbd2
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
...
improvements.
llvm-svn: 24591
2005-12-04 19:01:59 +00:00
Chris Lattner
a8af34937b
Finish moving uncond br over to .td file, remove from .cpp file.
...
llvm-svn: 24590
2005-12-04 18:48:01 +00:00
Chris Lattner
b62b05bde6
Define BR in the .td file now that Evan made tblgen smarter.
...
llvm-svn: 24589
2005-12-04 18:42:54 +00:00
Chris Lattner
046761f312
Make sure these get added into the codegenmap when appropriate
...
llvm-svn: 24566
2005-12-01 18:09:22 +00:00
Nate Begeman
811a41a87c
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Nate Begeman
5de40afc43
Cosmetic change, better reflects actual values
...
llvm-svn: 24562
2005-12-01 04:48:26 +00:00
Chris Lattner
1b8cb77fea
Fix a regression caused by a patch earlier today
...
llvm-svn: 24561
2005-12-01 03:50:19 +00:00
Evan Cheng
363ad8bbc4
Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
...
llvm-svn: 24558
2005-12-01 00:41:50 +00:00
Chris Lattner
06fbfe625c
SelectNodeTo now returns N. Use it instead of return N directly.
...
llvm-svn: 24549
2005-11-30 22:53:06 +00:00
Chris Lattner
90a87cc2f1
Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
...
llvm-svn: 24547
2005-11-30 20:40:54 +00:00
Nate Begeman
84be54b731
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
llvm-svn: 24541
2005-11-30 18:54:35 +00:00
Nate Begeman
31121419c8
First chunk of actually generating vector code for packed types. These
...
changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
llvm-svn: 24534
2005-11-30 08:22:07 +00:00
Nate Begeman
ebafe9c6d8
Represent the encoding of the SPR instructions as they actually are, so
...
that we can use the correct SPR numbers in the InstrInfo.td file. This is
necessary to support VRsave.
llvm-svn: 24521
2005-11-29 22:42:50 +00:00
Nate Begeman
9a781caa20
Hook up one type, v4f32, to the VR RegisterClass for now.
...
llvm-svn: 24517
2005-11-29 08:17:20 +00:00
Nate Begeman
16a1c53abc
Add the remainder of the AltiVec 4 x float instructions. Further
...
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.
llvm-svn: 24516
2005-11-29 08:04:45 +00:00
Chris Lattner
47feb1ecbb
No targets support line number info yet.
...
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Nate Begeman
a1c2df2471
Add the majority of the vector machien value types we expect to support,
...
and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
Evan Cheng
c23716c268
Fixed a comment bug:
...
createPPCPatternInstructionSelector -> createPPCISelPattern
llvm-svn: 24510
2005-11-29 04:59:46 +00:00
Chris Lattner
2e375c1847
don't say this is i128, because it isn't yet. Hopefully nate will change
...
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.
llvm-svn: 24504
2005-11-29 00:41:40 +00:00
Nate Begeman
84cac055ad
Small tweaks noticed while on the plane.
...
llvm-svn: 24492
2005-11-26 22:39:34 +00:00
Nate Begeman
687456dd7a
Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
...
Registers. Apologies to Jim if the scheduling info so far isn't accurate.
There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.
llvm-svn: 24489
2005-11-23 05:29:52 +00:00
Chris Lattner
a5ec3d8e81
Use generic constant pool emission code in the AsmPrinter class.
...
llvm-svn: 24465
2005-11-21 08:26:15 +00:00
Chris Lattner
31197fa019
Use the FunctionNumber provided by the AsmPrinter class
...
llvm-svn: 24462
2005-11-21 08:14:07 +00:00
Chris Lattner
d7ae8bcf66
Use CommentString where possible, fix a bug where aix mode wouldn't assemble
...
due to basic blocks being misnamed.
llvm-svn: 24459
2005-11-21 08:02:41 +00:00
Chris Lattner
f3af64b478
unify the darwin and aix constant pool printers
...
llvm-svn: 24458
2005-11-21 07:57:37 +00:00
Chris Lattner
3e2c6c1d15
Adjust to capitalized AsmPrinter method names
...
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
Chris Lattner
b4955ba62b
use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24453
2005-11-21 07:41:05 +00:00
Chris Lattner
bc917fe899
This is now implemented in common codegen code
...
llvm-svn: 24446
2005-11-21 07:06:58 +00:00
Chris Lattner
78bb97af59
set PrivateGlobalPrefix on darwin, use it when printing out CP references
...
llvm-svn: 24441
2005-11-21 06:47:58 +00:00
Chris Lattner
da306413bb
only use dyld stubs if not in ppc-static mode. This completes support for
...
non-static codegen.
llvm-svn: 24403
2005-11-17 19:40:30 +00:00
Chris Lattner
25e065cc46
refactor call operand handling to eliminate special cases from printOp.
...
llvm-svn: 24401
2005-11-17 19:25:59 +00:00
Chris Lattner
02522dc4e6
disentangle call operands from branch operands a bit
...
llvm-svn: 24400
2005-11-17 19:16:08 +00:00
Chris Lattner
b6af6ea0d4
add an option to generate completely non-pic code, corresponding to what
...
gcc -static produces on PPC. This is used for building kexts and other things.
With this, materializing the address of a global looks like:
lis r2, ha16(L_H$non_lazy_ptr)
la r3, lo16(L_H$non_lazy_ptr)(r2)
we're still emitting stubs for functions, which is wrong. That is next.
llvm-svn: 24399
2005-11-17 18:55:48 +00:00
Chris Lattner
7666d8192c
Fix a bug that resistor on IRC hit where we tried to create token factor
...
nodes of load results, not of their chain results.
llvm-svn: 24398
2005-11-17 18:30:17 +00:00
Chris Lattner
4581404290
Enable global address legalization, fixing a todo and allowing the removal
...
of some code. This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner. It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.
llvm-svn: 24397
2005-11-17 18:26:56 +00:00
Chris Lattner
e3c5f4c9d2
Teach the selector to fold lo(g) into load instruction immediate fields
...
llvm-svn: 24396
2005-11-17 18:02:16 +00:00
Chris Lattner
92a1367bed
Generate LA and ADDIS when possible.
...
llvm-svn: 24395
2005-11-17 17:52:01 +00:00
Chris Lattner
c46c672eba
Use the right accessor to create this node
...
llvm-svn: 24394
2005-11-17 17:51:38 +00:00
Chris Lattner
8d04987a39
Add an initial hack at legalizing GlobalAddress into the appropriate nodes
...
on Darwin to remove smarts from the isel. This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file. However, we can currently emit stuff like
this: :)
li r2, lo16(L_x$non_lazy_ptr)
lis r3, ha16(L_x$non_lazy_ptr)
lwzx r2, r3, r2
The obvious improvements will follow.
llvm-svn: 24390
2005-11-17 07:30:41 +00:00
Chris Lattner
5f605f3c12
LI could theoretically be used for the lo-part of a global address, just like
...
lis can be used for the high part.
llvm-svn: 24388
2005-11-17 07:04:43 +00:00
Chris Lattner
7fdf96ed96
When lowering direct calls, lower them to use a targetglobaladress directly
...
instead of a globaladdress. This has no effect on the generated code at all.
llvm-svn: 24386
2005-11-17 05:56:14 +00:00
Nate Begeman
684381a73b
Patch to clean up function call pseudos and support the BLA instruction,
...
which branches to an absolute address. This is required to support objc
direct dispatch.
llvm-svn: 24370
2005-11-16 00:48:01 +00:00
Chris Lattner
bbed9bff31
Make sure to use SwitchSection to switch sections so that we don't accidentally emit
...
functions into the .const section. Whoops.
llvm-svn: 24363
2005-11-15 01:45:01 +00:00
Chris Lattner
baf0cc4e6e
Handle globals with explicit alignment requests
...
llvm-svn: 24355
2005-11-14 19:00:30 +00:00
Chris Lattner
9bfbc74ed4
Teach the PPC asmwriter to honor globals with explicit section requests.
...
llvm-svn: 24353
2005-11-14 18:52:46 +00:00
Chris Lattner
e1435b7831
Make BB and CPI labels use the function number, not the function name as a
...
uniquing id. This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.
llvm-svn: 24295
2005-11-10 21:59:25 +00:00
Chris Lattner
fb66a38f13
Darwin supports quoted labels. This implements:
...
test/Regression/CodeGen/PowerPC/darwin-labels.ll
llvm-svn: 24287
2005-11-10 19:33:43 +00:00
Chris Lattner
7ad799fbc1
Make the aix asm printer interface properly with the parent class
...
llvm-svn: 24274
2005-11-10 18:20:29 +00:00
Chris Lattner
bb448515ae
Add a new option to indicate we want the code generator to emit code quickly,
...
not spending tons of time microoptimizing it. This is useful for an -O0
style of build.
llvm-svn: 24235
2005-11-08 02:12:47 +00:00
Nate Begeman
aecebc076b
Add the necessary support to the ISel to allow targets to codegen the new
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alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
llvm-svn: 24224
2005-11-06 09:00:38 +00:00
Chris Lattner
dc19995e25
add a case Nate sent me
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llvm-svn: 24195
2005-11-05 08:57:56 +00:00
Jim Laskey
4cb1e29b27
Allow itineraries to be passed through the Target Machine.
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llvm-svn: 24139
2005-11-01 20:06:59 +00:00
Chris Lattner
dd58fcaf6b
Add a flag to enable a darwin linker optimization
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llvm-svn: 24130
2005-11-01 00:12:36 +00:00
Chris Lattner
906dc8d0e5
Make constant pool entries use private labels. This is important when you're
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not compiling a whole program at a time :)
llvm-svn: 24129
2005-10-31 22:12:06 +00:00
Chris Lattner
802e8d3a7e
This is implemented
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llvm-svn: 24107
2005-10-30 06:42:12 +00:00
Nate Begeman
da6888930d
New case to handle someday
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llvm-svn: 24075
2005-10-28 23:26:57 +00:00
Chris Lattner
2338614087
Don't emit "32" for unordered comparison
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llvm-svn: 24073
2005-10-28 22:58:07 +00:00
Chris Lattner
28552d8cc8
add a hack to get code with ordered comparisons working. This hack is
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tracked as PR642
llvm-svn: 24068
2005-10-28 20:49:47 +00:00
Chris Lattner
379e078ee6
add support for branch on ordered/unordered.
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llvm-svn: 24067
2005-10-28 20:32:44 +00:00
Chris Lattner
c3f548dceb
Do not globalize internal symbols
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llvm-svn: 24064
2005-10-28 18:44:07 +00:00
Chris Lattner
002ce4f1f8
a bad case for bitfield insert
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llvm-svn: 24051
2005-10-28 00:20:45 +00:00
Jim Laskey
fa6eb200f8
Typo made worse x 2 - take 2.
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llvm-svn: 24018
2005-10-26 18:07:50 +00:00
Chris Lattner
355e7583ab
Fix an assert compiling MallocBench/gs
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llvm-svn: 24017
2005-10-26 18:01:11 +00:00
Jim Laskey
a667b2c9f9
Typo x 2
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llvm-svn: 24016
2005-10-26 17:50:22 +00:00
Jim Laskey
9ce53d8411
Give full control of subtarget features over to table generated code.
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llvm-svn: 24013
2005-10-26 17:30:34 +00:00
Jim Laskey
22e578cd95
Add attribute name and type to SubtargetFeatures.
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llvm-svn: 24012
2005-10-26 17:28:23 +00:00
Nate Begeman
a63b42ad1e
Add a note about some bitfield stuff we could be doing better.
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llvm-svn: 23994
2005-10-25 23:50:02 +00:00
Nate Begeman
c3ab5792e9
Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
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machine. This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.
llvm-svn: 23993
2005-10-25 23:48:36 +00:00
Chris Lattner
e2df44dbb7
autogen undef
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llvm-svn: 23991
2005-10-25 21:03:41 +00:00
Chris Lattner
a701ef16fc
Allow pseudos to have patterns, no functionality change
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llvm-svn: 23988
2005-10-25 20:58:43 +00:00
Chris Lattner
fb373ddb69
Autogen fsel
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llvm-svn: 23987
2005-10-25 20:55:47 +00:00
Chris Lattner
8a53051fb1
Expose the fextend on the DAG instead of doing it in the matcher
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llvm-svn: 23986
2005-10-25 20:54:57 +00:00
Chris Lattner
aaf22bf5c5
Autogen a few new ppc-specific nodes
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llvm-svn: 23985
2005-10-25 20:41:46 +00:00
Chris Lattner
a050c43068
The dag isel generator generates this now
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llvm-svn: 23984
2005-10-25 20:36:10 +00:00
Chris Lattner
115fa976bf
Be a bit more paranoid about calling SelectNodeTo
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llvm-svn: 23982
2005-10-25 20:26:41 +00:00
Chris Lattner
1fe1eab5a8
Fix a couple of minor bugs. The first fixes povray, the second fixes things
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if the dag combiner isn't run
llvm-svn: 23981
2005-10-25 19:32:37 +00:00