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Commit Graph

1629 Commits

Author SHA1 Message Date
Venkatraman Govindaraju
e478c48fa6 [Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers.
llvm-svn: 202616
2014-03-02 06:28:15 +00:00
Venkatraman Govindaraju
b02c5bdb65 [Sparc] Make floating point branch instruction formats to accept %fcc0-%fcc1 conditional registers as input.
No functionality change.

llvm-svn: 202614
2014-03-02 04:43:45 +00:00
Venkatraman Govindaraju
6aea38dc6d [Sparc] Add support for parsing fcmp with %fcc registers.
llvm-svn: 202610
2014-03-02 03:39:39 +00:00
Venkatraman Govindaraju
591cfa469a [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).
llvm-svn: 202604
2014-03-02 02:12:33 +00:00
Venkatraman Govindaraju
1c2ec775cb [SparcV9] Add support for parsing branch instructions with prediction.
llvm-svn: 202602
2014-03-01 22:03:07 +00:00
Venkatraman Govindaraju
44a4d4b894 [Sparc] Add support for parsing annulled branch instructions.
llvm-svn: 202599
2014-03-01 20:08:48 +00:00
Venkatraman Govindaraju
30d1614f94 [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.
llvm-svn: 202598
2014-03-01 18:54:52 +00:00
Venkatraman Govindaraju
96169e7898 [Sparc] Add missing ALU instruction patterns.
llvm-svn: 202597
2014-03-01 17:51:00 +00:00
Venkatraman Govindaraju
9a36f7b46b [Sparc] Add support to decode unimp instruction.
llvm-svn: 202581
2014-03-01 09:28:18 +00:00
Venkatraman Govindaraju
043ff79772 [Sparc] Add support to decode negative simm13 operands in the sparc disassembler.
llvm-svn: 202578
2014-03-01 09:11:57 +00:00
Venkatraman Govindaraju
fcbe857272 [Sparc] Add support for decoding call instructions in the sparc disassembler.
llvm-svn: 202577
2014-03-01 08:30:58 +00:00
Venkatraman Govindaraju
1eb4e172be [Sparc] Add support to disassemble sparc memory instructions.
llvm-svn: 202575
2014-03-01 07:46:33 +00:00
Venkatraman Govindaraju
9242ded302 [Sparc] Implement writeNopData. Emit actual NOP instruction instead of just filling with zeroes.
llvm-svn: 202572
2014-03-01 05:45:09 +00:00
Venkatraman Govindaraju
dd81a65959 [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code.
llvm-svn: 202571
2014-03-01 05:07:21 +00:00
Venkatraman Govindaraju
a60509dc31 [Sparc] 80 column rule. No functionality change.
llvm-svn: 202565
2014-03-01 02:28:34 +00:00
Venkatraman Govindaraju
789e2fd1b7 [Sparc] Add support for parsing directives in SparcAsmParser.
llvm-svn: 202564
2014-03-01 02:18:04 +00:00
Venkatraman Govindaraju
439a7d90a6 [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.
llvm-svn: 202563
2014-03-01 01:04:26 +00:00
Roman Divacky
f36febf578 Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding
expensive libcall. Also, Qp_neg is not implemented on at least
FreeBSD. This is also what gcc is doing.

llvm-svn: 202422
2014-02-27 19:26:29 +00:00
Roman Divacky
2ff7280e46 Add a dwarf number to the Y register.
llvm-svn: 202057
2014-02-24 18:41:31 +00:00
Benjamin Kramer
bb5b968592 SPARC: Implement TRAP lowering. Matches what GCC emits.
llvm-svn: 201994
2014-02-23 21:43:52 +00:00
Roman Divacky
1a91fd1bdc Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.
llvm-svn: 201718
2014-02-19 21:35:39 +00:00
Rafael Espindola
60133f3afe move getNameWithPrefix and getSymbol to TargetMachine.
TargetLoweringBase is implemented in CodeGen, so before this patch we had
a dependency fom Target to CodeGen. This would show up as a link failure of
llvm-stress when building with -DBUILD_SHARED_LIBS=ON.

This fixes pr18900.

llvm-svn: 201711
2014-02-19 20:30:41 +00:00
Rafael Espindola
aea6192f20 Add back r201608, r201622, r201624 and r201625
r201608 made llvm corretly handle private globals with MachO. r201622 fixed
a bug in it and r201624 and r201625 were changes for using private linkage,
assuming that llvm would do the right thing.

They all got reverted because r201608 introduced a crash in LTO. This patch
includes a fix for that. The issue was that TargetLoweringObjectFile now has
to be initialized before we can mangle names of private globals. This is
trivially true during the normal codegen pipeline (the asm printer does it),
but LTO has to do it manually.

llvm-svn: 201700
2014-02-19 17:23:20 +00:00
Daniel Jasper
bf4e7d8ac3 Revert r201622 and r201608.
This causes the LLVMgold plugin to segfault. More information on the
replies to r201608.

llvm-svn: 201669
2014-02-19 12:26:01 +00:00
Rafael Espindola
d39a573c72 Fix PR18743.
The IR
@foo = private constant i32 42

is valid, but before this patch we would produce an invalid MachO from it. It
was invalid because it would use an L label in a section where the liker needs
the labels in order to atomize it.

One way of fixing it would be to just reject this IR in the backend, but that
would not be very front end friendly.

What this patch does is use an 'l' prefix in sections that we know the linker
requires symbols for atomizing them. This allows frontends to just use
private and not worry about which sections they go to or how the linker handles
them.

One small issue with this strategy is that now a symbol name depends on the
section, which is not available before codegen. This is not a problem in
practice. The reason is that it only happens with private linkage, which will
be ignored by the non codegen users (llvm-nm and llvm-ar).

llvm-svn: 201608
2014-02-18 22:24:57 +00:00
Daniel Sanders
7a3a160940 Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for
targets with mature MC support. Such targets will always parse the inline
assembly (even when emitting assembly). Targets without mature MC support
continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced
with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler
to parse inline assembly (even when emitting assembly output). UseIntegratedAs
is set to true for targets that consider any failure to parse valid assembly
to be a bug. Target specific subclasses generally enable the integrated
assembler in their constructor. The default value can be overridden with
-no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example,
those that use mnemonics such as 'foo' or 'hello world') have been updated to
disable the integrated assembler.

Changes since review (and last commit attempt):
- Fixed test failures that were missed due to configuration of local build.
  (fixes crash.ll and a couple others).
- Fixed tests that happened to pass because the local build was on X86
  (should fix 2007-12-17-InvokeAsm.ll)
- mature-mc-support.ll's should no longer require all targets to be compiled.
  (should fix ARM and PPC buildbots)
- Object output (-filetype=obj and similar) now forces the integrated assembler
  to be enabled regardless of default setting or -no-integrated-as.
  (should fix SystemZ buildbots)

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686

llvm-svn: 201333
2014-02-13 14:44:26 +00:00
Daniel Sanders
656c4d360b Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
It introduced multiple test failures in the buildbots.

llvm-svn: 201241
2014-02-12 15:39:20 +00:00
Daniel Sanders
e647d6441b Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler.

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686

llvm-svn: 201237
2014-02-12 14:44:54 +00:00
Rafael Espindola
8815574a16 Use a consistent argument order in TargetLoweringObjectFile.
These methods normally call each other and it is really annoying if the
arguments are in different order. The more common rule was that the arguments
specific to call are first (GV, Encoding, Suffix) and the auxiliary objects
(Mang, TM) come after. This patch changes the exceptions.

llvm-svn: 201044
2014-02-09 14:50:44 +00:00
Rafael Espindola
8d47aa1e4e Pass the Mangler by reference.
It is never null and it is not used in casts, so there is no reason to use a
pointer. This matches how we pass TM.

llvm-svn: 201025
2014-02-08 14:53:28 +00:00
Rafael Espindola
1d50d1310d Add LLVM_OVERRIDE to a few declarations.
llvm-svn: 201022
2014-02-08 06:07:27 +00:00
Venkatraman Govindaraju
b3d477bcf8 [Sparc] Add support for parsing synthetic instruction 'mov'.
llvm-svn: 200965
2014-02-07 09:06:52 +00:00
Venkatraman Govindaraju
772dbc91ad [Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding.
llvm-svn: 200963
2014-02-07 07:34:49 +00:00
Venkatraman Govindaraju
b475c5619b [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used.
llvm-svn: 200962
2014-02-07 05:54:20 +00:00
Venkatraman Govindaraju
3eb62616b0 [Sparc] Emit correct relocations for PIC code when integrated assembler is used.
llvm-svn: 200961
2014-02-07 04:24:35 +00:00
Venkatraman Govindaraju
a1dcac0c57 [Sparc] Use SparcMCExpr::VariantKind itself as MachineOperand's target flags.
llvm-svn: 200960
2014-02-07 02:36:06 +00:00
Rafael Espindola
c27ddf11ba Just returning false is the default.
llvm-svn: 200890
2014-02-06 00:03:15 +00:00
Rafael Espindola
98165a6a91 Remove support for not using .loc directives.
Clang itself was not using this. The only way to access it was via llc.

llvm-svn: 200862
2014-02-05 18:00:21 +00:00
Venkatraman Govindaraju
9c2c79ab67 [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.
llvm-svn: 200617
2014-02-01 18:54:16 +00:00
Venkatraman Govindaraju
b0c5799fbd [Sparc] Save and restore float registers that may be used for parameter passing.
llvm-svn: 200509
2014-01-31 01:53:08 +00:00
Jakob Stoklund Olesen
412a5b3d9b Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

llvm-svn: 200453
2014-01-30 04:48:46 +00:00
Venkatraman Govindaraju
a50ca1f645 [Sparc] Use %r_disp32 for pc_rel entries in FDE as well.
This makes MCAsmInfo::getExprForFDESymbol() a virtual function and overrides it in SparcMCAsmInfo.

llvm-svn: 200376
2014-01-29 06:59:20 +00:00
Venkatraman Govindaraju
1541483555 [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.
Otherwise, assembler (gas) fails to assemble them with error message "operation
combines symbols in different segments". This is because MC computes
pc_rel entries with subtract expression between labels from different sections.

llvm-svn: 200373
2014-01-29 04:51:35 +00:00
Venkatraman Govindaraju
416f0c2389 [SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9.
llvm-svn: 200368
2014-01-29 03:35:08 +00:00
David Woodhouse
0cc2f6368a [Sparc] Fix breakage in r200345
Oops. Don't do build tests on patches like that with --enable-targets=x86_64

llvm-svn: 200355
2014-01-28 23:38:16 +00:00
David Woodhouse
a79a37b435 Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()
llvm-svn: 200349
2014-01-28 23:13:18 +00:00
David Woodhouse
4a4c611e36 Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()
llvm-svn: 200348
2014-01-28 23:13:07 +00:00
David Woodhouse
5d0b529d58 Change MCStreamer EmitInstruction interface to take subtarget info
llvm-svn: 200345
2014-01-28 23:12:42 +00:00
Jakob Stoklund Olesen
8a060724b3 Fix the DWARF EH encodings for Sparc PIC code.
Also emit the stubs that were generated for references to typeinfo
symbols.

llvm-svn: 200282
2014-01-28 02:52:26 +00:00
Jakob Stoklund Olesen
8dcf39e4f3 Clean up the Legal/Expand logic for SPARC popc.
llvm-svn: 200141
2014-01-26 08:12:34 +00:00
Rafael Espindola
bfdd58b802 Pass a MCSubtargetInfo down to the TargetStreamer creation.
With this the target streamers will be able to know the target features that
are in use.

llvm-svn: 200135
2014-01-26 06:38:58 +00:00
Jakob Stoklund Olesen
6804208a8e Only generate the popc instruction for SPARC CPUs that implement it.
The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

llvm-svn: 200131
2014-01-26 06:09:59 +00:00
Jakob Stoklund Olesen
0e9b704ac9 Fix swapped CASA operands.
Found by SingleSource/UnitTests/AtomicOps.c

llvm-svn: 200130
2014-01-26 06:09:54 +00:00
Rafael Espindola
806f778fa0 Construct the MCStreamer before constructing the MCTargetStreamer.
This has a few advantages:
* Only targets that use a MCTargetStreamer have to worry about it.
* There is never a MCTargetStreamer without a MCStreamer, so we can use a
  reference.
* A MCTargetStreamer can talk to the MCStreamer in its constructor.

llvm-svn: 200129
2014-01-26 06:06:37 +00:00
Alp Toker
1c4b33e8e5 Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
2014-01-24 17:20:08 +00:00
Venkatraman Govindaraju
460f7b8fd5 [SparcV9] Add support for JIT in Sparc64.
With this change, all supported tests in test/ExecutionEngine pass in sparcv9.

llvm-svn: 199977
2014-01-24 07:10:19 +00:00
Jakob Stoklund Olesen
95b427580f Implement atomicrmw operations in 32 and 64 bits for SPARCv9.
These all use the compare-and-swap CASA/CASXA instructions.

llvm-svn: 199975
2014-01-24 06:23:31 +00:00
Venkatraman Govindaraju
740a35b34e [Sparc] Correct quad register list in the asm parser.
Add test cases to check parsing of v9 double registers and their aliased quad registers.

llvm-svn: 199974
2014-01-24 05:24:01 +00:00
Eric Christopher
c95f6a21a3 Fix out of bounds access to the double regs array. Given the
code this looks correct, but could use review. The previous
was definitely not correct.

llvm-svn: 199940
2014-01-23 21:41:10 +00:00
Venkatraman Govindaraju
2dcfaac1b8 [Sparc] Add support for inline assembly constraints which specify registers by their aliases.
llvm-svn: 199786
2014-01-22 03:18:42 +00:00
Venkatraman Govindaraju
6c498f0e2f [Sparc] Add support for inline assembly constraint 'I'.
llvm-svn: 199781
2014-01-22 01:29:51 +00:00
Venkatraman Govindaraju
0a2da12ffd [Sparc] Do not add PC to _GLOBAL_OFFSET_TABLE_ address to access GOT in absolute code.
Fixes PR#18521

llvm-svn: 199775
2014-01-22 00:13:18 +00:00
Lang Hames
28c512a65e Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).

Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.

llvm-svn: 199252
2014-01-14 19:56:36 +00:00
Rafael Espindola
ebbf4c6cd5 Make getTargetStreamer return a possibly null pointer.
This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.

llvm-svn: 199174
2014-01-14 01:21:46 +00:00
Jakob Stoklund Olesen
026885712c Handle bundled terminators in isBlockOnlyReachableByFallthrough.
Targets like SPARC and MIPS have delay slots and normally bundle the
delay slot instruction with the corresponding terminator.

Teach isBlockOnlyReachableByFallthrough to find any MBB operands on
bundled terminators so SPARC doesn't need to specialize this function.

llvm-svn: 199061
2014-01-12 19:24:08 +00:00
Venkatraman Govindaraju
816c9a7dd9 [Sparc] Add support for parsing floating point instructions.
llvm-svn: 199033
2014-01-12 04:48:54 +00:00
Venkatraman Govindaraju
47a7e0f563 [Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.
llvm-svn: 199031
2014-01-12 04:34:31 +00:00
Jakob Stoklund Olesen
3dd52f1fbd The SPARCv9 ABI returns a float in %f0.
This is different from the argument passing convention which puts the
first float argument in %f1.

With this patch, all returned floats are treated as if the 'inreg' flag
were set. This means multiple float return values get packed in %f0,
%f1, %f2, ...

Note that when returning a struct in registers, clang will set the
'inreg' flag on the return value, so that behavior is unchanged. This
also happens when returning a float _Complex.

llvm-svn: 199028
2014-01-12 04:13:17 +00:00
Venkatraman Govindaraju
406e85c8e3 [Sparc] Add missing processor types: v7 and niagara
llvm-svn: 199024
2014-01-11 23:56:13 +00:00
Venkatraman Govindaraju
db6b1cbac8 [Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.
llvm-svn: 199014
2014-01-11 19:38:03 +00:00
Venkatraman Govindaraju
b0841deda2 [Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.
llvm-svn: 198910
2014-01-10 02:55:27 +00:00
Venkatraman Govindaraju
c4cec3f2a4 [Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.
llvm-svn: 198909
2014-01-10 01:48:17 +00:00
Venkatraman Govindaraju
ae0e1515ef [Sparc] Multiclass for loads/stores. No functionality change intended.
llvm-svn: 198893
2014-01-09 21:49:18 +00:00
Venkatraman Govindaraju
0e7023f897 [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly.
llvm-svn: 198740
2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju
31a117588f [Sparc] Correct the mask for fixup_sparc_br19.
llvm-svn: 198739
2014-01-08 06:46:51 +00:00
Venkatraman Govindaraju
d26e61b5c9 [Sparc] Add support for parsing branch instructions and conditional moves.
llvm-svn: 198738
2014-01-08 06:14:52 +00:00
Rafael Espindola
4dc5af8bc2 Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708
2014-01-07 21:19:40 +00:00
Chandler Carruth
87f14b4eec Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Venkatraman Govindaraju
69760d5a12 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc.,
Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681
2014-01-07 08:00:49 +00:00
Venkatraman Govindaraju
a9c093fcc8 [Sparc] Add support for parsing memory operands in sparc AsmParser.
llvm-svn: 198658
2014-01-07 01:49:11 +00:00
Venkatraman Govindaraju
d02a9d52c6 [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.
llvm-svn: 198592
2014-01-06 08:24:44 +00:00
Venkatraman Govindaraju
63a6ceb84a [Sparc] Add initial implementation of disassembler for sparc
llvm-svn: 198591
2014-01-06 08:08:58 +00:00
Bill Wendling
e1a9065ca0 Remove unnecessary #includes.
llvm-svn: 198585
2014-01-06 06:00:00 +00:00
Venkatraman Govindaraju
ceef0920b0 [Sparc] Add ELF Object Writer for Sparc.
llvm-svn: 198580
2014-01-06 01:22:54 +00:00
Bill Wendling
c3b5643da4 Refactor function that checks that __builtin_returnaddress's argument is constant.
This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

llvm-svn: 198579
2014-01-06 00:43:20 +00:00
Benjamin Kramer
f5f440b00b SPARC: Make helper function static.
llvm-svn: 198567
2014-01-05 20:26:05 +00:00
Venkatraman Govindaraju
7b675d45b0 [Sparc] Add initial implementation of MC Code emitter for sparc.
llvm-svn: 198533
2014-01-05 02:13:48 +00:00
Bill Wendling
be9af41475 Emit an error message if the value passed to __builtin_returnaddress isn't a constant
__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

llvm-svn: 198531
2014-01-05 01:47:20 +00:00
Venkatraman Govindaraju
25bd5d1ff3 [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.
llvm-svn: 198484
2014-01-04 11:30:13 +00:00
Venkatraman Govindaraju
bfcef24b91 [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64.
Fixes PR18356.

llvm-svn: 198480
2014-01-04 07:17:21 +00:00
Rafael Espindola
eae6386a1e Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

llvm-svn: 198438
2014-01-03 19:21:54 +00:00
Venkatraman Govindaraju
cb22135b23 [Sparc] Handle atomic loads/stores in sparc backend.
llvm-svn: 198286
2014-01-01 22:11:54 +00:00
Venkatraman Govindaraju
e8745ffca1 [SparcV9]: Custom lower UMULO/SMULO so that the arguments are send to __multi3() in correct order.
llvm-svn: 198281
2014-01-01 20:22:45 +00:00
Venkatraman Govindaraju
2fc6090f42 [SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does.
llvm-svn: 198280
2014-01-01 19:00:10 +00:00
Venkatraman Govindaraju
451c278cbc [SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns.
This is done to avoid spilling the result of the 64-bit instructions to a 4-byte slot.

llvm-svn: 198157
2013-12-29 07:15:09 +00:00
Venkatraman Govindaraju
d46a491054 [SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall().
This makes the sparc backend to generate Sparc64 ABI compliant code.

llvm-svn: 198149
2013-12-29 04:27:21 +00:00
Venkatraman Govindaraju
05510dd426 [SparcV9]: Implement lowering of long double (fp128) arguments in Sparc64 ABI.
Also, pass fp128 arguments to varargs through integer registers if necessary.

llvm-svn: 198145
2013-12-29 01:20:36 +00:00
Venkatraman Govindaraju
8c2d10768d [Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.
llvm-svn: 198030
2013-12-26 01:49:59 +00:00
Venkatraman Govindaraju
7e519426f2 [Sparc] Add target specific MCExpr class to handle sparc specific modifiers like %hi, %lo, etc.,
llvm-svn: 198029
2013-12-26 00:01:52 +00:00
Venkatraman Govindaraju
409105f47e [Sparc] Add MCInstPrinter implementation for SPARC.
llvm-svn: 198028
2013-12-25 23:43:39 +00:00