Andrew Trick
dfa31b1cf9
Minor cleanup related to my latest scheduler changes.
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llvm-svn: 122545
2010-12-24 07:10:19 +00:00
Andrew Trick
c926e98fc7
Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
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llvm-svn: 122544
2010-12-24 06:46:50 +00:00
Andrew Trick
134b2a5907
Various bits of framework needed for precise machine-level selection
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DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
llvm-svn: 122541
2010-12-24 05:03:26 +00:00
Andrew Trick
53f4556c64
whitespace
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llvm-svn: 122539
2010-12-24 04:28:06 +00:00
Cameron Zwarich
a7ad357a13
Simplify a check for implicit defs and remove a FIXME.
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llvm-svn: 122537
2010-12-24 03:09:36 +00:00
Kevin Enderby
ff7e68c5e7
In llvm-mc parse a Hash token as a full line comment. Allows handling of
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preprocessed .s files and matches darwin gas. rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.
llvm-svn: 122531
2010-12-24 00:12:02 +00:00
Jim Grosbach
7fc4f99084
Use a StringSwitch<> instead of a manually constructed string matcher.
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llvm-svn: 122530
2010-12-24 00:03:39 +00:00
Owen Anderson
6afd90810e
When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero
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are not the low bits of x, but the bits that WILL be the low bits after the operation completes.
llvm-svn: 122529
2010-12-23 23:56:24 +00:00
Evan Cheng
ea28d16e36
Code clean up. No functionality change.
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llvm-svn: 122528
2010-12-23 23:54:17 +00:00
Jim Grosbach
03a39130cb
Remove dead patterns.
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llvm-svn: 122524
2010-12-23 23:20:13 +00:00
Jim Grosbach
14f46d80df
Recognize a few more documented register name aliases for ARM in the asm lexer.
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llvm-svn: 122523
2010-12-23 23:19:54 +00:00
Bob Wilson
85dbc89f44
Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.
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If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.
llvm-svn: 122521
2010-12-23 22:45:49 +00:00
Owen Anderson
be8084acdd
It is possible for SimplifyCFG to cause PHI nodes to become redundant too late in the optimization
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pipeline to be caught by instcombine, and it's not feasible to catch them in SimplifyCFG because the
use-lists are in an inconsistent state at the point where it could know that it need to simplify them.
Instead, have CodeGenPrepare look for trivially redundant PHIs as part of its general cleanup effort.
llvm-svn: 122516
2010-12-23 20:57:35 +00:00
Chris Lattner
01e8c46349
Flag -> Glue, the ongoing saga
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llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Chris Lattner
b607e7deda
flags -> glue for selectiondag
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llvm-svn: 122509
2010-12-23 17:24:32 +00:00
Chris Lattner
fb9ff7a4ff
sdisel flag -> glue.
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llvm-svn: 122507
2010-12-23 17:13:18 +00:00
Benjamin Kramer
0a0e2c55c4
Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string.
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llvm-svn: 122496
2010-12-23 15:32:07 +00:00
Benjamin Kramer
b21118c91b
Remove some obsolete README items, add a new one off the top of my head.
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llvm-svn: 122495
2010-12-23 15:07:02 +00:00
Andrew Trick
ca2e267ddc
Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue.
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llvm-svn: 122491
2010-12-23 05:42:20 +00:00
Andrew Trick
c046a115d4
Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle.
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llvm-svn: 122474
2010-12-23 04:16:14 +00:00
Andrew Trick
e48d5d8395
In CheckForLiveRegDef use TRI->getOverlaps.
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llvm-svn: 122473
2010-12-23 03:43:21 +00:00
Andrew Trick
cc701bcfdc
Fixes PR8823: add-with-overflow-128.ll
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In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.
llvm-svn: 122472
2010-12-23 03:15:51 +00:00
Mon P Wang
eb2ae28352
Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo
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llvm-svn: 122462
2010-12-23 01:41:32 +00:00
Jeffrey Yasskin
a199652a3e
Change all self assignments X=X to (void)X, so that we can turn on a
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new gcc warning that complains on self-assignments and
self-initializations.
llvm-svn: 122458
2010-12-23 00:58:24 +00:00
Jim Grosbach
b0e9926c33
Trailing whitespace.
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llvm-svn: 122456
2010-12-22 23:26:02 +00:00
Benjamin Kramer
49942a90b7
DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
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example code:
unsigned foo(unsigned x, unsigned y) {
if (x != 0) y--;
return y;
}
before:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
notl %eax ## encoding: [0xf7,0xd0]
addl 8(%esp), %eax ## encoding: [0x03,0x44,0x24,0x08]
ret ## encoding: [0xc3]
after:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
movl 8(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
adcl $-1, %eax ## encoding: [0x83,0xd0,0xff]
ret ## encoding: [0xc3]
llvm-svn: 122455
2010-12-22 23:17:45 +00:00
Benjamin Kramer
27d13684f5
InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1.
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llvm-svn: 122453
2010-12-22 23:12:15 +00:00
Benjamin Kramer
d8387aa9bd
X86: Lower a select directly to a setcc_carry if possible.
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int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
_test: ## @test
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
ret ## encoding: [0xc3]
instead of
_test: ## @test
xorl %ecx, %ecx ## encoding: [0x31,0xc9]
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff]
cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1]
ret ## encoding: [0xc3]
llvm-svn: 122451
2010-12-22 23:09:28 +00:00
Rafael Espindola
9e462b3734
Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been
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fixed.
llvm-svn: 122448
2010-12-22 22:16:24 +00:00
Rafael Espindola
3897d5e658
Assert that the AddrDelta expression is really constant and wrap it in a set
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if we have a lame assembler.
llvm-svn: 122446
2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen
f761c75efb
When RegAllocGreedy decides to spill the interferences of the current register,
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pick the victim with the lowest total spill weight.
llvm-svn: 122445
2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen
71e527ef4b
Include a shadow of the original CFG edges in the edge bundle graph.
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llvm-svn: 122444
2010-12-22 22:01:28 +00:00
Rafael Espindola
81ac7c5fad
Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much
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better name and matches what is used in the MachO writer.
llvm-svn: 122443
2010-12-22 21:51:29 +00:00
Daniel Dunbar
e6ec0e7149
MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups.
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llvm-svn: 122441
2010-12-22 21:26:43 +00:00
Rafael Espindola
6baac40d13
Revert r122359 while I debug PR8845.
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llvm-svn: 122427
2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay
2a54f466cf
Fix another conditional expression mismatched enum type warning.
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llvm-svn: 122419
2010-12-22 18:25:55 +00:00
Duncan Sands
68d969c2f5
When determining whether the new instruction was already present in
...
the original instruction, half the cases were missed (making it not
wrong but suboptimal). Also correct a typo (A <-> B) in the second
chunk.
llvm-svn: 122414
2010-12-22 17:15:25 +00:00
Daniel Dunbar
cb8ac619a2
MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is
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esp. important given that the LOCAL_SECTDIFF enumeration got redefined.
llvm-svn: 122412
2010-12-22 16:52:19 +00:00
Daniel Dunbar
63f7a3a108
MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I figure out how it is supposed to work.
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llvm-svn: 122410
2010-12-22 16:45:29 +00:00
Daniel Dunbar
985567aebc
MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds.
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llvm-svn: 122409
2010-12-22 16:32:41 +00:00
Daniel Dunbar
d85743ca7a
MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds.
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llvm-svn: 122408
2010-12-22 16:32:37 +00:00
Daniel Dunbar
e44a2c1166
MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations.
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llvm-svn: 122407
2010-12-22 16:19:24 +00:00
Daniel Dunbar
55eff2421b
MC/Mach-O/ARM: Fix thinko.
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llvm-svn: 122406
2010-12-22 16:19:20 +00:00
Rafael Espindola
c05eac148d
Use references and simplify.
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llvm-svn: 122405
2010-12-22 16:11:57 +00:00
Rafael Espindola
7c995a90fc
Simplify the handling of .size expressions.
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llvm-svn: 122404
2010-12-22 16:03:00 +00:00
Daniel Dunbar
17e19b2d45
MC/Mach-O/ARM: Stub out RecordARMRelocation, which is mostly a copy of
...
RecordRelocation with lots of FIXMEs.
llvm-svn: 122402
2010-12-22 13:50:05 +00:00
Daniel Dunbar
8db4843cd3
Simplify.
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llvm-svn: 122401
2010-12-22 13:49:56 +00:00
Daniel Dunbar
bc2bf96e91
MC/Mach-O: Split out RecordARMRelocation for now, it is weird enough it isn't
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clear how to keep in the generic path (yet).
- Will revisit when it actually works.
llvm-svn: 122400
2010-12-22 13:49:43 +00:00
Duncan Sands
922251757b
Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C)
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if both A op B and A op C simplify. This fires fairly often but doesn't
make that much difference. On gcc-as-one-file it removes two "and"s and
turns one branch into a select.
llvm-svn: 122399
2010-12-22 13:36:08 +00:00
Che-Liang Chiou
e73ad4387e
ptx: add ld instruction and test
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llvm-svn: 122398
2010-12-22 10:38:51 +00:00