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Commit Graph

120273 Commits

Author SHA1 Message Date
Tom Stellard
dfc5991339 AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions
Summary:
With InstAlias, we don't need to print the _e32 portion of the mnemonic
when we print the $dst operand.  This change makes it possible to
include vcc in the asm string when we switch VOPC over to having
implicit vcc defs.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11813

llvm-svn: 244362
2015-08-07 22:00:56 +00:00
Sanjay Patel
d2b53ea457 redo r244360 (tighten checks...) after specifying triple
llvm-svn: 244361
2015-08-07 21:42:24 +00:00
Sanjay Patel
5037c7782e tighten checks using update_llc_test_checks.py
llvm-svn: 244360
2015-08-07 21:38:53 +00:00
Alex Lorenz
7b9ddd3d95 MIR Serialization: Serialize the base alignment for the machine memory operands.
llvm-svn: 244357
2015-08-07 20:48:30 +00:00
Alex Lorenz
39e2231276 MIR Serialization: Serialize the offsets for the machine memory operands.
llvm-svn: 244356
2015-08-07 20:26:52 +00:00
Alex Lorenz
7a90618f38 MIR Parser: Extract the parsing of the operand's offset into a new method. NFC.
This commit extract the code that parses the 64-bit offset from the method
'parseOperandsOffset' to a new method 'parseOffset' so that we can reuse it
when parsing the offset for the machine memory operands.

llvm-svn: 244355
2015-08-07 20:21:00 +00:00
Matt Arsenault
b7690a5199 AMDGPU: Assume SMRD access for constant address space
Since r243294 these are selected to SMRD and
moved later if required.

llvm-svn: 244354
2015-08-07 20:18:34 +00:00
Rafael Espindola
731b9ea15f Don't look for a SHT_DYNSYM in the ELFFile's constructor.
Yet another step in not having it scan every section.

llvm-svn: 244353
2015-08-07 20:11:08 +00:00
Craig Topper
ff53ab3a44 Add Intel family 6 model 90 as Silvermont. Fixes PR24392.
llvm-svn: 244352
2015-08-07 20:09:42 +00:00
Rafael Espindola
246909bb95 Remove the symbol iteration functions that don't take a symbol table.
Another step in making ELFFile's constructor not iterate over all sections.

llvm-svn: 244351
2015-08-07 20:07:27 +00:00
Adam Nemet
59fd1cc3c9 [LAA] Remove unused pointer partition argument from print(), NFC
This is now handled in the client.  No need for LAA to provide this
variant.

llvm-svn: 244349
2015-08-07 19:44:48 +00:00
Chen Li
ef70e358a3 [ConstantFoldTerminator] Preserve make.implicit metadata when converting SwitchInst to BranchInst
Summary: llvm::ConstantFoldTerminator function can convert SwitchInst with single case (and default) to a conditional BranchInst. This patch adds support to preserve make.implicit metadata on this conversion.

Reviewers: sanjoy, weimingz, chenli

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D11841

llvm-svn: 244348
2015-08-07 19:30:12 +00:00
Frederic Riss
f618de09d4 [MCDwarf] Use more idiomatic [u]int8_t types.
llvm-svn: 244347
2015-08-07 19:19:44 +00:00
Simon Pilgrim
c31bcce147 [InstCombine] Fix SSE2/AVX2 vector logical shift by constant
This patch fixes the sse2/avx2 vector shift by constant instcombine call to correctly deal with the fact that the shift amount is formed from the entire lower 64-bit and not just the lowest element as it currently assumes.

e.g.

%1 = tail call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %v, <4 x i32> <i32 15, i32 15, i32 15, i32 15>)

In this case, (V)PSRLD doesn't perform a lshr by 15 but in fact attempts to shift by 64424509455 ((15 << 32) | 15) - giving a zero result.

In addition, this review also recognizes shift-by-zero from a ConstantAggregateZero type (PR23821).

Differential Revision: http://reviews.llvm.org/D11760

llvm-svn: 244341
2015-08-07 18:22:50 +00:00
Cong Hou
ce64545c16 NFC.
Use a parent class to avoid reduncant code when specializing GraphTraits for T and const T.

llvm-svn: 244340
2015-08-07 18:04:17 +00:00
Nico Weber
b3a3522ac1 Add functions to save and restore the PrettyStackTrace state.
PrettyStackTraceHead is a LLVM_THREAD_LOCAL, which means it's just a global
in LLVM_ENABLE_THREADS=NO builds.  If a CrashRecoveryContext is used with
code that uses PrettyStackEntries, and a crash happens, PrettyStackTraceHead is
currently not reset to its pre-crash value.  These functions make it possible
to add a cleanup to such code that does this.

(Not reseting the value then causes the assert in ~PrettyStackTraceEntry() to
fire if the code outside of the CrashRecoveryContext also uses
PrettyStackEntries -- for example, clang when building a module.)

Part of PR11974.

llvm-svn: 244338
2015-08-07 17:47:03 +00:00
Nico Weber
198bc9060d Add a comment.
llvm-svn: 244337
2015-08-07 17:32:06 +00:00
Rafael Espindola
0fb3af3648 Delete dead code. NFC.
llvm-svn: 244335
2015-08-07 17:06:05 +00:00
Chad Rosier
defd3944ce [ARM] Remove an unused reference to MachineRegisterInfo. NFC.
llvm-svn: 244334
2015-08-07 17:02:29 +00:00
Rafael Espindola
186d9c2b83 Don't use a DenseMap to handle SHT_SYMTAB_SHNDX.
It is already a convenient table.

llvm-svn: 244333
2015-08-07 16:51:44 +00:00
Tom Stellard
162c8c165f AMDGPU/SI: Use correct encoding of vopc for VI in the assembler
Summary: We were using the SI encoding for VI.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11812

llvm-svn: 244332
2015-08-07 16:45:33 +00:00
Tom Stellard
83c4e6365d AMDGPU/SI: Add VI checks to vop3 assembler tests
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11811

llvm-svn: 244331
2015-08-07 16:45:30 +00:00
Eric Christopher
65dbfa2fff We're actually -Wmissing-field-initializers clean thanks to the cmake
build so check and turn on -Wmissing-field-initializers. While there,
reorganize the conditional warning code based on compiler to be a bit
more obvious and inside a switch statement.

llvm-svn: 244330
2015-08-07 16:44:47 +00:00
Rafael Espindola
cd0f8af304 Delete dead typedef. NFC.
llvm-svn: 244328
2015-08-07 16:36:47 +00:00
Frederic Riss
dfb0d2fac5 Use 'signed char' instead of 'char'
Hope this fixes the s390 and aarch64 bots.

llvm-svn: 244327
2015-08-07 16:31:59 +00:00
Rafael Espindola
e75ec1768a add missing tests files
llvm-svn: 244323
2015-08-07 15:35:49 +00:00
Tom Stellard
ae73825453 AMDGPU/SI: v_mac_legacy_f32 does not exist on VI
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11810

llvm-svn: 244322
2015-08-07 15:34:30 +00:00
Tom Stellard
9bf2e6849b AMDGPU/SI: Remove unused outs parameter from VOPC TableGen classes
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11809

llvm-svn: 244321
2015-08-07 15:34:27 +00:00
Rafael Espindola
0d29f912e2 Add dynamic_table iterators back to ELF.h.
In tree they are only used by llvm-readobj, but it is also used by
https://github.com/mono/CppSharp.

While at it, add some missing error checking.

llvm-svn: 244320
2015-08-07 15:25:20 +00:00
Frederic Riss
fd14836f8a [dsymutil] Use the new MCDwarfLineTableParams customization to emit linetables
llvm-dsymutil has to be able to process debug info produced by other compilers
which use different line table settings. The testcase wasn't generated by
another compiler, but by a modified clang.

llvm-svn: 244319
2015-08-07 15:14:13 +00:00
Frederic Riss
d75746ed42 [MC/Dwarf] Allow to specify custom parameters for linetable emission.
NFC patch for current users, but llvm-dsymutil will use the new
functionality to adapt to the input linetable.

Based on a patch by Adrian Prantl.

llvm-svn: 244318
2015-08-07 15:14:08 +00:00
Silviu Baranga
0957d36dd5 Fix unused variable warning introduced in r244314
llvm-svn: 244315
2015-08-07 12:05:46 +00:00
Silviu Baranga
f1f3f2018c [ARM] Update ReconstructShuffle to handle mismatched types
Summary:
Port the ReconstructShuffle function from AArch64 to ARM
to handle mismatched incoming types in the BUILD_VECTOR
node.

This fixes an outstanding FIXME in the ReconstructShuffle
code.

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11720

llvm-svn: 244314
2015-08-07 11:40:46 +00:00
John Brawn
093484721d Revert "Make global aliases have symbol size equal to their type"
This reverts r242520, as it caused pr24379. Also removes part of the test added
by r243874 that checks the size of alias symbols.

llvm-svn: 244313
2015-08-07 10:56:21 +00:00
NAKAMURA Takumi
1d0baba5b6 Tweak llvm/test/tools/dsymutil/arch-option.test to avoid globbing on mingw-w64.
llvm-svn: 244311
2015-08-07 08:38:22 +00:00
NAKAMURA Takumi
dc1fe4b07d ShrinkWrap.cpp: Tweak r244235 for a non-functional member, PredicateFtor. [-Wdocumentation]
llvm-svn: 244309
2015-08-07 07:40:23 +00:00
JF Bastien
c6f87ed268 WebAssembly: textual emission uses expected opcode names
Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files.

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11776

llvm-svn: 244305
2015-08-07 01:57:03 +00:00
Tom Stellard
f76ed1f361 ELF: Add AMDGPU specific defintions
Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11458

llvm-svn: 244303
2015-08-07 01:35:24 +00:00
Duncan P. N. Exon Smith
5607ee4237 ValueMapper: Resolve uniquing cycles more aggressively
As a follow-up to r244181, resolve uniquing cycles underneath distinct
nodes on the fly.  This prevents uniquing cycles in early operands from
affecting later operands.  It also removes an iteration through distinct
nodes' operands.

No real functional change here, just more prompt resolution of temporary
nodes.

llvm-svn: 244302
2015-08-07 00:44:55 +00:00
Duncan P. N. Exon Smith
c55e88eaa6 ValueMapper: Pull out helper to resolve cycles, NFC
Pull out a helper for resolving uniquing cycles of `Metadata` to remove
the boiler-plate of downcasting to `MDNode`.

llvm-svn: 244301
2015-08-07 00:39:26 +00:00
Davide Italiano
19ff587956 [llvm-readobj] Convert to range-loops.
llvm-svn: 244300
2015-08-07 00:35:28 +00:00
Alex Lorenz
28c3634e6a MIR Serialization: Fix serialization of unnamed IR block references.
The block address machine operands can reference IR blocks in other functions.
This commit fixes a bug where the references to unnamed IR blocks in other
functions weren't serialized correctly.

llvm-svn: 244299
2015-08-06 23:57:04 +00:00
Alex Lorenz
cc4cd5aa06 MIR Parser: Simplify the token's string value handling.
This commit removes the 'StringOffset' and 'HasStringValue' fields from the
MIToken struct and simplifies the 'stringValue' method which now returns
the new 'StringValue' field.

This commit also adopts a different way of initializing the lexed tokens -
instead of constructing a new MIToken instance, the lexer resets the old token
using the new 'reset' method and sets its attributes using the new
'setStringValue', 'setOwnedStringValue', and 'setIntegerValue' methods.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D11792

llvm-svn: 244295
2015-08-06 23:17:42 +00:00
Sean Silva
f1b588c0d9 [LangRef] Cleanup some stray whitespace inconsistencies.
Patch by Debora Setton Sanches! <setton.debora@gmail.com>

llvm-svn: 244294
2015-08-06 22:56:48 +00:00
Sean Silva
0d33c28ae4 [LangRef] Tiny editorial fixes.
Patch by Debora Setton Sanches! <setton.debora@gmail.com>

llvm-svn: 244293
2015-08-06 22:56:24 +00:00
Alex Lorenz
cc2bbc9083 Add initial documentation for the MIR serialization format.
Differential Revision: http://reviews.llvm.org/D11736

llvm-svn: 244292
2015-08-06 22:55:19 +00:00
Juergen Ributzka
fb208d24f5 [AArch64][FastISel] Always use AND before checking the branch flag.
When we are not emitting the condition for the branch, because the condition is
in another BB or SDAG did the selection for us, then we have to mask the flag in
the register with AND.

This is required when the condition comes from a truncate, because SDAG only
truncates down to a legal size of i32.

This fixes rdar://problem/22161062.

llvm-svn: 244291
2015-08-06 22:44:15 +00:00
Juergen Ributzka
0453fd2de1 Revert "[AArch64][FastISel] Add more truncation tests." and "[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types."
This reverts commit r243198 and 243304.

Turns out this wasn't the correct fix for this problem. It works only within
FastISel, but fails when the truncate is selected by SDAG.

llvm-svn: 244287
2015-08-06 22:13:48 +00:00
Sean Silva
890fe75208 [compatibility.ll] Cover explicitly named comdats.
Patch by Vedant Kumar! <vsk@apple.com>

llvm-svn: 244284
2015-08-06 22:04:21 +00:00
Sean Silva
ba3c36d65a Describe the process better.
Patch by Vedant Kumar! <vsk@apple.com>

llvm-svn: 244283
2015-08-06 22:03:54 +00:00