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159 Commits

Author SHA1 Message Date
Chris Lattner
97e96bcca0 factor some more BuildMI's in X86SelectCmp 
llvm-svn: 57545
 2008-10-15 03:52:54 +00:00
Chris Lattner
e66c12b3f5 factor some BuildMI calls, no functionality change. 
llvm-svn: 57544
 2008-10-15 03:47:17 +00:00
Dan Gohman
c070ffc493 FastISel support for exception-handling constructs. 
- Move the EH landing-pad code and adjust it so that it works
   with FastISel as well as with SDISel.
 - Add FastISel support for @llvm.eh.exception and
   @llvm.eh.selector.

llvm-svn: 57539
 2008-10-14 23:54:11 +00:00
Dan Gohman
c65ca09308 Add MBB successors and physreg Uses in the same order that 
SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.

llvm-svn: 57266
 2008-10-07 22:10:33 +00:00
Dan Gohman
2561119124 Instead of emitting an implicit use for the super-register of 
X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.

llvm-svn: 57264
 2008-10-07 21:50:36 +00:00
Dan Gohman
78ef9889c9 Fix X86FastISel to handle dynamic allocas that have avoided 
getting inserted into the ValueMap. This avoids infinite
recursion in some rare cases.

llvm-svn: 56989
 2008-10-03 01:27:49 +00:00
Dan Gohman
e75d14f8b0 Optimize conditional branches in X86FastISel. This replaces 
sequences like this:
       sete    %al
       testb   %al, %al
       jne     LBB11_1
with this:
       je      LBB11_1

llvm-svn: 56969
 2008-10-02 22:15:21 +00:00
Dan Gohman
bba3fb6d18 Work around an interaction between fast-isel and regalloc=local. The 
local register allocator's physreg liveness doesn't recognize subregs,
so it doesn't know that defs of %ecx that are immediately followed by
uses of %cl aren't dead. This comes up due to the way fast-isel emits
shift instructions.

This is a temporary workaround. Arguably, local regalloc should
handle subreg references correctly. On the other hand, perhaps
fast-isel should use INSERT_SUBREG instead of just assigning to the
most convenient super-register of %cl when lowering shifts.

This fixes MultiSource/Benchmarks/MallocBench/espresso,
MultiSource/Applications/hexxagon, and others, under -fast.

llvm-svn: 56947
 2008-10-02 14:56:12 +00:00
Dan Gohman
4aacc3ab83 Split x86's ADJCALLSTACK instructions into 32-bit and 64-bit forms. 
This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.

Also, add some comments describing the CALL instructions' physreg
operand uses and defs.

llvm-svn: 56925
 2008-10-01 18:28:06 +00:00
Dan Gohman
b5824675e4 Fix X86FastISel's output for x86-32 PIC constant pool addresses. 
llvm-svn: 56829
 2008-09-30 01:21:32 +00:00
Dan Gohman
c28f40a821 Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp 
and X86FastISel.cpp into X86MachineFunction.h, so that it
can be shared, instead of having each selector keep track
of its own.

llvm-svn: 56825
 2008-09-30 00:58:23 +00:00
Dan Gohman
e76be890c9 Disable all x87 usage, including f32 and f64 when the subtarget 
doesn't have SSE(2), with X86FastISel.

llvm-svn: 56823
 2008-09-30 00:48:39 +00:00
Dan Gohman
c6184c4473 Fix an over-pessimization about GlobalVariable addresses in X86FastISel. 
llvm-svn: 56802
 2008-09-29 21:13:15 +00:00
Dan Gohman
401470e0c7 Fix X86FastISel's address folding to check displacement 
values for overflow.

llvm-svn: 56686
 2008-09-26 20:04:15 +00:00
Dan Gohman
56b0c33a9d Factor out the code for determining when symblic addresses 
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676
 2008-09-26 19:15:30 +00:00
Dan Gohman
37bd5a0d40 Disable support for x86_f80 in X86FastISel. Supporting it would 
require more work.

llvm-svn: 56637
 2008-09-26 01:39:32 +00:00
Dan Gohman
524c506db3 Fix a bug in which address displacements were being added to the 
load from the stub, instead of the result of the load from the stub.

llvm-svn: 56626
 2008-09-25 23:34:02 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Dan Gohman
6f5c6be90f PIC support in X86FastISel. 
llvm-svn: 56608
 2008-09-25 15:24:26 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo 
object. This will be needed to support debug info.

llvm-svn: 56508
 2008-09-23 21:53:34 +00:00
Arnold Schwaighofer
49f49e2086 Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC. 
llvm-svn: 56436
 2008-09-22 14:50:07 +00:00
Chris Lattner
6e5b4c609c Fold immediates into X86 shifts with fast isel. This generates: 
sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413
 2008-09-21 21:44:29 +00:00
Dan Gohman
af1eeb6421 Fix a FastISel GlobalVariable CSE bug. 
llvm-svn: 56376
 2008-09-19 23:42:04 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
 2008-09-19 22:16:54 +00:00
Dan Gohman
71b1f15917 Address-mode folding for X86FastISel. It's pretty basic, but it 
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.

llvm-svn: 56320
 2008-09-18 23:23:44 +00:00
Dan Gohman
e1c4ad399a Simplify this code. The FastISel class has its own TD member. 
llvm-svn: 56311
 2008-09-18 18:26:43 +00:00
Dan Gohman
5fbd0e95f3 FastISel: For calls, prefer using the callee's address as a constant 
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.

llvm-svn: 56292
 2008-09-17 21:18:49 +00:00
Owen Anderson
743d45821a Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel. 
llvm-svn: 56117
 2008-09-11 19:44:55 +00:00
Owen Anderson
139baa5f74 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on 
X86-64 in fast isel.

llvm-svn: 56088
 2008-09-11 02:41:37 +00:00
Dan Gohman
9eca554828 X86FastISel support for double->float and float->double casts. 
llvm-svn: 56070
 2008-09-10 21:02:08 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
dc011a1b10 Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
llvm-svn: 55975
 2008-09-09 01:26:59 +00:00
Evan Cheng
fc78ac5bbe Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit. 
llvm-svn: 55925
 2008-09-08 17:15:42 +00:00
Dan Gohman
331ed48bc7 Fix copy+pastos in comments. 
llvm-svn: 55918
 2008-09-08 16:31:35 +00:00
Evan Cheng
66ef6517ad Add support to extend call operands when needed. Enable x86 fastisel call support. 
llvm-svn: 55891
 2008-09-08 06:35:17 +00:00
Evan Cheng
f016785579 Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either. 
Not yet turned on, it needs to support sext / zext of arguments and result.

llvm-svn: 55882
 2008-09-07 09:09:33 +00:00
Evan Cheng
6690ccd573 Handle x86 truncate to i8 with target hook for now. 
llvm-svn: 55877
 2008-09-07 08:47:42 +00:00
Owen Anderson
ef6d356c39 Fix constant pool loads, and remove broken versions of addConstantPoolReference. 
llvm-svn: 55868
 2008-09-06 01:11:01 +00:00
Dan Gohman
930d0be24c Fix X86FastISel's shift and select code to reject illegal types. 
llvm-svn: 55857
 2008-09-05 21:27:34 +00:00
Dan Gohman
28e33e92e4 Fix the opcodes used by X86FastISel for shifts and conditional moves. 
llvm-svn: 55855
 2008-09-05 21:13:04 +00:00
Evan Cheng
5fd19547f4 Factor out code that emits load and store instructions. 
llvm-svn: 55854
 2008-09-05 21:00:03 +00:00
Owen Anderson
7866b1c4c3 Rename method. 
llvm-svn: 55853
 2008-09-05 20:49:33 +00:00
Dan Gohman
0be4bca4b6 X86FastISel support for shifts and conditional moves. 
llvm-svn: 55844
 2008-09-05 18:30:08 +00:00
Dan Gohman
29cba19a2a Check a comparion's operand type for legality before 
expanding its operands.

llvm-svn: 55820
 2008-09-05 01:33:56 +00:00
Dan Gohman
121baa1723 Fix X86FastISel code for comparisons and conditional branches 
to check the result of getRegForValue before using it, and
to check for illegal operand types.

llvm-svn: 55819
 2008-09-05 01:15:35 +00:00
Dan Gohman
783f38e056 X86FastISel support for conditional branches. 
llvm-svn: 55816
 2008-09-05 01:06:14 +00:00
Owen Anderson
6d5b72d45a Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814
 2008-09-05 00:06:23 +00:00
Dan Gohman
88c3de638e X86FastISel support for ICmpInst and FCmpInst. 
llvm-svn: 55811
 2008-09-04 23:26:51 +00:00
Owen Anderson
cd3ee9198d Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. 
llvm-svn: 55777
 2008-09-04 16:48:33 +00:00
Owen Anderson
35485dbae3 Add a first attempt at implementing stores for X86 fast isel using target hooks. 
Dan or Evan, please review.

llvm-svn: 55764
 2008-09-04 07:08:58 +00:00
Evan Cheng
9c728a557d Load from GV stub should be locally CSE'd. 
llvm-svn: 55763
 2008-09-04 06:18:33 +00:00
Dan Gohman
18cc2a26df Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
 2008-09-03 23:12:08 +00:00
Evan Cheng
942d55dd92 Add X86 target hook to implement load (even from GlobalAddress). 
llvm-svn: 55693
 2008-09-03 06:44:39 +00:00
Evan Cheng
4cef3f6ce1 Unbreak fast isel. 
llvm-svn: 55685
 2008-09-03 01:04:47 +00:00
Evan Cheng
43c7084625 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
llvm-svn: 55679
 2008-09-03 00:03:49 +00:00
Owen Anderson
3aa3841da2 Add initial support for fast isel of instructions that have inputs pinned to physical registers. 
llvm-svn: 55545
 2008-08-29 17:45:56 +00:00
Dan Gohman
c7b8401b77 Add a target callback for FastISel. 
llvm-svn: 55512
 2008-08-28 23:21:34 +00:00
Dan Gohman
a398d11527 Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.

llvm-svn: 55156
 2008-08-22 00:20:26 +00:00
Dan Gohman
b1ba73eeed Instantiate FastISel for X86. 
llvm-svn: 55011
 2008-08-19 21:45:35 +00:00