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Commit Graph

10975 Commits

Author SHA1 Message Date
Bob Wilson
e06f6eabe7 Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.
Radar 8776599

llvm-svn: 122018
2010-12-17 01:21:12 +00:00
Bob Wilson
f6fe49f7d2 Fix a comment typo.
llvm-svn: 122016
2010-12-17 01:21:05 +00:00
Daniel Dunbar
8ab9be2005 MC: Make TargetAsmBackend available to the AsmStreamer.
- Treaty talks on the non-proliferation of MC objects broke down.

llvm-svn: 121949
2010-12-16 03:05:59 +00:00
Jakob Stoklund Olesen
1811e4cb20 Start using SplitKit and MachineLoopRanges in RegAllocGreedy in preparation of
live range splitting around loops guided by register pressure.

So far, trySplit() simply prints a lot of debug output.

llvm-svn: 121918
2010-12-15 23:46:13 +00:00
Jakob Stoklund Olesen
d40af5ffbd Add MachineLoopRanges analysis.
A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.

llvm-svn: 121917
2010-12-15 23:41:23 +00:00
Evan Cheng
68e1ed8752 Teach machine cse to commute instructions.
llvm-svn: 121903
2010-12-15 22:16:21 +00:00
Dan Gohman
295ba3ab26 Move Value::getUnderlyingObject to be a standalone
function so that it can live in Analysis instead of
VMCore.

llvm-svn: 121885
2010-12-15 20:02:24 +00:00
Jakob Stoklund Olesen
3cfea82733 Fix build.
llvm-svn: 121872
2010-12-15 18:07:48 +00:00
Jakob Stoklund Olesen
308656b955 Detect and enumerate bypass loops.
Bypass loops have the current live range live through, but contain no uses or
defs. Splitting around a bypass loop can free registers for other uses inside
the loop by spilling the split range.

llvm-svn: 121871
2010-12-15 17:49:52 +00:00
Jakob Stoklund Olesen
849388944e Separate SplitAnalysis::getSplitLoops().
This method returns the set of loops with uses that are candidates for
splitting.

llvm-svn: 121870
2010-12-15 17:41:19 +00:00
Chris Lattner
81815cd4db take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.

llvm-svn: 121848
2010-12-15 06:04:19 +00:00
Chris Lattner
746d6a1f60 when transforming a MULHS into a wider MUL, there is no need to SRA the
result, the top bits are truncated off anyway, just use SRL.

llvm-svn: 121846
2010-12-15 05:51:39 +00:00
Jakob Stoklund Olesen
48800c9689 Simplify RegAllocGreedy's use of register aliases.
llvm-svn: 121807
2010-12-14 23:38:19 +00:00
Jakob Stoklund Olesen
7ee6f83da1 Simplify CCState's use of register aliases.
llvm-svn: 121806
2010-12-14 23:28:01 +00:00
Jakob Stoklund Olesen
03856151db Simplify AggressiveAntiDepBreaker's use of register aliases.
llvm-svn: 121805
2010-12-14 23:23:15 +00:00
Jakob Stoklund Olesen
870fbdd686 Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
llvm-svn: 121801
2010-12-14 23:10:48 +00:00
Evan Cheng
7e96e67d98 Fix a minor bug in two-address pass. It was missing a commute opportunity.
regB = move RCX
regA = op regB, regC
RAX  = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
       movl    %edi, %eax
       shlq    $32, %rcx
       leaq    (%rcx,%rax), %rax
=>
       movl    %edi, %eax
       shlq    $32, %rcx
       orq     %rcx, %rax
rdar://8762995

llvm-svn: 121793
2010-12-14 21:34:53 +00:00
Matt Beaumont-Gay
01264443a8 Move debugging code entirely within DEBUG(). Silences an unused variable
warning in the opt build.

llvm-svn: 121791
2010-12-14 21:14:55 +00:00
Jakob Stoklund Olesen
c13ce4748e Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
llvm-svn: 121783
2010-12-14 19:38:49 +00:00
Jakob Stoklund Olesen
c5ad05ca30 Use TRI::printReg instead of AbstractRegisterDescription when printing
LiveIntervalUnions.

llvm-svn: 121781
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen
74ba8b77e6 Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
llvm-svn: 121774
2010-12-14 17:47:36 +00:00
Jakob Stoklund Olesen
d4d3c5dd1e Remove unused vector.
llvm-svn: 121741
2010-12-14 00:58:47 +00:00
Jakob Stoklund Olesen
00d6ac22d0 Try reassigning all virtual register interferences, not just those with lower
spill weight. Filter out fixed registers instead.

Add support for reassigning an interference that was assigned to an alias.

llvm-svn: 121737
2010-12-14 00:37:49 +00:00
Jakob Stoklund Olesen
ffefd5bd4e Add stub for RAGreedy::trySplit.
llvm-svn: 121736
2010-12-14 00:37:44 +00:00
Chris Lattner
14810c808b Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal.  This allows us to compile:

define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
	%div = udiv i16 %x, 33
	ret i16 %div
}

into:

test1:                                  # @test1
	movzwl	4(%esp), %eax
	imull	$63551, %eax, %eax      # imm = 0xF83F
	shrl	$21, %eax
	ret

instead of:

test1:                                  # @test1
        movw    $-1985, %ax             # imm = 0xFFFFFFFFFFFFF83F
        mulw    4(%esp)
        andl    $65504, %edx            # imm = 0xFFE0
        movl    %edx, %eax
        shrl    $5, %eax
        ret

Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320

We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.

llvm-svn: 121696
2010-12-13 08:39:01 +00:00
Chris Lattner
324f849088 remove the verbose-asm "constant pool double" comments that we were printing
for each constant pool entry.  Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.

This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s.  llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.

llvm-svn: 121691
2010-12-13 07:35:47 +00:00
Chris Lattner
6df4d5d88e reduce indentation by using continue, no functionality change.
llvm-svn: 121662
2010-12-13 01:11:17 +00:00
Duncan Sands
47a4bbd31d Catch attempts to remove a deleted node from the CSE maps. Better to
catch this here rather than later after accessing uninitialized memory
etc.  Fires when compiling the testcase in PR8237.

llvm-svn: 121635
2010-12-12 13:22:50 +00:00
Jakob Stoklund Olesen
a523d5f048 Add named timer groups for the different stages of register allocation.
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen
ef80efea1d Move MRI into RegAllocBase. Clean up debug output a bit.
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Nick Lewycky
46a6ed1f0f Remove extraneous close parenthesis.
Fix build breakage.

llvm-svn: 121596
2010-12-10 23:14:35 +00:00
Nick Lewycky
9afbedbc48 Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]

llvm-svn: 121594
2010-12-10 23:05:10 +00:00
Jakob Stoklund Olesen
6cd6e644e7 Force the greedy register allocator to always use the inline spiller.
Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

llvm-svn: 121591
2010-12-10 22:54:44 +00:00
Jakob Stoklund Olesen
cbd4bac09d Rip out live range splitting support from the inline spiller.
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.

llvm-svn: 121590
2010-12-10 22:54:40 +00:00
Jakob Stoklund Olesen
5ab6552845 Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation.
llvm-svn: 121584
2010-12-10 22:21:05 +00:00
Jakob Stoklund Olesen
ea59381fc8 Fix miscompilation caused by trivial logic error in the reassignVReg()
interference check.

llvm-svn: 121519
2010-12-10 20:45:04 +00:00
Jakob Stoklund Olesen
e3924a3c85 Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497
2010-12-10 18:36:02 +00:00
Rafael Espindola
0e665e502d Fixed version of 121434 with no new memory leaks.
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
Rafael Espindola
011e168728 Revert my previous patch to make the valgrind bots happy.
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
Rafael Espindola
03ad1e8f1f Initial support for the cfi directives. This is just enough to get
f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

llvm-svn: 121434
2010-12-09 23:48:29 +00:00
Stuart Hastings
f7bba0cfe3 Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
Necessary for byval support on ARM.  Radar 7662569.

llvm-svn: 121412
2010-12-09 21:25:20 +00:00
Jakob Stoklund Olesen
fe4b9ee934 Remember to filter out reserved rergisters from the allocation order.
llvm-svn: 121411
2010-12-09 21:20:46 +00:00
Jakob Stoklund Olesen
5bb5c67227 Add a forgotten initializer for CheckedFirstInterference.
llvm-svn: 121410
2010-12-09 21:20:44 +00:00
Andrew Trick
ec37b93b07 Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388
2010-12-09 18:15:21 +00:00
Eric Christopher
ebd7ab9857 80-col fixups.
llvm-svn: 121356
2010-12-09 04:48:06 +00:00
Jakob Stoklund Olesen
17b2e8c293 IntervalMap iterators are heavyweight, so avoid copying them around and use
references instead.

Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);

This makes RegAllocBasic run another 5% faster.

llvm-svn: 121344
2010-12-09 01:06:52 +00:00
Devang Patel
b3e0d80b1f DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
This fixes radar 8730409.

llvm-svn: 121323
2010-12-09 00:10:40 +00:00
Jakob Stoklund Olesen
ffc0f6586a Properly deal with empty intervals when checking for interference.
llvm-svn: 121319
2010-12-08 23:51:35 +00:00
Jakob Stoklund Olesen
37df3f04c2 Implement very primitive hinting support in RegAllocGreedy.
The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.

llvm-svn: 121306
2010-12-08 22:57:16 +00:00
Jakob Stoklund Olesen
3c81b6a50b Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

llvm-svn: 121294
2010-12-08 22:22:41 +00:00