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Commit Graph

23000 Commits

Author SHA1 Message Date
Jim Laskey
8ad04a557b Format large struct constants for readability.
llvm-svn: 26379
2006-02-25 12:27:03 +00:00
Evan Cheng
0b1f2f9d11 New test case: use lea for imul by some constants.
llvm-svn: 26378
2006-02-25 10:16:10 +00:00
Evan Cheng
cb55494fa8 lea.ll is XFAIL until we implement convertToThreeAddress.
llvm-svn: 26377
2006-02-25 10:15:22 +00:00
Evan Cheng
de768027d9 * Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376
2006-02-25 10:09:08 +00:00
Evan Cheng
8a6f03bb0e Updates.
llvm-svn: 26375
2006-02-25 10:04:07 +00:00
Evan Cheng
995c9806ba * Allow mul, shl nodes to be codegen'd as LEA (if appropriate).
* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.

llvm-svn: 26374
2006-02-25 10:02:21 +00:00
Evan Cheng
1bd4077002 ConstantPoolIndex is now the displacement field of addressing mode.
llvm-svn: 26373
2006-02-25 09:56:50 +00:00
Evan Cheng
bd1279fd2a Added a common about the need for X86ISD::Wrapper.
llvm-svn: 26372
2006-02-25 09:55:19 +00:00
Evan Cheng
026fd6af96 Added an offset field to ConstantPoolSDNode.
llvm-svn: 26371
2006-02-25 09:54:52 +00:00
Chris Lattner
b51e6aef5d this fails, mark it as such
llvm-svn: 26370
2006-02-25 08:18:43 +00:00
Chris Lattner
4f083f08ca Fix a bug that Evan exposed with some changes he's making, and that was
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.

llvm-svn: 26369
2006-02-25 02:17:31 +00:00
Chris Lattner
b06aa63852 Remove debugging printout :)
Add a minor compile time win, no codegen change.

llvm-svn: 26368
2006-02-25 02:03:40 +00:00
Chris Lattner
a342126820 Refactor some code from being inline to being out in a new class with methods.
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.

llvm-svn: 26367
2006-02-25 01:51:33 +00:00
Evan Cheng
07ffd089da Fix an obvious bug exposed when we are doing
ADD X, 4
==>
MOV32ri $X+4, ...

llvm-svn: 26366
2006-02-25 01:37:02 +00:00
Chris Lattner
bc35137363 Add memory printing support for PPC. Input memory operands now work with
inline asms! :)

llvm-svn: 26365
2006-02-24 20:27:40 +00:00
Chris Lattner
e2b0023f4e Use the PrintAsmMemoryOperand to print addressing modes.
llvm-svn: 26364
2006-02-24 20:21:58 +00:00
Chris Lattner
68518b9e83 Add a PrintAsmMemoryOperand method for printing addresses
llvm-svn: 26363
2006-02-24 20:21:12 +00:00
Chris Lattner
22356863a0 Pass all the flags to the asm printer, not just the # operands.
llvm-svn: 26362
2006-02-24 19:50:58 +00:00
Chris Lattner
f1e0c1f0a8 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.
Add support for addressing modes.

llvm-svn: 26361
2006-02-24 19:18:20 +00:00
Chris Lattner
e00cf77ecb Refactor operand adding out to a new AddOperand method
llvm-svn: 26358
2006-02-24 18:54:03 +00:00
Chris Lattner
291e17764d add a method
llvm-svn: 26357
2006-02-24 18:53:51 +00:00
Chris Lattner
304aeda827 Fix a problem that Nate noticed that boils down to an over conservative check
in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:

LBB1_1: ; no_exit
        add r6, r2, r3
        subf r3, r2, r3
        cmpwi cr0, r2, 0
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
        mr r3, r6
LBB1_4: ; no_exit
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

into this instead:

LBB1_1: ; no_exit
        srawi r6, r2, 31
        add r2, r2, r6
        xor r6, r2, r6
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        add r3, r3, r6
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

llvm-svn: 26356
2006-02-24 18:05:58 +00:00
Jim Laskey
fe79552c25 Add pointer and reference types. Added short-term code to ignore NULL types
(to allow llvm-gcc4 to build.)

llvm-svn: 26355
2006-02-24 16:46:40 +00:00
Jeff Cohen
9773f9c447 Get VC++ building again.
llvm-svn: 26351
2006-02-24 02:52:40 +00:00
Chris Lattner
6248339a24 Implement (most of) selection of inline asm memory operands.
llvm-svn: 26350
2006-02-24 02:13:54 +00:00
Chris Lattner
1ffa8d3666 Select inline asm memory operands.
llvm-svn: 26349
2006-02-24 02:13:31 +00:00
Chris Lattner
3d451516ec Implement selection of inline asm memory operands
llvm-svn: 26348
2006-02-24 02:13:12 +00:00
Chris Lattner
0f3130afc2 Add some hooks for selecting memory addresses.
llvm-svn: 26347
2006-02-24 02:12:52 +00:00
Chris Lattner
3f267c1683 Lower C_Memory operands.
llvm-svn: 26346
2006-02-24 01:11:24 +00:00
Chris Lattner
b5df999862 Recognize memory operand codes
llvm-svn: 26345
2006-02-24 01:10:46 +00:00
Chris Lattner
0957a2e87c Add C_Memory operand type
llvm-svn: 26344
2006-02-24 01:10:14 +00:00
Chris Lattner
cd5ae150bb Parse the %*# constraint modifiers
llvm-svn: 26341
2006-02-23 23:36:53 +00:00
Chris Lattner
d150672d87 add a new flag
llvm-svn: 26340
2006-02-23 23:36:23 +00:00
Jim Laskey
ddac333e72 Added basic support for typedefs.
llvm-svn: 26339
2006-02-23 22:37:30 +00:00
Evan Cheng
2720cd1d7e PPC JIT relocation model should be DynamicNoPIC.
llvm-svn: 26338
2006-02-23 22:18:07 +00:00
Evan Cheng
cb9fb051a5 - Clean up the lowering and selection code of ConstantPool, GlobalAddress,
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
2006-02-23 20:41:18 +00:00
Chris Lattner
5a70e894d1 Fix an endianness problem on big-endian targets with expanded operands
to inline asms.  Mark some methods const.

llvm-svn: 26334
2006-02-23 20:06:57 +00:00
Chris Lattner
cdbd9d6d4c Implement the PPC inline asm "L" modifier. This allows us to compile:
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333
2006-02-23 19:31:10 +00:00
Chris Lattner
b4951fbe82 Record all of the expanded registers in the DAG and machine instr, fixing
several bugs in inline asm expanded operands.

llvm-svn: 26332
2006-02-23 19:21:04 +00:00
Jim Laskey
1ee7e91e5c DwarfWriter reading basic type information from llvm-gcc4 code.
llvm-svn: 26331
2006-02-23 16:58:18 +00:00
Chris Lattner
97cb3f51cd Match the case of other mailing lists in the list
llvm-svn: 26330
2006-02-23 16:18:29 +00:00
Chris Lattner
0e842bb8e4 document the llvm-testresults list
llvm-svn: 26329
2006-02-23 16:14:22 +00:00
Chris Lattner
b74e255d8b Code cleanups, no functionality change
llvm-svn: 26328
2006-02-23 06:44:17 +00:00
Chris Lattner
72d24be146 "." isn't enough to get a private label on linux, use ".L".
llvm-svn: 26327
2006-02-23 05:25:02 +00:00
Chris Lattner
23b302ce83 add a small and simple case.
llvm-svn: 26326
2006-02-23 05:17:43 +00:00
Evan Cheng
a85c267431 A couple of new entries.
llvm-svn: 26325
2006-02-23 02:50:21 +00:00
Evan Cheng
2977507828 PIC related bug fixes.
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
2006-02-23 02:43:52 +00:00
Evan Cheng
b8000b03aa X86 codegen tweak to use lea in another case:
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323
2006-02-23 00:13:58 +00:00
Evan Cheng
41154489a2 Add a test case for 'lea'.
llvm-svn: 26322
2006-02-23 00:12:12 +00:00
Evan Cheng
4e31b8eaed Missing .globl for weak / link-once .text symbols.
llvm-svn: 26321
2006-02-22 23:59:57 +00:00