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Author SHA1 Message Date
Bob Wilson
9cf6656d4b Further changes for Neon vector shuffles: 
- change isShuffleMaskLegal to show that all shuffles with 32-bit and 64-bit
  elements are legal
- the Neon shuffle instructions do not support 64-bit elements, but we were
  not checking for that before lowering shuffles to use them
- remove some 64-bit element vduplane patterns that are no longer needed

llvm-svn: 105586
 2010-06-07 23:53:38 +00:00
Bob Wilson
ff11696889 Fix a mistake in my previous change r105437: don't access operand 2 and assume 
that it is an immediate before checking that the instruction is an
EXTRACT_SUBREG.

llvm-svn: 105585
 2010-06-07 23:48:46 +00:00
Dan Gohman
e3963f3cdd Add some basic debug output. 
llvm-svn: 105561
 2010-06-07 22:32:10 +00:00
Stuart Hastings
a878b05c6f Tweak test for debug/metadata change, update to FileCheck. Radar 7424645. 
llvm-svn: 105559
 2010-06-07 21:50:54 +00:00
Jim Grosbach
bb979e722d Handle dbg_value instructions (i.e., skip them) when generating IT blocks. 
rdar://7797940

llvm-svn: 105557
 2010-06-07 21:48:47 +00:00
Nick Lewycky
ff1e3db00e Plug a leak in the non-error case by removing one level of indirection. 
llvm-svn: 105556
 2010-06-07 21:42:19 +00:00
Jim Grosbach
c18ef216f0 Cleanup. Process the dbg_values separately 
llvm-svn: 105554
 2010-06-07 21:28:55 +00:00
Dan Gohman
e29407eb52 Fix this test to work under lit. 
llvm-svn: 105553
 2010-06-07 20:58:11 +00:00
Dan Gohman
96649dea39 Run dead type elimination after dead argument elimination. 
llvm-svn: 105552
 2010-06-07 20:28:37 +00:00
Dan Gohman
d3c63c5f26 Make bugpoint dead-argument-hacking actually work, and actually test it. 
llvm-svn: 105551
 2010-06-07 20:20:33 +00:00
Dan Gohman
94bc7c650c Use ->isVoidTy(). 
llvm-svn: 105550
 2010-06-07 20:19:26 +00:00
Dan Gohman
490f4d7020 The FoldingSet hash data includes pointer values, so it isn't 
determinstic. Instead, give SCEV objects an arbitrary sequence
number.

llvm-svn: 105548
 2010-06-07 19:36:14 +00:00
Dan Gohman
ee75f6f4dd Optimize this code somewhat by taking advantage of the fact 
that the operands are sorted.

llvm-svn: 105546
 2010-06-07 19:20:57 +00:00
Bill Wendling
97b6c4a378 Another place where the code wanted to access the argument list and not all of 
the operands.

llvm-svn: 105545
 2010-06-07 19:18:58 +00:00
Dan Gohman
e4676a62de Micro-optimize this, to speed up this hotspot in debug builds a little. 
llvm-svn: 105544
 2010-06-07 19:16:37 +00:00
Dan Gohman
044a968609 Micro-optimize this. 
llvm-svn: 105542
 2010-06-07 19:12:54 +00:00
Jim Grosbach
88b785aa23 Move exit check where it really belongs. 
llvm-svn: 105541
 2010-06-07 19:12:21 +00:00
Dan Gohman
65954b2eb4 Optimize ScalarEvolution's SCEVComplexityCompare predicate: don't go 
scrounging through SCEVUnknown contents and SCEVNAryExpr operands;
instead just do a simple deterministic comparison of the precomputed
hash data.

Also, since this is more precise, it eliminates the need for the slow
N^2 duplicate detection code.

llvm-svn: 105540
 2010-06-07 19:06:13 +00:00
Bill Wendling
a96eaed21d Create new accessors to get arguments for call/invoke instructions. It breaks 
encapsulation to force the users of these classes to know about the internal
data structure of the Operands structure. It also can lead to errors, like in
the MSIL writer.

llvm-svn: 105539
 2010-06-07 19:05:06 +00:00
Rafael Espindola
b93be14fa0 Misc cleanups to the gold plugin. 
llvm-svn: 105534
 2010-06-07 16:45:22 +00:00
Nate Begeman
477813692f clang codegen support 
llvm-svn: 105531
 2010-06-07 16:00:37 +00:00
Kenneth Uildriks
73367eb575 Partial specialization was not checking the callsite to make sure it was using the same constants as the specialization, leading to calls to the wrong specialization. Patch by Takumi Nakamura\! 
llvm-svn: 105528
 2010-06-05 14:50:21 +00:00
Duncan Sands
d74ac1ebe7 This bug is also present in MSVC10. Requested by Elrood on IRC. 
llvm-svn: 105527
 2010-06-05 12:40:43 +00:00
Chris Lattner
33d0622cdc revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type

llvm-svn: 105524
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
b05131d907 Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.

llvm-svn: 105521
 2010-06-05 03:53:24 +00:00
Bruno Cardoso Lopes
b811561aac Teach tablegen to support 'defm' inside multiclasses. 
llvm-svn: 105519
 2010-06-05 02:11:52 +00:00
Dan Gohman
884aaf23ee Make MachineFunctionPass::createPrinterPass private, as no subclasses 
should be calling it.

llvm-svn: 105517
 2010-06-05 01:19:12 +00:00
Dale Johannesen
df4dc9ed33 Improvements to tail call code. No functional effect 
unless using -arm-tail-calls.

llvm-svn: 105515
 2010-06-05 00:51:39 +00:00
Dan Gohman
eea56e5bd8 getFoldedOffsetOf no longer does anything special with vector types. 
llvm-svn: 105514
 2010-06-05 00:47:34 +00:00
Dan Gohman
a4614e30ec No need to special-case structs here; structs are first-class now. 
llvm-svn: 105513
 2010-06-05 00:42:29 +00:00
Stuart Hastings
37ed2a9663 Revert 105492 & 105493 due to a testcase regression. Radar 7424645. 
llvm-svn: 105511
 2010-06-05 00:39:29 +00:00
Dan Gohman
1865db1b89 LSR needs to remember inserted instructions even in postinc mode, because 
there could be multiple subexpressions within a single expansion which
require insert point adjustment. This fixes PR7306.

llvm-svn: 105510
 2010-06-05 00:33:07 +00:00
Dale Johannesen
ae0a144c39 Fix some liveout handling related to tail calls, see comments. 
I don't think this ever resulted in problems on x86, but it
would on ARM.

llvm-svn: 105509
 2010-06-05 00:30:45 +00:00
Dan Gohman
e1853a7473 Implement operator== and operator!= for SetVector. 
llvm-svn: 105508
 2010-06-05 00:26:02 +00:00
Devang Patel
b8bc51b307 test case for r105504. 
Radar 8055687.

llvm-svn: 105505
 2010-06-04 23:47:41 +00:00
Evan Cheng
0fb8a935a5 Re-apply 105308 with fix. 
llvm-svn: 105502
 2010-06-04 23:28:13 +00:00
Dan Gohman
17ad6b5d21 Don't track users of undef values; they aren't interesting for 
register pressure.

llvm-svn: 105501
 2010-06-04 23:16:05 +00:00
Jim Grosbach
8e3fbf47cb Make if-conversion ignore dbg_value instructions in its analysis. rdar://7797940 
llvm-svn: 105498
 2010-06-04 23:01:26 +00:00
Nate Begeman
7a41bddd2c Handle multi-vector returns and args. 
llvm-svn: 105496
 2010-06-04 22:53:30 +00:00
Devang Patel
65088cc742 Update docs to reflect new DISubprogram elements. 
llvm-svn: 105495
 2010-06-04 22:49:55 +00:00
Stuart Hastings
eb78f8db98 Support for nested functions/classes in debug output. Radar 7424645. 
llvm-svn: 105492
 2010-06-04 22:36:03 +00:00
Devang Patel
8bf4434e6e Copy location info for current function argument from dbg.declare if respective store instruction does not have any location info. 
llvm-svn: 105490
 2010-06-04 22:27:30 +00:00
Nate Begeman
60df12eda6 Additional fixes to BuiltinsARM.def generator, on to clang codegen. 
llvm-svn: 105488
 2010-06-04 21:36:00 +00:00
Dale Johannesen
fc3c949f68 More tail call removal. 
llvm-svn: 105485
 2010-06-04 21:14:24 +00:00
Jim Grosbach
f72dafe970 Skip dbg_value instructions when scanning instructions in register scavenging. 
llvm-svn: 105481
 2010-06-04 20:18:30 +00:00
Dan Gohman
332b06bd4f Fix normalization and de-normalization of non-affine SCEVs. 
llvm-svn: 105480
 2010-06-04 19:16:34 +00:00
Jakob Stoklund Olesen
90af6a44c3 Keep track of the call instructions whose clobber lists were skipped during fast 
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

llvm-svn: 105473
 2010-06-04 18:08:29 +00:00
Dale Johannesen
f47a852290 More thoroughly disable tails calls by default. 
8060143, although this doesn't fix the real problem with tail call.

llvm-svn: 105472
 2010-06-04 18:04:24 +00:00
Jim Grosbach
ab666c3d62 Another fix to prevent debug info from affecting codegen. rdar://7797940 
llvm-svn: 105470
 2010-06-04 17:57:34 +00:00
Nate Begeman
8275ffe1df Progress on generating BuiltinsARM.def, still some duplicates to work out. 
llvm-svn: 105461
 2010-06-04 07:11:25 +00:00