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Commit Graph

1346 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
e2175ad8bb [Hexagon] Fixes for new-value jump formation
- Recognize C2_cmpgtui, S2_tstbit_i, and S4_ntstbit_i.
- Avoid creating new-value instructions with both source operands equal.

llvm-svn: 279286
2016-08-19 17:54:49 +00:00
Krzysztof Parzyszek
a131109b99 [Hexagon] Fix a few omissions in HexagonInstrInfo
llvm-svn: 279280
2016-08-19 17:20:57 +00:00
Krzysztof Parzyszek
9d0cca600a [Hexagon] Enforce LLSC packetization rules
Ensure that load locked and store conditional instructions are only
packetized with ALU32 instructions.

Patch by Ben Craig.

llvm-svn: 279272
2016-08-19 16:57:05 +00:00
Krzysztof Parzyszek
af88633ebc [Hexagon] Minor updates to register definitions
llvm-svn: 279269
2016-08-19 16:40:19 +00:00
Krzysztof Parzyszek
9830c7641e [Hexagon] Fix incorrect generation of S4_subi_asl_ri
Patch by Jyotsna Verma.

llvm-svn: 279267
2016-08-19 16:35:05 +00:00
Krzysztof Parzyszek
0339edece9 [Hexagon] Add missing pattern for C4_cmplte
llvm-svn: 279265
2016-08-19 16:11:33 +00:00
Krzysztof Parzyszek
5fdbda605f [Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
llvm-svn: 279255
2016-08-19 15:17:19 +00:00
Krzysztof Parzyszek
56c3cbbca1 [Hexagon] Add explicit default constructor for HexagonSelectionDAGInfo
llvm-svn: 279254
2016-08-19 15:13:54 +00:00
Krzysztof Parzyszek
7674324b11 [Hexagon] Allow tail-call optimization when mixing C and fast calling conv
Patch by Arnold Schwaighofer.

llvm-svn: 279251
2016-08-19 15:02:18 +00:00
Krzysztof Parzyszek
6c216ccafc [Hexagon] Check for empty live interval
Patch by Brendon Cahoon.

llvm-svn: 279249
2016-08-19 14:29:43 +00:00
Krzysztof Parzyszek
a4cb546a1a [Hexagon] Consider zext/sext of a load to i32 to be free
llvm-svn: 279248
2016-08-19 14:22:07 +00:00
Krzysztof Parzyszek
6e52bae56f [Hexagon] Handle J2_jumptpt and J2_jumpfpt instructions
llvm-svn: 279246
2016-08-19 14:14:09 +00:00
Krzysztof Parzyszek
024da0afa8 [Hexagon] Fix indentation, NFC
llvm-svn: 279245
2016-08-19 14:12:51 +00:00
Krzysztof Parzyszek
a8cea47211 [Hexagon] Remove unnecessary llvm::, NFC
llvm-svn: 279244
2016-08-19 14:10:57 +00:00
Krzysztof Parzyszek
a1999845de [Hexagon] Rename the HEXAGON_MC namespace to Hexagon_MC, NFC
llvm-svn: 279243
2016-08-19 14:09:47 +00:00
Krzysztof Parzyszek
53fcc0a9e4 [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumpr
llvm-svn: 279241
2016-08-19 14:04:45 +00:00
Krzysztof Parzyszek
3cad3632a2 [Hexagon] Improvements to handling and generation of FP instructions
Improved handling of fma, floating point min/max, additional load/store
instructions for floating point types.

Patch by Jyotsna Verma.

llvm-svn: 279239
2016-08-19 13:34:31 +00:00
Michael Kuperstein
c89e7c5616 [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597

llvm-svn: 279129
2016-08-18 20:08:15 +00:00
Krzysztof Parzyszek
7d14392913 [Hexagon] Create vcombine in HexagonCopyToCombine
llvm-svn: 279067
2016-08-18 14:12:34 +00:00
Justin Bogner
507d362929 Replace a few more "fall through" comments with LLVM_FALLTHROUGH
Follow up to r278902. I had missed "fall through", with a space.

llvm-svn: 278970
2016-08-17 20:30:52 +00:00
Justin Bogner
b5f5b0ef6d Replace "fallthrough" comments with LLVM_FALLTHROUGH
This is a mechanical change of comments in switches like fallthrough,
fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.

llvm-svn: 278902
2016-08-17 05:10:15 +00:00
Duncan P. N. Exon Smith
7eb73836f8 Hexagon: Avoid dereferencing end() in HexagonInstrInfo::InsertBranch
llvm-svn: 278878
2016-08-17 00:34:00 +00:00
Krzysztof Parzyszek
783dba3ca3 [Hexagon] Standardize next batch of pseudo instructions
ALIGNA          PS_aligna
ALLOCA          PS_alloca
TFR_FI          PS_fi
TFR_FIA         PS_fia
TFR_PdFalse     PS_false
TFR_PdTrue      PS_true
VMULW           PS_vmulw
VMULW_ACC       PS_vmulw_acc

llvm-svn: 278832
2016-08-16 18:08:40 +00:00
Krzysztof Parzyszek
6fb31c961d [Hexagon] Clean up some miscellaneous V60 intrinsics a bit
llvm-svn: 278823
2016-08-16 17:14:44 +00:00
Krzysztof Parzyszek
a6cf33945d [Hexagon] Standardize vector predicate load/store pseudo instructions
- Remove unused instructions: LDriq_pred_vec_V6, STriq_pred_vec_V6, and
  the 128B counterparts.
- Rename:
    LDriq_pred_V6         PS_vloadrq_ai
    LDriq_pred_V6_128B    PS_vloadrq_ai_128B
    STriq_pred_V6         PS_vstorerq_ai
    STriq_pred_V6_128B    PS_vstorerq_ai_128B

llvm-svn: 278813
2016-08-16 15:43:54 +00:00
Sjoerd Meijer
73a75d092e MachineLoop: add methods findLoopControlBlock and findLoopPreheader
This adds two new utility functions findLoopControlBlock and findLoopPreheader
to MachineLoop and MachineLoopInfo. These functions are refactored and taken
from the Hexagon target as they are target independent; thus this is intendend to
be a non-functional change.

Differential Revision: https://reviews.llvm.org/D22959

llvm-svn: 278661
2016-08-15 08:22:42 +00:00
Ron Lieberman
4789174868 Fix unsupported relocation type R_HEX_6_X' for symbol .rodata
LowerTargetConstantPool is not properly setting the TargetFlag to indicate
desired relocation. Coding error, the offset parameter was omitted, so the
TargetFlag was used as the offset, and the TargetFlag defaulted to zero.

This only affects -fpic compilation, and only those items created in a
Constant Pool, for example a vector of constants. Halide ran into this issue.

llvm-svn: 278614
2016-08-13 23:41:11 +00:00
Krzysztof Parzyszek
1af9276b8e [Hexagon] Cleanup and standardize vector load/store pseudo instructions
Remove the following single-vector load/store pseudo instructions, use real
instructions instead:
  LDriv_pseudo_V6         STriv_pseudo_V6
  LDriv_pseudo_V6_128B    STriv_pseudo_V6_128B
  LDrivv_indexed          STrivv_indexed
  LDrivv_indexed_128B     STrivv_indexed_128B

Rename the double-vector load/store pseudo instructions, add unaligned
counterparts:

  -- old --               -- new --            -- unaligned --
  LDrivv_pseudo_V6        PS_vloadrw_io        PS_vloadrwu_io
  LDrivv_pseudo_V6_128B   PS_vloadrw_io_128B   PS_vloadrwu_io_128B
  STrivv_pseudo_V6        PS_vstorerw_io       PS_vstorerwu_io
  STrivv_pseudo_V6_128B   PS_vstorerw_io_128   PS_vstorerwu_io_128

llvm-svn: 278564
2016-08-12 21:05:05 +00:00
Krzysztof Parzyszek
f06744fc0b [Hexagon] Standardize pseudo-instructions for calls and returns
- CALLv3nr        PS_call_nr
- CALLRv3nr       PS_callr_nr
- CALLstk         PS_call_stk

- TCRETURNi       PS_tailcall_i
- TCRETURNr       PS_tailcall_r

- JMPret          PS_jmpret
- JMPrett         PS_jmprett
- JMPretf         PS_jmpretf
- JMPrettnew      PS_jmprettnew
- JMPretfnew      PS_jmpretfnew
- JMPrettnewpt    PS_jmprettnewpt
- JMPretfnewpt    PS_jmpretfnewpt

llvm-svn: 278499
2016-08-12 11:12:02 +00:00
Krzysztof Parzyszek
941b211c15 [Hexagon] Treat non-returning indirect calls as scheduling boundaries
llvm-svn: 278498
2016-08-12 11:01:10 +00:00
Duncan P. N. Exon Smith
bdb3b06958 ADT: Remove all ilist_iterator => pointer casts, NFC
Remove all ilist_iterator to pointer casts.  There were two reasons for
casts:

  - Checking for an uninitialized (i.e., null) iterator.  I added
    MachineInstrBundleIterator::isValid() to check for that case.

  - Comparing an iterator against the underlying pointer value while
    avoiding converting the pointer value to an iterator.  This is
    occasionally necessary in MachineInstrBundleIterator, since there is
    an assertion in the constructors that the underlying MachineInstr is
    not bundled (but we don't care about that if we're just checking for
    pointer equality).

To support the latter case, I rewrote the == and != operators for
ilist_iterator and MachineInstrBundleIterator.

  - The implicit constructors now use enable_if to exclude
    const-iterator => non-const-iterator conversions from overload
    resolution (previously it was a compiler error on instantiation, now
    it's SFINAE).

  - The == and != operators are now global (friends), and are not
    templated.

  - MachineInstrBundleIterator has overloads to compare against both
    const_pointer and const_reference.  This avoids the implicit
    conversions to MachineInstrBundleIterator that assert, instead just
    checking the address (and I added unit tests to confirm this).

Notably, the only remaining uses of ilist_iterator::getNodePtrUnchecked
are in ilist.h, and no code outside of ilist*.h directly relies on this
UB end-iterator-to-pointer conversion anymore.  It's still needed for
ilist_*sentinel_traits, but I'll clean that up soon.

llvm-svn: 278478
2016-08-12 05:05:36 +00:00
David Majnemer
9880e078f0 Use the range variant of remove_if instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278475
2016-08-12 04:32:37 +00:00
David Majnemer
319d420e44 Use the range variant of find/find_if instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

llvm-svn: 278469
2016-08-12 03:55:06 +00:00
David Majnemer
ae16160dfe Use the range variant of find_if instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278443
2016-08-12 00:18:03 +00:00
David Majnemer
85242fb9f9 Use the range variant of find instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

llvm-svn: 278433
2016-08-11 22:21:41 +00:00
David Majnemer
5423e4bff5 Use range algorithms instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278417
2016-08-11 21:15:00 +00:00
Krzysztof Parzyszek
c1b900dd08 [Hexagon] Allow non-returning calls in hardware loops
llvm-svn: 278416
2016-08-11 21:14:25 +00:00
Krzysztof Parzyszek
04f5a651f5 [Hexagon] Standardize "select" pseudo-instructions
- PS_pselect: general register pairs
- PS_vselect: vector registers (+ 128B version)
- PS_wselect: vector register pairs (+ 128B version)

llvm-svn: 278390
2016-08-11 19:12:18 +00:00
Krzysztof Parzyszek
fb4a7f1227 [Hexagon] Skip byval arguments when checking parameter attributes
From the point of view of register assignment, byval parameters are
ignored: a byval parameter is not going to be assigned to a register,
and it will not affect the assignments of subsequent parameters.
When matching registers with parameters in the bit tracker, make sure
to skip byval parameters before advancing the registers.

llvm-svn: 278375
2016-08-11 18:15:16 +00:00
Duncan P. N. Exon Smith
51ce2b263f Hexagon: Avoid dereferencing end() in HexagonCopyToCombine::findPairable
Check for end() before skipping through debug values.  This avoids
dereferencing end() when the instruction is the final one in the basic
block.  (It still assumes that a debug value will not be the final
instruction in the basic block.  No tests seemed to violate that.)

Many Hexagon tests trigger this, but they happen to magically pass right
now.  I found this because WIP patches for PR26753 convert them into
crashes.

llvm-svn: 278355
2016-08-11 16:40:03 +00:00
Krzysztof Parzyszek
8197d268d7 [Hexagon] Remove unused variants of LO/HI instructions
llvm-svn: 278266
2016-08-10 18:40:36 +00:00
Krzysztof Parzyszek
458d8ce010 [Hexagon] Simplify the SplitConst32/64 pass
llvm-svn: 278256
2016-08-10 18:05:47 +00:00
Krzysztof Parzyszek
bdc1668cd8 [Hexagon] Add extra patterns for single-precision min/max instructions
llvm-svn: 278252
2016-08-10 17:56:24 +00:00
Krzysztof Parzyszek
57fa692f90 [Hexagon] Fix table-gen decode conflict warnings for CONST32/64
llvm-svn: 278247
2016-08-10 17:22:24 +00:00
Krzysztof Parzyszek
631100a1eb [Hexagon] Use integer instructions for floating point immediates
Floating point instructions use general purpose registers, so the few
instructions that can put floating point immediates into registers are,
in fact, integer instruction. Use them explicitly instead of having
pseudo-instructions specifically for dealing with floating point values.

Simplify the constant loading instructions (from sdata) to have only two:
one for 32-bit values and one for 64-bit values: CONST32 and CONST64.

llvm-svn: 278244
2016-08-10 16:46:36 +00:00
Krzysztof Parzyszek
fc9436e726 [Hexagon] Delete HexagonSelectCCInfo.td
This file is not used. The location assignment of call arguments and
return values is implemented directly in HexagonISelLowering.

llvm-svn: 278237
2016-08-10 16:23:53 +00:00
Krzysztof Parzyszek
b6174c9c27 [Hexagon] Remove unneeded/unused ISD opcodes ARGEXTEND and FCONST32
llvm-svn: 278236
2016-08-10 16:20:33 +00:00
Krzysztof Parzyszek
24135ad35e [Hexagon] Add pattern for 64-bit mulhs
llvm-svn: 278040
2016-08-08 19:24:25 +00:00
Benjamin Kramer
a733725b3a Move helpers into anonymous namespaces. NFC.
llvm-svn: 277916
2016-08-06 11:13:10 +00:00
Krzysztof Parzyszek
5c74e232b1 [Hexagon] Validate register class when doing bit simplification
llvm-svn: 277740
2016-08-04 17:56:19 +00:00