Rafael Espindola
9e2a2dfb2d
initial support for branches
...
llvm-svn: 29854
2006-08-24 13:45:55 +00:00
Nate Begeman
1268d6cd46
Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
...
does emit linkable .o files in very simple cases.
llvm-svn: 29850
2006-08-23 21:08:52 +00:00
Rafael Espindola
af0512fc8d
add a README.txt
...
llvm-svn: 29814
2006-08-22 12:22:46 +00:00
Rafael Espindola
474f6c5bf1
initial support for select
...
llvm-svn: 29802
2006-08-21 22:00:32 +00:00
Rafael Espindola
13eb38e699
add the and instruction
...
llvm-svn: 29793
2006-08-21 13:58:59 +00:00
Rafael Espindola
c255c4c434
call computeRegisterProperties
...
llvm-svn: 29780
2006-08-20 01:49:49 +00:00
Chris Lattner
db290f7479
Constify some methods. Patch provided by Anton Vayvod, thanks!
...
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Chris Lattner
f92824aa27
Revert this patch, the front-end has been fixed to make it unneccesary.
...
llvm-svn: 29752
2006-08-17 18:43:24 +00:00
Chris Lattner
989f26b766
'g' is handled by the front-end.
...
llvm-svn: 29751
2006-08-17 18:12:28 +00:00
Andrew Lenharth
e720e5c444
Fix handling of 'g'. Closes 883
...
llvm-svn: 29750
2006-08-17 17:50:12 +00:00
Rafael Espindola
ff879761c1
add a "load effective address"
...
llvm-svn: 29748
2006-08-17 17:09:40 +00:00
Andrew Lenharth
bea8a84eb1
Add the 'c' constraint as needed by the linux kernel
...
llvm-svn: 29747
2006-08-17 16:07:50 +00:00
Andrew Lenharth
7fdc3bbbcf
Add support for S and D constraints, as needed to compile the linux kernel.
...
llvm-svn: 29746
2006-08-17 15:35:43 +00:00
Evan Cheng
33c5017ffb
Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen.
...
llvm-svn: 29741
2006-08-16 23:59:00 +00:00
Rafael Espindola
b98e92cb78
Declare the callee saved regs
...
Remove the hard coded store and load of the link register
Implement ARMFrameInfo
llvm-svn: 29727
2006-08-16 14:43:33 +00:00
Evan Cheng
7fb75bbc8d
SelectNodeTo() may return a SDOperand that is different from the input.
...
llvm-svn: 29726
2006-08-16 07:30:09 +00:00
Evan Cheng
af3e059bc4
RET_FLAG has an optional input flag, but it does not produce a flag result.
...
llvm-svn: 29725
2006-08-16 07:28:58 +00:00
Chris Lattner
7476a6c710
add a note
...
llvm-svn: 29722
2006-08-16 02:47:44 +00:00
Chris Lattner
2c12a719c0
Fix PowerPC/2006-08-15-SelectionCrash.ll and simplify selection code.
...
llvm-svn: 29715
2006-08-15 23:48:22 +00:00
Rafael Espindola
48bed9023d
select code like
...
ldr rx, [ry, #offset]
llvm-svn: 29664
2006-08-14 19:01:24 +00:00
Nate Begeman
0e92042770
Emit .set directives for jump table entries when possible, which reduces
...
the number of relocations in object files, shrinkifying them.
llvm-svn: 29650
2006-08-12 21:29:52 +00:00
Chris Lattner
c482a5d057
Fix a bug in a recent refactoring that broke a bunch of stuff.
...
llvm-svn: 29649
2006-08-12 07:20:05 +00:00
Chris Lattner
92774dab5c
eliminate extraneous blank line
...
llvm-svn: 29627
2006-08-11 21:08:16 +00:00
Chris Lattner
8ca6e82bce
Eliminate use of getNode that takes a vector.
...
llvm-svn: 29614
2006-08-11 17:38:39 +00:00
Chris Lattner
be2765058e
elimiante use of getNode that takes vector of operands.
...
llvm-svn: 29612
2006-08-11 17:22:35 +00:00
Chris Lattner
c3ce410ac3
eliminate use of getNode that takes vector of operands.
...
llvm-svn: 29611
2006-08-11 17:21:12 +00:00
Chris Lattner
4764bb3834
eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line.
...
llvm-svn: 29610
2006-08-11 17:19:54 +00:00
Chris Lattner
2f9c4426fc
Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector.
...
llvm-svn: 29609
2006-08-11 17:18:05 +00:00
Chris Lattner
7e905fba17
Fix miscompilation of float vector returns. Compile code to this:
...
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
blr
instead of:
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
*** vor f1, v2, v2
blr
llvm-svn: 29607
2006-08-11 16:47:32 +00:00
Evan Cheng
6053206580
Match tablegen changes.
...
llvm-svn: 29604
2006-08-11 09:08:15 +00:00
Evan Cheng
34a49551f5
CALLSEQ_* produces chain even if that's not needed.
...
llvm-svn: 29603
2006-08-11 09:03:33 +00:00
Evan Cheng
131c832304
Convert more calls of getNode() that takes a vector to pass in the start of an array.
...
llvm-svn: 29601
2006-08-11 07:35:45 +00:00
Rafael Espindola
2ddcf46717
correctly set LocalAreaOffset of TargetFrameInfo
...
llvm-svn: 29589
2006-08-09 17:37:45 +00:00
Rafael Espindola
f0b265b48b
fix the spill code
...
llvm-svn: 29583
2006-08-09 16:41:12 +00:00
Rafael Espindola
9e8af5c486
fix the loading of the link register in emitepilogue
...
llvm-svn: 29580
2006-08-09 13:15:47 +00:00
Rafael Espindola
ae2d1c53c7
change the addressing mode of the str instruction to reg+imm
...
llvm-svn: 29571
2006-08-08 20:35:03 +00:00
Rafael Espindola
7bfbb91f75
initial support for variable number of arguments
...
llvm-svn: 29567
2006-08-08 13:02:29 +00:00
Chris Lattner
7b1362fa52
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
llvm-svn: 29566
2006-08-08 02:23:42 +00:00
Evan Cheng
01cd84d113
Eliminate reachability matrix. It has to be calculated before any instruction
...
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.
llvm-svn: 29559
2006-08-08 00:31:00 +00:00
Evan Cheng
d18be1d9c1
Match tablegen isel changes.
...
llvm-svn: 29549
2006-08-07 22:28:20 +00:00
Evan Cheng
5d8f227a4a
Make XMM, FP register dwarf register numbers consistent with gcc.
...
llvm-svn: 29543
2006-08-07 21:02:39 +00:00
Rafael Espindola
bd29d36be4
use a 'register pressure reducing' scheduler
...
make sure only one move is used in a hello world
llvm-svn: 29520
2006-08-04 12:48:42 +00:00
Rafael Espindola
97918b1d11
Bug fix: always generate a RET_FLAG in LowerRET
...
fixes ret_null.ll and call.ll
llvm-svn: 29519
2006-08-03 22:50:11 +00:00
Chris Lattner
0b8dd1f32f
remove some more dead sparcv9 support stuff
...
llvm-svn: 29506
2006-08-03 18:55:44 +00:00
Chris Lattner
92e5f0a118
remove a dead proto
...
llvm-svn: 29505
2006-08-03 18:51:04 +00:00
Jim Laskey
a2080b26b9
Get darwin intel debugging up and running.
...
llvm-svn: 29504
2006-08-03 17:27:09 +00:00
Rafael Espindola
fa94338687
add and use ARMISD::RET_FLAG
...
llvm-svn: 29499
2006-08-03 17:02:20 +00:00
Evan Cheng
445674348f
Reflect change to AssignTopologicalOrder().
...
llvm-svn: 29480
2006-08-02 22:01:32 +00:00
Evan Cheng
6fd2b20b8a
Use of vector<bool> causes some horrendous compile time regression (2x)!
...
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.
llvm-svn: 29469
2006-08-02 09:18:33 +00:00
Nate Begeman
7d4b0d0b9b
Update the readme to remove duplicate information and clarify the loop
...
problem.
llvm-svn: 29468
2006-08-02 05:31:20 +00:00
Nate Begeman
d22dd0f92b
Disable LSR at -fast
...
llvm-svn: 29467
2006-08-02 05:29:40 +00:00
Rafael Espindola
719336441f
start comments with #
...
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
llvm-svn: 29451
2006-08-01 18:53:10 +00:00
Rafael Espindola
f11277971f
implement LowerConstantPool and LowerGlobalAddress
...
llvm-svn: 29433
2006-08-01 12:58:43 +00:00
Evan Cheng
29d6f9d252
Factor topological order code to SelectionDAG. Clean up.
...
llvm-svn: 29430
2006-08-01 08:17:22 +00:00
Chris Lattner
26ff12f7f5
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
...
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
llvm-svn: 29420
2006-07-31 23:26:50 +00:00
Rafael Espindola
0ea0399411
handle GlobalValue::InternalLinkage in doFinalization
...
llvm-svn: 29417
2006-07-31 20:38:13 +00:00
Evan Cheng
92eb9a1639
Remove a duplicate pattern.
...
llvm-svn: 29414
2006-07-31 18:43:10 +00:00
Evan Cheng
7e30f4efe7
Remove a duplicate pattern/
...
llvm-svn: 29413
2006-07-31 18:42:49 +00:00
Chris Lattner
8cb78a0d45
Make functions with an "asm" name propagate that asm name into the cbe.c file.
...
This fixes link errors on programs with these on targets with prefixes.
llvm-svn: 29390
2006-07-28 20:58:47 +00:00
Chris Lattner
51e1b75fba
Fix some ppc64 issues with vector code.
...
llvm-svn: 29384
2006-07-28 16:45:47 +00:00
Evan Cheng
e4c19806cd
Can't spell.
...
llvm-svn: 29383
2006-07-28 06:33:41 +00:00
Evan Cheng
8ea5ac0abd
Some clean up.
...
llvm-svn: 29382
2006-07-28 06:05:06 +00:00
Evan Cheng
5f0e94c299
Rename IsFoldableBy to CanBeFoldedleBy
...
llvm-svn: 29376
2006-07-28 01:03:48 +00:00
Evan Cheng
c43a75b7d4
Node selected into address mode cannot be folded.
...
llvm-svn: 29374
2006-07-28 00:49:31 +00:00
Evan Cheng
3b5f1c6248
Remove InFlightSet hack. No longer needed.
...
llvm-svn: 29373
2006-07-28 00:47:19 +00:00
Evan Cheng
8920047e85
Another duh. Determine topological order before any target node is added.
...
llvm-svn: 29371
2006-07-28 00:10:59 +00:00
Evan Cheng
9d43eb616a
Brain cramp..
...
llvm-svn: 29370
2006-07-27 23:35:40 +00:00
Evan Cheng
24b41a766b
Allocating too large an array for ReachibilityMatrix.
...
llvm-svn: 29367
2006-07-27 22:35:40 +00:00
Evan Cheng
17ccdcc415
Calculate the portion of reachbility matrix on demand.
...
llvm-svn: 29366
2006-07-27 22:10:00 +00:00
Evan Cheng
6a126e3adb
isNonImmUse is replaced by IsFoldableBy
...
llvm-svn: 29365
2006-07-27 21:19:10 +00:00
Evan Cheng
4ceeac4159
Resolve BB references with relocation.
...
llvm-svn: 29351
2006-07-27 18:21:10 +00:00
Evan Cheng
f363ae6ebd
synchronizeICache removeed from TargetJITInfo.
...
llvm-svn: 29348
2006-07-27 17:33:48 +00:00
Evan Cheng
dbcca8f422
Use reachbility information to determine whether a node can be folded into another during isel.
...
llvm-svn: 29346
2006-07-27 16:44:36 +00:00
Rafael Espindola
c0ede90402
emit global constants
...
llvm-svn: 29344
2006-07-27 11:38:51 +00:00
Evan Cheng
e869883c2d
Remove NodeDepth
...
llvm-svn: 29338
2006-07-27 06:40:15 +00:00
Chris Lattner
92a0b69813
Add some advice
...
llvm-svn: 29324
2006-07-27 04:24:14 +00:00
Jim Laskey
046abcdbec
Use the predicate.
...
llvm-svn: 29322
2006-07-27 02:05:13 +00:00
Nate Begeman
3d5f5b4e8b
Support jump tables when in PIC relocation model
...
llvm-svn: 29318
2006-07-27 01:13:04 +00:00
Jim Laskey
f35dd1a670
Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842.
...
llvm-svn: 29317
2006-07-27 01:12:23 +00:00
Evan Cheng
27c53dc36e
New entry.
...
llvm-svn: 29310
2006-07-26 21:49:52 +00:00
Chris Lattner
b4165c39d7
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
...
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng
beeb4e5c8c
- Refactor the code that resolve basic block references to a TargetJITInfo
...
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
llvm-svn: 29276
2006-07-25 20:40:54 +00:00
Evan Cheng
692215be9c
Can't commute shufps. The high / low parts elements come from different vectors.
...
llvm-svn: 29275
2006-07-25 20:25:40 +00:00
Rafael Espindola
2919d4ce24
implement function calling of functions with up to 4 arguments
...
llvm-svn: 29274
2006-07-25 20:17:20 +00:00
Evan Cheng
56e0c65937
Done.
...
llvm-svn: 29262
2006-07-21 23:07:23 +00:00
Rafael Espindola
9ea0bc742c
implemented sub
...
correctly update the stack pointer in the prologue and epilogue
llvm-svn: 29244
2006-07-21 12:26:16 +00:00
Evan Cheng
ed1c019899
This opt is now handled in DAG combine.
...
llvm-svn: 29243
2006-07-21 08:26:46 +00:00
Evan Cheng
56434b7578
A splat of a vector constant of all zero or all one is the vector constant.
...
llvm-svn: 29234
2006-07-20 23:09:47 +00:00
Evan Cheng
a634c2b838
Missing a space.
...
llvm-svn: 29233
2006-07-20 22:52:28 +00:00
Evan Cheng
100096b2bb
Clean up.
...
llvm-svn: 29228
2006-07-20 21:37:39 +00:00
Evan Cheng
6e440c39da
New entry.
...
llvm-svn: 29215
2006-07-19 21:29:30 +00:00
Jim Laskey
5d139b794a
Do once flag never set to true.
...
llvm-svn: 29214
2006-07-19 19:33:08 +00:00
Jim Laskey
88d7595eb3
Tidy up a few things.
...
llvm-svn: 29213
2006-07-19 19:32:06 +00:00
Jim Laskey
d31b3778d8
Reduce size of routine. Shrinks .o by 37%.
...
llvm-svn: 29210
2006-07-19 17:53:32 +00:00
Chris Lattner
0f4e4b1bcb
bswapped load/store instructions are only availble in indexed addressing form.
...
As such, use xoaddr (indexed only), not xaddr for address selection.
This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.
llvm-svn: 29208
2006-07-19 17:15:36 +00:00
Jim Laskey
227b585c6e
Bug#834 ICE (crash in code generator?) when building PCH .
...
Missing Darwin check in Intel ATT ASM printer.
llvm-svn: 29204
2006-07-19 11:54:50 +00:00
Evan Cheng
793f3d97ff
Misc. new entry.
...
llvm-svn: 29202
2006-07-19 06:06:24 +00:00
Evan Cheng
a2eaed93a0
INC / DEC instructions have shorter code size than ADD32ri8, etc.
...
llvm-svn: 29194
2006-07-19 00:27:29 +00:00
Evan Cheng
abd650f034
Add code size to target instruction use it as the 3rd isel sorting tie-breaker.
...
llvm-svn: 29193
2006-07-19 00:24:41 +00:00
Rafael Espindola
ad256854c0
initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)
...
llvm-svn: 29175
2006-07-18 17:00:30 +00:00
Chris Lattner
5985b77fae
Make the implicit def instructions look like other instrs.
...
llvm-svn: 29174
2006-07-18 16:33:26 +00:00
Rafael Espindola
40073f5767
skeleton of a lowerCall implementation for ARM
...
llvm-svn: 29159
2006-07-16 01:02:57 +00:00
Chris Lattner
f022962081
Remove what little AIX support we have. It has never been tested and isn't
...
complete.
llvm-svn: 29156
2006-07-15 01:24:23 +00:00
Chris Lattner
0f2560a313
Add an out-of-line virtual method for X86DwarfWriter to give it a home.
...
llvm-svn: 29153
2006-07-14 23:05:05 +00:00
Chris Lattner
ff8ee5486f
Add missing PPC64 extload/truncstores
...
llvm-svn: 29140
2006-07-14 04:42:02 +00:00
Chris Lattner
9aafd2b441
Add a note
...
llvm-svn: 29139
2006-07-14 04:07:29 +00:00
Chris Lattner
5c489bce2c
Another fix in the rotate encodings, needed when the first two operands are not
...
the same.
llvm-svn: 29136
2006-07-13 21:52:41 +00:00
Chris Lattner
753e4f5984
Print negative immediates as negative values instead of large constants
...
when using the immshifted addressing mode.
llvm-svn: 29130
2006-07-12 23:24:02 +00:00
Chris Lattner
726ca018c0
Fix encoding of rotates, such as rldicl
...
llvm-svn: 29128
2006-07-12 22:08:13 +00:00
Chris Lattner
024af03a3c
Implement PPC64 relocations types
...
llvm-svn: 29125
2006-07-12 21:23:20 +00:00
Chris Lattner
c9be3277e7
An overaggressive #ifdef allows a function to fall off the bottom of the
...
function instead of returning a value. This sometimes allowed the ppc32 jit
to be used in 64-bit mode.
llvm-svn: 29123
2006-07-12 20:42:10 +00:00
Chris Lattner
d0202bbed3
Add information preventing several register class constraints from working.
...
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
llvm-svn: 29118
2006-07-12 16:59:49 +00:00
Chris Lattner
fd9cbcab4a
The PPC64 JIT needs register numbers to encode instructions.
...
llvm-svn: 29114
2006-07-11 20:53:55 +00:00
Evan Cheng
db529debec
Emit inc / dec of registers as one byte instruction.
...
llvm-svn: 29110
2006-07-11 19:49:49 +00:00
Jim Laskey
d19ba2cf6c
It was pointed out that DEBUG() is only available with -debug.
...
llvm-svn: 29106
2006-07-11 18:25:13 +00:00
Jim Laskey
4c0d841280
Ensure that dump calls that are associated with asserts are removed from
...
non-debug build.
llvm-svn: 29105
2006-07-11 17:58:07 +00:00
Rafael Espindola
fdfaee67f5
add the memri memory operand
...
this makes it possible for ldr instructions with non-zero immediate
llvm-svn: 29103
2006-07-11 11:36:48 +00:00
Chris Lattner
b75fe307e1
Implement the inline asm 'A' constraint. This implements PR825 and
...
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
llvm-svn: 29101
2006-07-11 02:54:03 +00:00
Chris Lattner
2db97248f8
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
...
llvm-svn: 29096
2006-07-11 00:48:23 +00:00
Evan Cheng
7c11ad2f8d
New entry.
...
llvm-svn: 29091
2006-07-10 21:42:16 +00:00
Evan Cheng
b5e6a4a74d
Fixed stack objects do not specify alignments, but their offsets are known.
...
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
llvm-svn: 29090
2006-07-10 21:37:44 +00:00
Chris Lattner
abaaddc214
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
...
into i16/i32 load/stores.
llvm-svn: 29089
2006-07-10 20:56:58 +00:00
Chris Lattner
18c77b92a9
Mark internal function static
...
llvm-svn: 29085
2006-07-10 19:53:12 +00:00
Rafael Espindola
071c83dff0
create the raddr addressing mode that matches any register and the frame index
...
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
llvm-svn: 29079
2006-07-10 01:41:35 +00:00
Evan Cheng
d460c903b1
Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail.
...
llvm-svn: 29072
2006-07-07 21:37:21 +00:00
Evan Cheng
1d48a494a2
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
...
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
llvm-svn: 29042
2006-07-07 08:33:52 +00:00
Chris Lattner
da960e218f
Undisable ppc64 jit
...
llvm-svn: 29011
2006-07-06 17:10:42 +00:00
Evan Cheng
a6c9288186
Added option -code-model to set code model (only used in 64-bit) mode. Valid
...
values include small, kernel, medium, large, and default.
llvm-svn: 29009
2006-07-06 01:53:36 +00:00
Evan Cheng
801ea78096
Reorg. No functionality change.
...
llvm-svn: 28999
2006-07-05 22:17:51 +00:00
Evan Cheng
d75aed0d60
Fix JIT on non MacOS X i386 systems.
...
llvm-svn: 28992
2006-07-05 07:09:13 +00:00
Andrew Lenharth
9ea557b06b
These are already implemented
...
llvm-svn: 28990
2006-07-03 18:00:29 +00:00
Andrew Lenharth
98f5e9c45a
0 offsets for memory operands
...
llvm-svn: 28989
2006-07-03 17:57:34 +00:00
Evan Cheng
0df13a4f2a
Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer.
...
llvm-svn: 28984
2006-06-29 18:04:54 +00:00
Evan Cheng
5a7af4f99f
Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack.
...
llvm-svn: 28982
2006-06-29 01:48:36 +00:00
Evan Cheng
1d5fa40da3
Add shift and rotate by 1 instructions / patterns.
...
llvm-svn: 28980
2006-06-29 00:36:51 +00:00
Evan Cheng
803891eaa8
Always use xorps to clear XMM registers.
...
llvm-svn: 28979
2006-06-29 00:34:23 +00:00
Evan Cheng
1b53896495
Move .literal4 and .literal8 support into AsmPrinter.cpp
...
llvm-svn: 28978
2006-06-29 00:33:06 +00:00
Chris Lattner
adc7078c98
Hide x86 symbols
...
llvm-svn: 28976
2006-06-28 23:27:49 +00:00
Chris Lattner
496bd3fbf6
Use hidden visibility to make symbols in an anonymous namespace get
...
dropped. This shrinks libllvmgcc.dylib another 67K
llvm-svn: 28975
2006-06-28 23:17:24 +00:00
Chris Lattner
26f1985fdc
shrink libllvmgcc.dylib another 25K
...
llvm-svn: 28971
2006-06-28 22:00:36 +00:00
Evan Cheng
36d3fccf4b
Doh.
...
llvm-svn: 28963
2006-06-28 17:56:43 +00:00
Evan Cheng
e123f47232
Oops. Need to keep CP index.
...
llvm-svn: 28958
2006-06-28 07:55:24 +00:00
Evan Cheng
3963b5ee02
Darwin puts float and double literal constants into literal4 and literal8 sections.
...
llvm-svn: 28957
2006-06-28 07:35:41 +00:00
Andrew Lenharth
ae9cbe3545
this case isn't handled
...
llvm-svn: 28948
2006-06-27 23:19:14 +00:00
Rafael Espindola
f11f34a3d6
handle the "mov reg1, reg2" case in isMoveInstr
...
llvm-svn: 28945
2006-06-27 21:52:45 +00:00
Chris Lattner
852423b469
Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
...
llvm-svn: 28944
2006-06-27 21:08:52 +00:00
Chris Lattner
d7b1f61e72
Fix ppc64 jump tables
...
llvm-svn: 28941
2006-06-27 20:46:17 +00:00
Evan Cheng
a37a2f781e
Remove dead code.
...
llvm-svn: 28938
2006-06-27 20:34:14 +00:00
Chris Lattner
01965c2fd8
Print stubs for external globals right.
...
llvm-svn: 28936
2006-06-27 20:20:53 +00:00
Chris Lattner
2c3f67f6a7
Implement 64-bit select, bswap, etc.
...
llvm-svn: 28935
2006-06-27 20:14:52 +00:00
Chris Lattner
86c7ca4fd4
Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
...
and the data
llvm-svn: 28934
2006-06-27 20:07:26 +00:00
Chris Lattner
3422f47382
Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
...
the offset two bits to the left.
llvm-svn: 28933
2006-06-27 18:55:49 +00:00
Chris Lattner
8569f4042d
PPC doesn't have bit converts to/from i64
...
llvm-svn: 28932
2006-06-27 18:40:08 +00:00
Chris Lattner
da08df5d8a
Add 64-bit MTCTR so that indirect calls work.
...
llvm-svn: 28931
2006-06-27 18:36:44 +00:00
Chris Lattner
20959f59cd
Fix an incorrect store pattern. This fixes em3d.
...
llvm-svn: 28930
2006-06-27 18:22:50 +00:00
Chris Lattner
26f2bd4d4b
Implement 64-bit undef, sub, shl/shr, srem/urem
...
llvm-svn: 28929
2006-06-27 18:18:41 +00:00
Chris Lattner
b4a636f966
Use i32 for shift amounts instead of i64. This gets bisort working.
...
llvm-svn: 28927
2006-06-27 17:34:57 +00:00
Chris Lattner
01182783c4
Add zextload from i32 -> i64, with this, perimeter works.
...
llvm-svn: 28926
2006-06-27 17:30:08 +00:00
Chris Lattner
10e71f60df
Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
...
ppc64 mode!
llvm-svn: 28923
2006-06-27 01:02:25 +00:00
Chris Lattner
a572f110b4
Fix variable shadowing issue
...
llvm-svn: 28922
2006-06-27 00:10:13 +00:00
Chris Lattner
494f476ca7
Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but
...
doesn't work right).
llvm-svn: 28921
2006-06-27 00:04:13 +00:00
Chris Lattner
c8a47e0bb0
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
...
llvm-svn: 28920
2006-06-26 23:53:10 +00:00
Chris Lattner
cbd4d14b24
Improve PPC64 calling convention support
...
llvm-svn: 28919
2006-06-26 22:48:35 +00:00
Chris Lattner
5d0654b832
Remove two more definitions
...
llvm-svn: 28918
2006-06-26 22:47:37 +00:00
Chris Lattner
209c2db6b9
remove two unused instructions.
...
llvm-svn: 28917
2006-06-26 22:44:13 +00:00
Evan Cheng
db5c7909f5
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
...
llvm-svn: 28910
2006-06-24 08:36:10 +00:00
Jim Laskey
a8284f65e1
Add and sort "sections" in debug lines. This always stepping through
...
code in sections other than ".text", including weak sections like ctors and
dtors.
llvm-svn: 28909
2006-06-23 12:51:53 +00:00
Evan Cheng
d8090f4666
Eliminate unneeded parameter.
...
llvm-svn: 28907
2006-06-22 00:02:55 +00:00
Evan Cheng
420ea2c264
variable_ops instructions such as call can have any number of operands.
...
llvm-svn: 28906
2006-06-21 23:37:07 +00:00
Andrew Lenharth
e75c2ec042
Add memory operand and int regs
...
llvm-svn: 28896
2006-06-21 15:42:36 +00:00
Andrew Lenharth
f794ded743
inline asm, at least for floats
...
llvm-svn: 28895
2006-06-21 13:37:27 +00:00
Andrew Lenharth
78e0cc794f
fix argument problem
...
llvm-svn: 28893
2006-06-21 01:00:43 +00:00
Chris Lattner
5fa6e47534
Correct returns of 64-bit values, though they seemed to work before...
...
llvm-svn: 28892
2006-06-21 00:34:03 +00:00
Chris Lattner
10d22c274e
Make these predicates correct in 64-bit mode too.
...
llvm-svn: 28890
2006-06-20 23:21:20 +00:00
Chris Lattner
75e6449a0f
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
...
llvm-svn: 28889
2006-06-20 23:18:58 +00:00
Chris Lattner
2e1d3158f1
remove unused flag
...
llvm-svn: 28888
2006-06-20 23:15:07 +00:00
Chris Lattner
c74ef80a95
add some logical ops
...
llvm-svn: 28887
2006-06-20 23:11:59 +00:00
Chris Lattner
19df1fcd72
remove some unused patterns
...
llvm-svn: 28886
2006-06-20 23:11:36 +00:00
Chris Lattner
40a0a6c400
Add some more immediate patterns. This allows us to compile:
...
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
rldicr r2, r2, 32, 31
oris r2, r2, 48350
ori r2, r2, 17767
std r2, lo16(_Y)(r3)
blr
llvm-svn: 28885
2006-06-20 23:03:01 +00:00
Chris Lattner
690b03fb44
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
...
set, so disable the pattern in that case.
llvm-svn: 28884
2006-06-20 22:38:59 +00:00
Chris Lattner
eede1e2c00
Add some 64-bit logical ops.
...
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now compile this:
static unsigned long long Y;
void test3() {
Y = 0xF0F00F00;
}
into:
_test3:
li r2, 3840
lis r3, ha16(_Y)
xoris r2, r2, 61680
std r2, lo16(_Y)(r3)
blr
GCC produces:
_test3:
li r0,0
lis r2,ha16(_Y)
ori r0,r0,61680
sldi r0,r0,16
ori r0,r0,3840
std r0,lo16(_Y)(r2)
blr
llvm-svn: 28883
2006-06-20 22:34:10 +00:00
Evan Cheng
b0bb6dd981
__i386__, __i386, etc. are not defined for x86-64. Use __x86_64__.
...
llvm-svn: 28881
2006-06-20 22:11:12 +00:00
Chris Lattner
4ff5f3d852
64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.
...
llvm-svn: 28880
2006-06-20 21:39:30 +00:00
Chris Lattner
c97820b17c
Add some patterns for globals, so we can now compile this:
...
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld r2, lo16(_Y)(r2)
std r2, lo16(_X)(r3)
blr
llvm-svn: 28879
2006-06-20 21:23:06 +00:00
Chris Lattner
3ae4156dd7
Remove some now-unneeded casts from instruction patterns. With the casts
...
removed, tblgen produces identical output to with them in.
llvm-svn: 28867
2006-06-20 00:39:56 +00:00
Chris Lattner
19339e7a96
Add some patterns for ppc64
...
llvm-svn: 28866
2006-06-20 00:38:36 +00:00
Chris Lattner
2e64872117
Remove some ugly now-redundant casts.
...
llvm-svn: 28864
2006-06-20 00:25:29 +00:00
Chris Lattner
fbea064e90
Fix some mismatched type constraints
...
llvm-svn: 28862
2006-06-20 00:12:37 +00:00
Evan Cheng
98d508af83
Minor clean up.
...
llvm-svn: 28860
2006-06-19 19:25:30 +00:00
Rafael Espindola
14a59f5b6e
initial implementation of ARMRegisterInfo::eliminateFrameIndex
...
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
llvm-svn: 28854
2006-06-18 00:08:07 +00:00
Evan Cheng
e3b8db6dda
A new entry.
...
llvm-svn: 28848
2006-06-17 00:45:49 +00:00
Chris Lattner
d817b32a8e
Implement the getPointerRegClass method, which is required for the ptr_rc
...
magic to work.
llvm-svn: 28847
2006-06-17 00:01:04 +00:00
Evan Cheng
78e6cefad9
Later models likely to have Yonah like attributes.
...
llvm-svn: 28843
2006-06-16 21:58:49 +00:00
Chris Lattner
89a0d10812
Upgrade some load/store instructions to use the proper addressing mode stuff.
...
llvm-svn: 28841
2006-06-16 21:29:41 +00:00
Chris Lattner
163da7cdcb
In 64-bit mode, addr mode operands use G8RC instead of GPRC.
...
llvm-svn: 28840
2006-06-16 21:29:03 +00:00
Chris Lattner
81845946ff
fix some assumptions that pointers can only be 32-bits. With this, we can
...
now compile:
static unsigned long X;
void test1() {
X = 0;
}
into:
_test1:
lis r2, ha16(_X)
li r3, 0
stw r3, lo16(_X)(r2)
blr
Totally amazing :)
llvm-svn: 28839
2006-06-16 21:01:35 +00:00
Chris Lattner
cb294464e7
Split 64-bit instructions out into a separate .td file
...
llvm-svn: 28838
2006-06-16 20:22:01 +00:00
Chris Lattner
59947dda25
Force 64-bit register availability in 64-bit mode. For real.
...
llvm-svn: 28837
2006-06-16 20:05:06 +00:00
Chris Lattner
126464b577
Remove the -darwin and -aix llc options, inferring darwinism and aixism from
...
the target triple & subtarget info. woo.
llvm-svn: 28835
2006-06-16 18:50:48 +00:00
Chris Lattner
6a9ec7e80e
Don't pass target name into TargetData anymore, it is never used or needed.
...
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
llvm-svn: 28830
2006-06-16 18:22:52 +00:00