1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
Commit Graph

48565 Commits

Author SHA1 Message Date
Eli Friedman
e52bee3cc9 Add obvious missing case to switch. PR10497.
llvm-svn: 136130
2011-07-26 20:38:49 +00:00
Bill Wendling
b09ac9d7ec Use the correct for for the version. It's little endian and my brain is
obviously big endian. :-)
PR10502

llvm-svn: 136111
2011-07-26 18:31:41 +00:00
Jim Grosbach
8e642b2b18 ARM diagnostics for ldrexd/stredx out of order paired register operands.
llvm-svn: 136110
2011-07-26 18:25:39 +00:00
Bruno Cardoso Lopes
a493ad3938 Remove now unused patterns. 0 insertions(+), 98 deletions(-)
llvm-svn: 136109
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
b24e958ffb Cleanup old matching for PUNPCK* variants
llvm-svn: 136108
2011-07-26 18:22:27 +00:00
Devang Patel
5589e89f0c While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.
llvm-svn: 136106
2011-07-26 18:09:53 +00:00
Jim Grosbach
4681ef2468 ARM fix for LDREX source register encoding.
rdar://9842203

llvm-svn: 136102
2011-07-26 17:44:46 +00:00
Andrew Trick
ae93f1bf46 SCEV: Added a data structure for storing not-taken info per loop
exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.

llvm-svn: 136100
2011-07-26 17:19:55 +00:00
Jim Grosbach
6fbee17fef ARM assembly parsing and encoding for SWP[B] instructions.
llvm-svn: 136098
2011-07-26 17:15:11 +00:00
Jim Grosbach
ebe2f7ed93 ARM SWP instructions store, too, not just load.
llvm-svn: 136096
2011-07-26 17:11:05 +00:00
Jim Grosbach
3cd3217e6c Clean up the ARM asm parser a bit.
No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.

llvm-svn: 136095
2011-07-26 17:10:22 +00:00
Jim Grosbach
cba0d16334 ARM fix asm parsing range check for [0,31] immediates.
llvm-svn: 136091
2011-07-26 16:44:05 +00:00
Jim Grosbach
d3152480f2 ARM parsing and encoding for SVC instruction.
llvm-svn: 136090
2011-07-26 16:24:27 +00:00
Duncan Sands
0a14a12b51 Teach the Triple class about kfreebsd (FreeBSD kernel with
a GNU userspace).

llvm-svn: 136085
2011-07-26 15:30:04 +00:00
Rafael Espindola
a4148a5a84 Add LLVMAddAlwaysInlinerPass to the C API.
llvm-svn: 136083
2011-07-26 15:23:23 +00:00
Rafael Espindola
d7295c15ab LLVM 3.0 is here, remove old do nothing method.
llvm-svn: 136082
2011-07-26 15:17:32 +00:00
Duncan Sands
f74e5f1322 SrcDef is only written and never read. Remove it.
llvm-svn: 136080
2011-07-26 15:05:06 +00:00
Duncan Sands
52f6e018e2 Add helper function for getting true/false constants in a uniform
way for i1 and vector of i1 types.  Use these to make some code
more self-documenting.

llvm-svn: 136079
2011-07-26 15:03:53 +00:00
Bill Wendling
7f89bce2be The compact unwinding offsets are divided by 8 on 64-bit machines.
llvm-svn: 136065
2011-07-26 08:03:49 +00:00
Bruno Cardoso Lopes
ab40a57cce Add 256-bit isel for movsldup/movshdup
llvm-svn: 136051
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
85d8ca32c9 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

llvm-svn: 136050
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
2359b1d351 More cleanup, subtarget info isn't used here.
llvm-svn: 136049
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cde45ac9ca Add 128-bit AVX versions of movshdup/mosldup
llvm-svn: 136048
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
25698b90e9 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

llvm-svn: 136047
2011-07-26 02:39:13 +00:00
Jakob Stoklund Olesen
e6475ac496 Revert to RA_Assign when a virtreg separates into components.
When dead code elimination deletes a PHI value, the virtual register may
split into multiple connected components. In that case, revert each
component to the RS_Assign stage.

The new components are guaranteed to be smaller (the original value
numbers are distributed among the components), so this will always be
making progress. The components are now allowed to evict other live
ranges or be split again.

llvm-svn: 136034
2011-07-26 00:54:56 +00:00
Evan Cheng
8e380354c4 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
llvm-svn: 136031
2011-07-26 00:42:34 +00:00
Chandler Carruth
d896fd4e53 Remove a file from CMakeLists.txt that Evan removed in r136027.
llvm-svn: 136030
2011-07-26 00:30:33 +00:00
Evan Cheng
2e96785311 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
llvm-svn: 136027
2011-07-26 00:24:13 +00:00
Chandler Carruth
a571c5d5d3 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

llvm-svn: 136023
2011-07-26 00:09:08 +00:00
Evan Cheng
7a4385382d TargetAsmBackend has been renamed to MCAsmBackend.
llvm-svn: 136012
2011-07-25 23:28:36 +00:00
Evan Cheng
2a0a4e1a73 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
llvm-svn: 136010
2011-07-25 23:24:55 +00:00
Eli Friedman
50291d09da Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.

llvm-svn: 136009
2011-07-25 23:16:38 +00:00
Nick Lewycky
271216a67b Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!
llvm-svn: 136008
2011-07-25 23:14:22 +00:00
Jim Grosbach
ef3d573e31 ARM assembly parsing and encoding for SSAT16 instruction.
llvm-svn: 136006
2011-07-25 23:09:14 +00:00
Bruno Cardoso Lopes
c94d6a2d2c Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

llvm-svn: 136004
2011-07-25 23:05:32 +00:00
Bruno Cardoso Lopes
f457bc8120 Add remaining 256-bit vector bitcasts. This also fixes PR10451
llvm-svn: 136003
2011-07-25 23:05:28 +00:00
Bruno Cardoso Lopes
9380919dc5 - Handle special scalar_to_vector case: splats. Using a native 128-bit
shuffle before inserting on a 256-bit vector.
- Add AVX versions of movd/movq instructions
- Introduce a few COPY patterns to match insert_subvector instructions.
This turns a trivial insert_subvector instruction into a register copy,
coalescing the xmm into a ymm and avoid emiting on more instruction.

llvm-svn: 136002
2011-07-25 23:05:25 +00:00
Bruno Cardoso Lopes
c13bd4fd8c Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

llvm-svn: 136001
2011-07-25 23:05:16 +00:00
Benjamin Kramer
ba702bf08a Add a note about efficient codegen for binary log.
llvm-svn: 135996
2011-07-25 22:30:00 +00:00
Jakub Staszak
ddeb8772c8 BranchProbability::print returns void now.
llvm-svn: 135994
2011-07-25 22:27:42 +00:00
Eli Friedman
99fd6d41b5 Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.
llvm-svn: 135993
2011-07-25 22:25:42 +00:00
Jakub Staszak
b4bffb255a Add BlockFrequency class.
llvm-svn: 135992
2011-07-25 22:24:51 +00:00
Jim Grosbach
c1fe042da0 ARM assembly parsing and encoding for SSAT instruction.
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the
shift operand to correctly handle the allowed shift types and immediate ranges
and issue meaningful diagnostics when an illegal value or shift type is
specified. Add aliases to parse an ommitted shift operand (default value of
'lsl #0').

Add tests for diagnostics and proper encoding.

llvm-svn: 135990
2011-07-25 22:20:28 +00:00
Andrew Trick
8e55bd70ba Add clarifying comments for the new arguments to UnrollLoop.
llvm-svn: 135988
2011-07-25 22:17:47 +00:00
Evan Cheng
3406f14979 Refactoring fail.
llvm-svn: 135986
2011-07-25 22:16:37 +00:00
Evan Cheng
e254f6491b Move CBackend and CppBackend MC initialization to TargetInfo.
llvm-svn: 135982
2011-07-25 21:44:12 +00:00
Eli Friedman
234bbb2b95 Get rid of an incorrect optimization for shuffles with PALIGNR and simplify isPALIGNRMask.
Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle.

llvm-svn: 135980
2011-07-25 21:36:45 +00:00
Evan Cheng
0854e3acbc Fix more MC layering violations.
llvm-svn: 135979
2011-07-25 21:32:49 +00:00
Evan Cheng
e278841e44 More MC layering violations.
llvm-svn: 135978
2011-07-25 21:29:26 +00:00
Chandler Carruth
df8888b839 Add a missing enumerator to this switch. Currently its in the
assert-path code, as previously we would have fallen off the end of the
function, but please review and let me know if this should go somewhere
else.

This fixes a Clang warning:
lib/MC/MCMachOStreamer.cpp:201:11: error: enumeration value 'MCSA_IndirectSymbol' not handled in switch [-Werror,-Wswitch-enum]
  switch (Attribute) {
          ^
1 error generated.

llvm-svn: 135976
2011-07-25 21:21:08 +00:00