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Commit Graph

87278 Commits

Author SHA1 Message Date
Quentin Colombet
f44d047e16 [GlobalISel][IRTranslator] Change the ownership of the MIRBuilder field.
llvm-svn: 260551
2016-02-11 17:53:23 +00:00
Quentin Colombet
eafc68135d [GlobalISel][IRTranslator] Fix a typo in assert.
llvm-svn: 260550
2016-02-11 17:52:28 +00:00
Quentin Colombet
30b98d1d74 [GlobalISel][IRTranslator] Teach the pass how to translate Add instructions.
llvm-svn: 260549
2016-02-11 17:51:31 +00:00
Quentin Colombet
2edf260e98 [GlobalISel] Add a MachineIRBuilder class.
Helper class to build machine instrs. This is a higher abstraction
than MachineInstrBuilder.

llvm-svn: 260547
2016-02-11 17:44:59 +00:00
Jacques Pienaar
837592b498 [lanai] Add Lanai triple.
Add triple for the Lanai backend.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend".

Differential Revision: http://reviews.llvm.org/D17003

llvm-svn: 260545
2016-02-11 17:16:20 +00:00
Jun Bum Lim
2bc62cf930 Fixed typo in r260530
llvm-svn: 260541
2016-02-11 16:46:13 +00:00
Hans Wennborg
3625a4f59b Revert r260507: "[X86] Enable the LEA optimization pass by default."
This caused PR26575.

llvm-svn: 260538
2016-02-11 16:44:06 +00:00
Jun Bum Lim
a57736cc50 [AArch64] Refactoring findMatchingStore() in aarch64-ldst-opt; NFC
Summary: This change makes findMatchingStore() follow the same coding style introduced in r260275.

Reviewers: gberry, junbuml

Subscribers: aemerson, rengolin, haicheng, bmakam, mssimpso

Differential Revision: http://reviews.llvm.org/D17083

llvm-svn: 260534
2016-02-11 16:18:24 +00:00
Jun Bum Lim
555cbf018b [InstCombine] Simplify a known nonzero incoming value of PHI
Summary:
When a PHI is used only to be compared with zero, it is possible to replace an
incoming value with any non-zero constant if the incoming value can be proved as
a known nonzero value. For example, in below code, we can replace the incoming value %v with
any non-zero constant based on the fact that the PHI is only used to be compared with zero
and %v is a known non-zero value:
  %v = select %cond, 1, 2
  %p = phi [%v, BB] ...
  %c = icmp eq, %p, 0

Reviewers: mcrosier, jmolloy, sanjoy

Subscribers: hfinkel, mcrosier, majnemer, llvm-commits, haicheng, bmakam, mssimpso, gberry

Differential Revision: http://reviews.llvm.org/D16240

llvm-svn: 260530
2016-02-11 15:50:07 +00:00
Benjamin Kramer
9abf7d608e Drop the hidden visibility from DebugHandlerBase for now.
If a class has hidden visibility all derived classes and all classes
that have it as a member must have hidden visibility too. That may
be fixable here but requires changes to quite a lot of debug info
classes.

This is also one of the things that GCC enforces aggressively while
clang ignores it, making testing more annoying than necessary.

llvm-svn: 260529
2016-02-11 15:41:56 +00:00
Chad Rosier
0febca6df8 [AArch64] Improve load/store optimizer to handle LDUR + LDR.
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.

This is a reapplication of r259812, which had an incorrect assert.  The
test_stur_str_no_assert() test is a reduced version of the issue hit in
the AArch64 self-host.

PR24465

llvm-svn: 260523
2016-02-11 14:25:08 +00:00
Scott Egerton
1867a0f5e4 [MC] Fixed parsing of macro arguments where expressions with spaces are present.
Summary:
Fixed an issue for mips with an instruction such as 'sdc1 $f1, 272 +8(a0)' which has a space between '272' and '+'. The parser would then parse '272' and '+8' as two arguments instead of a single expression resulting in one too many arguments in the pseudo instruction.
The reason that the test case has been changed is so that the expected
output matches the output of the GNU assembler.

Reviewers: vkalintiris, dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D13592

llvm-svn: 260521
2016-02-11 13:48:49 +00:00
Artur Pilipenko
3b9ebd21e4 Make context-sensitive isDereferenceable queries in isSafeToLoadUnconditionally
This is a part of the refactoring to unify isSafeToLoadUnconditionally and isDereferenceablePointer functions. In the subsequent change isSafeToSpeculativelyExecute will be modified to use isSafeToLoadUnconditionally instead of isDereferenceableAndAlignedPointer.   

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D16227

llvm-svn: 260520
2016-02-11 13:42:59 +00:00
Tamas Berghammer
b88f17016b Fix MSVC 2013 build after rL260504
llvm-svn: 260511
2016-02-11 11:27:51 +00:00
Artur Pilipenko
f8c51ed6a0 Don't propagate dereferenceable attribute through gc.relocate in InstCombine
Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D16143

llvm-svn: 260509
2016-02-11 11:22:46 +00:00
Andrey Turetskiy
50853c0d36 [X86] Enable the LEA optimization pass by default.
Differential Revision: http://reviews.llvm.org/D16877

llvm-svn: 260507
2016-02-11 10:51:26 +00:00
Ashutosh Nema
dfd5a90734 Fixed typo in comment & coding style for LoopVersioningLICM.
llvm-svn: 260504
2016-02-11 09:23:53 +00:00
Simon Atanasyan
b344cf2221 [MC][ELF] Handle MIPS specific .sdata and .sbss directives
MIPS specific .sdata and .sbss directives create corresponding sections
with proper initialized ELF flags including ELF::SHF_MIPS_GPREL.

Differential Revision: http://reviews.llvm.org/D17001

llvm-svn: 260498
2016-02-11 06:45:54 +00:00
Matt Arsenault
36dc1c179e AMDGPU: Fix constant bus use check with subregisters
If the two operands to an instruction were both
subregisters of the same super register, it would incorrectly
think this counted as the same constant bus use.

This fixes the verifier error in fmin_legacy.ll which
was missing -verify-machineinstrs.

llvm-svn: 260495
2016-02-11 06:15:39 +00:00
Matt Arsenault
db87fa7ab4 AMDGPU: Fix passes depending on dominator tree for no reason
llvm-svn: 260494
2016-02-11 06:15:34 +00:00
Matt Arsenault
612f0d286e AMDGPU: Fix not handling new workitem intrinsics in DivergenceAnalysis
llvm-svn: 260491
2016-02-11 05:32:51 +00:00
Matt Arsenault
cdd789021d AMDGPU: Split R600 and SI store lowering
These were only sharing some somewhat incorrect
logic for when to scalarize or split vectors.

llvm-svn: 260490
2016-02-11 05:32:46 +00:00
Tom Stellard
c44c82f004 [AMDGPU] Assembler: Fix VOP3 only instructions
Separate methods to convert parsed instructions to MCInst:

  - VOP3 only instructions (always create modifiers as operands in MCInst)
  - VOP2 instrunctions with modifiers (create modifiers as operands
    in MCInst when e64 encoding is forced or modifiers are parsed)
  - VOP2 instructions without modifiers (do not create modifiers
    as operands in MCInst)
  - Add VOP3Only flag. Pass HasMods flag to VOP3Common.
  - Simplify code that deals with modifiers (-1 is now same as
    0). This is no longer needed.
  - Add few tests (more will be added separately).
    Update error message now correct.

Patch By: Nikolay Haustov

Differential Revision: http://reviews.llvm.org/D16778

llvm-svn: 260483
2016-02-11 03:28:15 +00:00
Quentin Colombet
fa1dcb6a31 [GlobalISel][MachineRegisterInfo] Add a method to create generic vregs.
For now, generic virtual registers will not have a register class. We may want
to change that. For instance, if we want to use all the methods from
TargetRegisterInfo with generic virtual registers, we need to either have some
sort of generic register classes that do what we want, or teach those methods
how to deal with nullptr register class.

Although the latter seems easy enough to do, we may still want to differenciate
generic register classes from nullptr to catch cases where nullptr gets
introduced by a bug of some sort.

Anyway, I will file a PR to keep track of that.

llvm-svn: 260474
2016-02-11 00:19:17 +00:00
Teresa Johnson
0f2dd60a58 Fix Windows bot failure in Transforms/FunctionImport/funcimport.ll
Make sure we split ":" from the end of the global function id (which
is <path>:<function> for local functions) instead of the beginning to
avoid splitting at the wrong place for Windows file paths that contain
a ":".

llvm-svn: 260469
2016-02-10 23:47:38 +00:00
Quentin Colombet
c825e072a3 [GlobalISel] Remember the size of generic virtual registers
llvm-svn: 260468
2016-02-10 23:43:48 +00:00
Mehdi Amini
4f13675fcd FunctionImport: add a progressive heuristic to limit importing too deep in the callgraph
The current function importer will walk the callgraph, importing
transitively any callee that is below the threshold. This can
lead to import very deep which is costly in compile time and not
necessarily beneficial as most of the inline would happen in
imported function and not necessarilly in user code.

The actual factor has been carefully chosen by flipping a coin ;)
Some tuning need to be done (just at the existing limiting threshold).

Reviewers: tejohnson

Differential Revision: http://reviews.llvm.org/D17082

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260466
2016-02-10 23:31:45 +00:00
Mehdi Amini
ba524073d1 Use a StringSet in Internalize, and allow to create the pass from an existing one (NFC)
There is not reason to pass an array of "char *" to rebuild a set if
the client already has one.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260462
2016-02-10 23:24:31 +00:00
Mehdi Amini
ec8aba4a5a Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap
Summary:
Just like the existing find_as() method, the new insert_as() accepts
an extra parameter which is used as a key to find the bucket in the
map.
When creating a Constant, we want to check the map before actually
creating the object. In this case we have to perform two queries to
the map, and this extra parameter can save recomputing the hash value
for the second query.

Reviewers: dexonsmith, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16268

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260458
2016-02-10 23:07:29 +00:00
Quentin Colombet
b9cf91e435 [GlobalISel] More detailed skeleton for the IRTranslator.
llvm-svn: 260456
2016-02-10 22:59:27 +00:00
Mehdi Amini
b3357c1cc2 Simplify handleOperandChangeImpl() removing last argument (NFC)
The Use argument was used to compute the operand number for a fast
path when replacing only one operand. However we always have to go
through all the operands. So the argument number can be recomputed
locally anyway.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260454
2016-02-10 22:47:15 +00:00
Philip Reames
2a0c44000d Follow up to 260439, Speculative fix to clang builders
It looks like clang has a couple of test cases which caught the fact LVI was not slightly more precise after 260439.  When looking at the failures, it struck me as wasteful to be querying nullness of a constant via LVI, so instead of tweaking the clang tests, let's just stop querying constants from this source.

llvm-svn: 260451
2016-02-10 22:22:41 +00:00
Rong Xu
9fde022792 [PGO] Make the number of records for each value site metada adjustable
The patch adds a parameter in annotateValueSite() to control the max number
of records written to the value profile meta data for each value site. The
default is kept as the current value of 3.

Differential Revision: http://reviews.llvm.org/D17084

llvm-svn: 260450
2016-02-10 22:19:43 +00:00
Matthias Braun
abe0b705bd APInt: Simplify EqualSlowCase
Previously the code used getActiveBits() to determine the highest set
bit of each APInt first. However doing so requires the same amount of
memory accesses as simply comparing both numbers right away.

Removing all the active bit checks leads to simpler code and is faster
in my benchmark.

Differential Revision: http://reviews.llvm.org/D16620

llvm-svn: 260447
2016-02-10 22:13:10 +00:00
Teresa Johnson
c47e95e1b1 Restore "[ThinLTO] Use MD5 hash in function index." with fix
This restores commit r260408, along with a fix for a bot failure.

The bot failure was caused by dereferencing a unique_ptr in the same
call instruction parameter list where it was passed via std::move.
Apparently due to luck this was not exposed when I built the compiler
with clang, only with gcc.

llvm-svn: 260442
2016-02-10 21:55:02 +00:00
Philip Reames
6a008ae64e [LVI] Handle constants defensively
There's nothing preventing callers of LVI from asking for lattice values representing a Constant.  In fact, given that several callers are walking back through PHI nodes and trying to simplify predicates, such queries are actually quite common.  This is mostly harmless today, but we start volatiling assertions if we add new calls to getBlockValue in otherwise reasonable places.

Note that this change is not NFC.  Specifically:
1) The result returned through getValueAt will now be more precise.  In principle, this could trigger any latent infinite optimization loops in callers, but in practice, we're unlikely to see this.
2) The result returned through getBlockValueAt is potentially weakened for non-constants that were previously queried.  With the old code, you had the possibility that a later query might bypass the cache and discover some information the original query did not.  I can't find a scenario which actually causes this to happen, but it was in principle possible.  On the other hand, this may end up reducing compile time when the same value is queried repeatedly.  

llvm-svn: 260439
2016-02-10 21:46:32 +00:00
Derek Schuff
41d067a08e [WebAssembly] Re-triage list of compilation failures for torture tests
llvm-svn: 260438
2016-02-10 21:43:16 +00:00
Reid Kleckner
ea1c57fa88 [codeview] Describe int local variables using .cv_def_range
Summary:
Refactor common value, scope, and label tracking logic out of DwarfDebug
into a common base class called DebugHandlerBase.

Update an old LLVM IR test case to avoid an assertion in LexicalScopes.

Reviewers: dblaikie, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16931

llvm-svn: 260432
2016-02-10 20:55:49 +00:00
Derek Schuff
5c2592b245 [WebAssembly] Address comments left over from r260421
llvm-svn: 260429
2016-02-10 20:14:15 +00:00
Nicolai Haehnle
e72d316342 AMDGPU: Release the scavenged offset register during VGPR spill
Summary:
This fixes a crash where subsequent spills would be unable to scavenge
a register. In particular, it fixes a crash in piglit's
spec@glsl-1.50@execution@geometry@max-input-components (the test still
has a shader that fails to compile because of too many SGPR spills, but
at least it doesn't crash any more).

This is a candidate for the release branch.

Reviewers: arsenm, tstellarAMD

Subscribers: qcolombet, arsenm

Differential Revision: http://reviews.llvm.org/D16558

llvm-svn: 260427
2016-02-10 20:13:58 +00:00
Sanjay Patel
b9786603cc [x86] refactor masked load/store combine logic ; NFCI
llvm-svn: 260426
2016-02-10 20:02:45 +00:00
Derek Schuff
08898bef47 [WebAssembly] Switch varags calling convention to use a register
Instead of passing varargs directly on the user stack, allocate a buffer in
the caller's stack frame and pass a pointer to it. This simplifies the C
ABI (e.g. non-C callers of C functions do not need to use C's user stack if
they have their own mechanism) and allows further optimizations in the future
(e.g. fewer functions may need to use the stack).

Differential Revision: http://reviews.llvm.org/D17048

llvm-svn: 260421
2016-02-10 19:51:04 +00:00
Chad Rosier
b149add9e6 [AArch64] Refactor is logic into a helper function. NFC.
llvm-svn: 260419
2016-02-10 19:45:48 +00:00
Teresa Johnson
02e161e44f Revert "[ThinLTO] Use MD5 hash in function index." due to bot failure
This reverts commit r260408. Bot failure that I need to investigate.

llvm-svn: 260412
2016-02-10 19:11:15 +00:00
Teresa Johnson
b1e839beb3 [ThinLTO] Use MD5 hash in function index.
Summary:
This patch uses the lower 64-bits of the MD5 hash of a function name as
a GUID in the function index, instead of storing function names. Any
local functions are first given a global name by prepending the original
source file name. This is the same naming scheme and GUID used by PGO in
the indexed profile format.

This change has a couple of benefits. The primary benefit is size
reduction in the combined index file, for example 483.xalancbmk's
combined index file was reduced by around 70%. It should also result in
memory savings for the index file in memory, as the in-memory map is
also indexed by the hash instead of the string.

Second, this enables integration with indirect call promotion, since the
indirect call profile targets are recorded using the same global naming
convention and hash. This will enable the function importer to easily
locate function summaries for indirect call profile targets to enable
their import and subsequent promotion.

The original source file name is recorded in the bitcode in a new
module-level record for use in the ThinLTO backend pipeline.

Reviewers: davidxl, joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D17028

llvm-svn: 260408
2016-02-10 18:57:54 +00:00
Chad Rosier
b12fd0bc31 [AArch64] Update comment to match reality. NFC.
llvm-svn: 260406
2016-02-10 18:49:28 +00:00
Colin LeMahieu
db6a39c7b6 [MC] Merge VK_PPC_TPREL in to generic VK_TPREL.
Differential Revision: http://reviews.llvm.org/D17038

llvm-svn: 260401
2016-02-10 18:32:01 +00:00
Rong Xu
3f7545fbb6 [PGO] Indirect-call profile annotation in IR level profiling
This patch reads the indirect-call value records in the profile and makes the
annotation in the indirect-call instruction. This is for IR level profile
instrumentation.

Differential Revision: http://reviews.llvm.org/D16935

llvm-svn: 260400
2016-02-10 18:24:45 +00:00
Matt Arsenault
409ffa77e6 AMDGPU: Fix indentation and variable names
llvm-svn: 260399
2016-02-10 18:21:45 +00:00
Matt Arsenault
2c8154f002 AMDGPU: Split R600 and SI load lowering
These weren't actually sharing anything in the common
LowerLOAD.

llvm-svn: 260398
2016-02-10 18:21:39 +00:00
Teresa Johnson
aef9d8ceab [ThinLTO] Move global processing from Linker to TransformUtils (NFC)
Summary:
As discussed on IRC, move the ThinLTOGlobalProcessing code out of
the linker, and into TransformUtils. The name of the class is changed
to FunctionImportGlobalProcessing.

Reviewers: joker.eph, rafael

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D17081

llvm-svn: 260395
2016-02-10 18:11:31 +00:00
James Y Knight
529a53c338 [SPARC] Repair floating-point condition encodings in assembly parser.
The encodings for floating point conditions A(lways) and N(ever) were
incorrectly specified for the assembly parser, per Sparc manual v8 page
121. This change corrects that mistake.

Also, strangely, all of the branch instructions already had MC test
cases, except for the broken ones. Added the tests.

Patch by Chris Dewhurst

Differential Revision: http://reviews.llvm.org/D17074

llvm-svn: 260390
2016-02-10 17:47:20 +00:00
Daniel Berlin
95ef8800a5 Rename a member variable to be more accurate with how it is used
llvm-svn: 260389
2016-02-10 17:41:25 +00:00
Daniel Berlin
06f04c3940 Constify two functions, make them accessible to unit tests
llvm-svn: 260387
2016-02-10 17:39:43 +00:00
Rong Xu
846b326ad9 [PGO] Differentiate Clang instrumentation and IR level instrumentation profiles
This patch uses one bit in profile version to differentiate Clang
instrumentation and IR level instrumentation profiles.

PGOInstrumenation generates a COMDAT variable __llvm_profile_raw_version so
that the compiler runtime can set the right profile kind.
For Maco-O platform, we generate the variable as linkonce_odr linkage as
COMDAT is not supported.

PGOInstrumenation now checks this bit to make sure it's an IR level
instrumentation profile.

The patch was submitted as r260164 but reverted due to a Darwin test breakage.
Original Differential Revision: http://reviews.llvm.org/D15540

Differential Revision: http://reviews.llvm.org/D17020

llvm-svn: 260385
2016-02-10 17:18:30 +00:00
Chad Rosier
4c1db07ad4 [AArch64] This bit of logic is specific to pairing. NFC.
llvm-svn: 260383
2016-02-10 15:52:46 +00:00
Teresa Johnson
142f505f7b Fix VST_CODE_* bitcode id comments (NFC)
llvm-svn: 260382
2016-02-10 15:02:51 +00:00
Andrey Turetskiy
b4ff8194a0 [X86] Fix stack alignment for MCU target, by Anton Nadolskiy.
This patch fixes stack alignments for MCU (should be aligned to 4 bytes).

Differential Revision: http://reviews.llvm.org/D15646

llvm-svn: 260375
2016-02-10 11:57:06 +00:00
Dylan McKay
35d0ab1842 [AVR] Add instruction definitions
Summary: Add the AVR instruction tablegen definitions.

Reviewers: stoklund, hfinkel, dsanders, arsenm, vkalintiris

Subscribers: dylanmckay, agnat, rjordans, llvm-commits

Differential Revision: http://reviews.llvm.org/D15703

llvm-svn: 260363
2016-02-10 08:55:23 +00:00
JF Bastien
de7879a249 X86: Remove useless semicolon
llvm-svn: 260359
2016-02-10 04:04:12 +00:00
Tom Stellard
d81656340b StructurizeCFG: Initialize SkipUniformRegions in the default constructor
This should fix some random bot failures caused by r260336.

llvm-svn: 260342
2016-02-10 01:10:09 +00:00
Lang Hames
5d09e23f7a [Orc] Add lazy-JITting support for i386.
This patch adds a new class, OrcI386, which contains the hooks needed to
support lazy-JITing on i386 (currently only for Pentium 2 or above, as the JIT
re-entry code uses the FXSAVE/FXRSTOR instructions).

Support for i386 is enabled in the LLI lazy JIT and the Orc C API, and
regression and unit tests are enabled for this architecture.

llvm-svn: 260338
2016-02-10 01:02:33 +00:00
Tom Stellard
0a59f0ceeb StructurizeCFG: Add an option for skipping regions with only uniform branches
Summary:
Tests for this will be added once the AMDGPU backend enables this
option.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16602

llvm-svn: 260336
2016-02-10 00:39:37 +00:00
Amaury Sechet
ecd50f3e0c Add support for struct in C API test
Summary: As per title. This also include extra support for insertvalue and extracvalue.

Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17055

llvm-svn: 260335
2016-02-10 00:38:50 +00:00
Amaury Sechet
cd1fa43291 Add binding for counting argument and find called value of call and invoke instruction from the C API.
Summary: As per title. This remove the need to rely on internal knowledge of call and invoke instruction to find called value and argument count.

Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker

Differential Revision: http://reviews.llvm.org/D17054

llvm-svn: 260332
2016-02-10 00:09:37 +00:00
Sanjay Patel
f3f4f7a88a [x86] convert masked load of exactly one element to scalar load
This is the load counterpart to the store optimization that was added in:
http://reviews.llvm.org/rL260145

llvm-svn: 260325
2016-02-09 23:44:35 +00:00
Justin Lebar
f16a73d9fa Add convergent-removing bits to FunctionAttrs pass.
Summary:
Remove the convergent attribute on any functions which provably do not
contain or invoke any convergent functions.

After this change, we'll be able to modify clang to conservatively add
'convergent' to all functions when compiling CUDA.

Reviewers:  jingyue, joker.eph

Subscribers: llvm-commits, tra, jhen, hfinkel, resistor, chandlerc, arsenm

Differential Revision: http://reviews.llvm.org/D17013

llvm-svn: 260319
2016-02-09 23:03:22 +00:00
Peter Collingbourne
e87706e06b Fix GCC build.
llvm-svn: 260317
2016-02-09 23:01:38 +00:00
Ahmed Bougacha
f23bc5a4de [CodeGen] Prefer "if (SDValue R = ...)" to "if (R.getNode())". NFCI.
llvm-svn: 260316
2016-02-09 22:54:12 +00:00
Ahmed Bougacha
3589294b5a [X86] Don't reuse an unrelated variable, create a new one. NFC.
Using Op makes it look like we're doing something with it.
We're really not.

llvm-svn: 260315
2016-02-09 22:54:05 +00:00
Ahmed Bougacha
68b447ec28 [X86] Remove unnecessary assignment. NFC.
llvm-svn: 260314
2016-02-09 22:53:58 +00:00
Amaury Sechet
d4ff40d570 Add C binding for AllocaInst::getAllocatedType
Summary:
Comes with an awesome test.

Depends on D16912

Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16942

llvm-svn: 260313
2016-02-09 22:50:53 +00:00
Peter Collingbourne
54e8749794 WholeProgramDevirt: introduce.
This pass implements whole program optimization of virtual calls in cases
where we know (via bitset information) that the list of callees is fixed. This
includes the following:

- Single implementation devirtualization: if a virtual call has a single
  possible callee, replace all calls with a direct call to that callee.

- Virtual constant propagation: if the virtual function's return type is an
  integer <=64 bits and all possible callees are readnone, for each class and
  each list of constant arguments: evaluate the function, store the return
  value alongside the virtual table, and rewrite each virtual call as a load
  from the virtual table.

- Uniform return value optimization: if the conditions for virtual constant
  propagation hold and each function returns the same constant value, replace
  each virtual call with that constant.

- Unique return value optimization for i1 return values: if the conditions
  for virtual constant propagation hold and a single vtable's function
  returns 0, or a single vtable's function returns 1, replace each virtual
  call with a comparison of the vptr against that vtable's address.

Differential Revision: http://reviews.llvm.org/D16795

llvm-svn: 260312
2016-02-09 22:50:34 +00:00
Amaury Sechet
ef4c99d35b Improve the C API echo test tool to emit basic block is the right order.
Summary: As per title. Also add a facility method to get the name of a basic block from the C API.

Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16912

llvm-svn: 260309
2016-02-09 22:36:41 +00:00
Simon Atanasyan
b8beb47094 [mips] Extend MipsAsmParser class to handle %got(sym + const) expressions
Now the parser supports `%got(sym)` expressions only but `%got(sym + const)`
variant is also valid and accepted by GAS.

Differential Revision: http://reviews.llvm.org/D16885

llvm-svn: 260305
2016-02-09 22:31:49 +00:00
Sanjoy Das
d436ec9768 [MemoryBuiltins] Fix an issue with hasNoAliasAttr
Summary:
`hasNoAliasAttr` is buggy: it checks to see if the called function has
a `noalias` attribute, which is incorrect since functions are not even
allowed to have the `noalias` attribute.  The comment on its only
caller, `llvm::isNoAliasFn`, makes it pretty clear that the intention
to do the `noalias` check on the return value, and not the callee.

Unfortunately I couldn't find a way to test this upstream -- fixing
this does not change the observable behavior of any of the passes that
use this.  This is not very surprising, since `noalias` does not tell
anything about the contents of the allocated memory (so, e.g., you
still cannot fold loads).  I'll be happy to be proven wrong though.

Reviewers: chandlerc, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17037

llvm-svn: 260298
2016-02-09 21:54:18 +00:00
Philip Reames
bcbb054410 [Verifier] Add checks for masked.load and masked.store intrinsics
While trying to track down what appears to be a LoopVectorizer bug, I noticed that we had no validation of the correctness of calls emitted to @llvm.masked.load and @llvm.masked.store.  This meant malformed IR was showing up much much later than it should.  Hopefully, having Verifier rules in place will make this easier to isolate.

llvm-svn: 260296
2016-02-09 21:43:12 +00:00
Sanjay Patel
4c9e344480 [SelectionDAG] make getMemBasePlusOffset() accessible; NFCI
I reinvented this functionality in http://reviews.llvm.org/D16828 because it was
hidden away as a static function. The changes in x86 are not based on a complete
audit. I suspect there are other possible uses there, and there are almost certainly
more potential users in other targets.

llvm-svn: 260295
2016-02-09 21:42:04 +00:00
Chad Rosier
44ba21a425 [AArch64] This check is specific to merging instructions. NFC.
llvm-svn: 260283
2016-02-09 21:20:12 +00:00
Philip Reames
0e7cbf4f20 [InstCombine][GC] Handle gc.relocations of vector type
We introduced gc.relocates of vector-of-pointer types a couple of weeks back.  Somehow, I missed updating the InstCombine rule to account for this.  If we hit this code path with a vector-of-pointers gc.relocate, we'd crash on a cast<PointerType>.

I also took the chance to do a bit of code style cleanup.

llvm-svn: 260279
2016-02-09 21:09:22 +00:00
Geoff Berry
16f8ead77d [AArch64] AArch64LoadStoreOptimizer: fix bug in pre-inc check iterator
Summary:
Fix case where a pre-inc/dec load/store would not be formed if the
add/sub that forms the inc/dec part of the operation was the first
instruction in the block being examined.

Reviewers: mcrosier, jmolloy, t.p.northover, junbuml

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16785

llvm-svn: 260275
2016-02-09 20:47:21 +00:00
Chad Rosier
c7429053bb [AArch64] Bail even earlier if the instructions modifieds the base register. NFC.
llvm-svn: 260274
2016-02-09 20:44:41 +00:00
Chad Rosier
e20f1c74ed [AArch64] Simplify. NFC.
llvm-svn: 260273
2016-02-09 20:27:45 +00:00
Chad Rosier
cb79de089b [AArch64] Add an assert to ensure we don't scale an offset that can't be scaled.
llvm-svn: 260272
2016-02-09 20:18:07 +00:00
Chad Rosier
dd552205e1 [AArch64] Add a FIXME about invalid KILL markers after the ld/st opt pass.
llvm-svn: 260264
2016-02-09 19:42:19 +00:00
Ehsan Akhgari
48aefced4b llvm-config: Add preliminary Windows support
Summary:
This patch adds Windows support for a few of the llvm-config commands,
including cflags, ldflags, libs, and system-libs.

Currently llvm-config is untested, so this patch adds tests for the
commands that it fixes as well.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16762

llvm-svn: 260263
2016-02-09 19:41:14 +00:00
Chad Rosier
8d7cb088ae [AArch64] Remove redundant calls and clang format. NFC.
llvm-svn: 260260
2016-02-09 19:33:42 +00:00
Colin LeMahieu
7d2b0f70e8 [Hexagon] Fixing relocation generation and adding tests.
llvm-svn: 260259
2016-02-09 19:18:02 +00:00
Colin LeMahieu
270ce6c950 [MC] Adding GOTREL expression variant.
llvm-svn: 260258
2016-02-09 19:17:34 +00:00
Chad Rosier
b34ba75bdc [AArch64] Hoist now common logic. NFC.
llvm-svn: 260257
2016-02-09 19:17:18 +00:00
Chad Rosier
236a622860 [AArch64] Rename variable to make it clear we're merging here, not pairing.
llvm-svn: 260256
2016-02-09 19:09:22 +00:00
Chad Rosier
4c9c20482f [AArch64] Separage the codegen logic for widening vs. pairing. NFC.
llvm-svn: 260249
2016-02-09 19:02:12 +00:00
Sanjoy Das
0a3d627330 [FunctionAttrs] Fix SCC logic around operand bundles
FunctionAttrs does an "optimistic" analysis of SCCs as a unit, which
means normally it is able to disregard calls from an SCC into itself.
However, calls and invokes with operand bundles are allowed to have
memory effects not fully described by the memory effects on the call
target, so we can't be optimistic around operand-bundled calls from an
SCC into itself.

llvm-svn: 260244
2016-02-09 18:40:40 +00:00
Chad Rosier
5c27cebb99 [AArch64] Cleanup to simplify logic when widening vs. pairing loads/stores. NFC.
The logic to pair instructions and merge narrow instructions has become cloogy
and error prone.  This patch beings to unravel these two similar, but distinct
optimizations.

llvm-svn: 260242
2016-02-09 18:10:20 +00:00
Sanjay Patel
9ad4cf304b [x86] make getOneTrueElt() a helper function ; NFC
As mentioned in http://reviews.llvm.org/D16828 , the related masked load transform
will need this logic, so I'm moving it out to make that patch smaller.

llvm-svn: 260240
2016-02-09 17:39:58 +00:00
Chad Rosier
04b8aec790 [AArch64] Rename variable to improve readability. NFC.
llvm-svn: 260228
2016-02-09 15:59:57 +00:00
Chad Rosier
271160c32d [AArch64] Remove stale comment.
llvm-svn: 260226
2016-02-09 15:51:33 +00:00
Simon Pilgrim
9569b015d4 [X86][AVX2] Fix SIGN_EXTEND vector handling on AVX2 targets.
On AVX2 target we are poorly legalizing SIGN_EXTEND ops for which the input's legalized type doesn't have the same number of elements as the destination, resulting in an ANY_EXTEND followed by a SIGN_EXTEND_INREG.

This patch uses the existing SIGN_EXTEND -> SIGN_EXTEND_VECTOR_INREG combine to extend the input to the size of the result and using SIGN_EXTEND_VECTOR_INREG instead.

Differential Revision: http://reviews.llvm.org/D16994

llvm-svn: 260210
2016-02-09 08:19:19 +00:00
Teresa Johnson
6145969e3a Refactor PGO function naming and MD5 hashing support out of ProfileData
Summary:
Move the function renaming logic into the Function class, and the
MD5Hash routine into the MD5 header.

This will enable these routines to be shared with ThinLTO, which
will be changed to store the MD5 hash instead of full function name
in the combined index for significant size reductions. And using the same
function naming for locals in the function index facilitates future
integration with indirect call value profiles.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17006

llvm-svn: 260197
2016-02-09 05:12:44 +00:00
Sanjoy Das
506f4f8e68 [GMR/OperandBundles] Teach getModRefBehavior about operand bundles
In general, memory restrictions on a called function (e.g. readnone)
cannot be transferred to a CallSite that has operand bundles.  It is
possible to make this inference smarter, but lets fix the behavior to be
correct first.

llvm-svn: 260193
2016-02-09 02:31:47 +00:00
Richard Smith
b4e9da2037 Remove TrailingObjects::operator delete. It's still suffering from
compiler-specific issues. Instead, repeat an 'operator delete' definition in
each derived class that is actually deleted, and give up on the static type
safety of an error when sized delete is accidentally used on a type derived
from TrailingObjects.

llvm-svn: 260190
2016-02-09 02:09:16 +00:00
Sanjoy Das
ca2c8b410a Add an "addUsedAAAnalyses" helper function
Summary:
Passes that call `getAnalysisIfAvailable<T>` also need to call
`addUsedIfAvailable<T>` in `getAnalysisUsage` to indicate to the
legacy pass manager that it uses `T`.  This contract was being
violated by passes that used `createLegacyPMAAResults`.  This change
fixes this by exposing a helper in AliasAnalysis.h,
`addUsedAAAnalyses`, that is complementary to createLegacyPMAAResults
and does the right thing when called from `getAnalysisUsage`.

Reviewers: chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17010

llvm-svn: 260183
2016-02-09 01:21:57 +00:00
Sanjoy Das
5bf7895a5f Remove SCEVAAWrapperPass from createLegacyPMAAResults; NFC
Summary:
createLegacyPMAAResults is only called by CGSCC and Module passes, so
the call to getAnalysisIfAvailable<SCEVAAWrapperPass>() never
succeeds (SCEVAAWrapperPass is a function pass).

Reviewers: chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17009

llvm-svn: 260182
2016-02-09 01:21:50 +00:00
Richard Smith
2b282a4b56 Re-commit r259942 (reverted in r260053) with a different workaround for the MSVC bug.
This fixes undefined behavior in C++14 due to the size of the object being
deleted being different from sizeof(dynamic type) when it is allocated with
trailing objects.

MSVC seems to have several bugs around using-declarations changing the access
of a member inherited from a base class, so use forwarding functions instead of
using-declarations to make TrailingObjects::operator delete accessible where
desired.

llvm-svn: 260180
2016-02-09 01:03:42 +00:00
Wei Mi
a9851977ba This patch is to fix PR26529 caused by r259736.
IndVarSimplify assumes scAddRecExpr to be expanded in literal form instead of
canonical form by calling disableCanonicalMode after it creates SCEVExpander.
When CanonicalMode is disabled, SCEVExpander::expand should always return PHI
node for scAddRecExpr. r259736 broke the assumption.

The fix is to let SCEVExpander::expand skip the reuse Value logic if
CanonicalMode is false.

In addition, Besides IndVarSimplify, LSR pass also calls disableCanonicalMode
before doing rewrite. We can remove the original check of LSRMode in reuse
Value logic and use CanonicalMode instead.

llvm-svn: 260174
2016-02-09 00:07:08 +00:00
Rong Xu
6836bd6879 [PGO] Revert r260146 as it breaks Darwin platforms.
r260146 | xur | 2016-02-08 13:07:46 -0800 (Mon, 08 Feb 2016) | 13 lines
[PGO] Differentiate Clang instrumentation and IR level instrumentation profiles

llvm-svn: 260170
2016-02-08 23:11:16 +00:00
Michael Zolotukhin
31609a52c9 Factor out UnrollAnalyzer to Analysis, and add unit tests for it.
Summary:
Unrolling Analyzer is already pretty complicated, and it becomes harder and harder to exercise it with usual IR tests, as with them we can only check the final decision: whether the loop is unrolled or not. This change factors this framework out from LoopUnrollPass to analyses, which allows to use unit tests.
The change itself is supposed to be NFC, except adding a couple of tests.

I plan to add more tests as I add new functionality and find/fix bugs.

Reviewers: chandlerc, hfinkel, sanjoy

Subscribers: zzheng, sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D16623

llvm-svn: 260169
2016-02-08 23:03:59 +00:00
Simon Pilgrim
4d4989655e [X86][SSE1] Add MOVLHPS/MOVHLPS lowering and memory folding support
As discussed on PR26491, this patch adds support for lowering v4f32 shuffles to the MOVLHPS/MOVHLPS instructions. It also adds support for memory folding with their MOVLPS/MOVHPS load equivalents.

This first patch only really helps SSE1 targets as SSE2+ targets will widen the shuffle mask and use v2f64 equivalents (although they still combine to MOVLHPS/MOVHLPS for v2f64 splats). This will have to be addressed in a future patch, most likely when we add support for binary target shuffle combines.

Differential Revision: http://reviews.llvm.org/D16956

llvm-svn: 260168
2016-02-08 23:03:46 +00:00
Andrew Kaylor
8fbb7931a3 [regalloc][WinEH] Do not mark intervals as not spillable if they contain a regmask
Differential Revision: http://reviews.llvm.org/D16831

llvm-svn: 260164
2016-02-08 22:52:51 +00:00
Justin Bogner
072ef25de8 llvm-cov: Fix reading gcov data that does not have function names
In order for recent gcov versions to read the coverage data, you have
to use UseCfgChecksum=true and FunctionNamesInData=false options for
coverage profiling pass. This is because gcov is expecting the
function section in .gcda to be exactly 3 words in size, containing
ident and two checksums.

While llvm-cov is compatible with UseCfgChecksum=true, it always
expects a function name in .gcda function sections (it's not
compatible with FunctionNamesInData=false). Thus it's currently
impossible to generate one set of coverage files that works with both
gcov and llvm-cov.

This change fixes the reading of coverage information to only read the
function name if it's present.

Patch by Arseny Kapoulkine. Thanks!

llvm-svn: 260162
2016-02-08 22:49:40 +00:00
Dan Gohman
32a15ba966 [WebAssembly] Update the br_if instructions' operand orders to match the spec.
llvm-svn: 260152
2016-02-08 21:50:13 +00:00
Sanjay Patel
704c6546a9 rangify; NFC
llvm-svn: 260151
2016-02-08 21:32:43 +00:00
Rong Xu
5b6f09e7f2 [PGO] Differentiate Clang instrumentation and IR level instrumentation profiles
This patch uses one bit in profile version to differentiate Clang
instrumentation and IR level instrumentation profiles.

PGOInstrumenation generates a COMDAT variable __llvm_profile_raw_version so
that the compiler runtime can set the right profile kind.
PGOInstrumenation now checks this bit to make sure it's an IR level
instrumentation profile.

Differential Revision: http://reviews.llvm.org/D15540

llvm-svn: 260146
2016-02-08 21:07:46 +00:00
Sanjay Patel
69b9326059 [x86] convert masked store of one element to scalar store
Another opportunity to reduce masked stores: in D16691, we decided not to attempt the 'one mask element is set'
transform in InstCombine, but this should be a win for any AVX machine.

Code comments note that this transform could be extended for other targets / cases.

Differential Revision: http://reviews.llvm.org/D16828

llvm-svn: 260145
2016-02-08 21:05:08 +00:00
Tom Stellard
bb35f34026 AMDGPU/SI: Implement a work-around for smrd corrupting vccz bit
Summary:
We will hit this once we have enabled uniform branches.  The
smrd-vccz-bug.ll test will be added with the uniform branch commit.

Reviewers: mareko, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16725

llvm-svn: 260137
2016-02-08 19:49:20 +00:00
Hans Wennborg
36d0cb3fd9 [X86] Don't zero/sign-extend i1, i8, or i16 return values to 32 bits (PR22532)
This matches GCC and MSVC's behaviour, and saves on code size.

We were already not extending i1 return values on x86_64 after r127766. This
takes that patch further by applying it to x86 target as well, and also for i8
and i16.

The ABI docs have been unclear about the required behaviour here. The new i386
psABI [1] clearly states (Table 2.4, page 14) that i1, i8, and i16 return
vales do not need to be extended beyond 8 bits. The x86_64 ABI doc is being
updated to say the same [2].

Differential Revision: http://reviews.llvm.org/D16907

 [1]. https://01.org/sites/default/files/file_attach/intel386-psabi-1.0.pdf
 [2]. https://groups.google.com/d/msg/x86-64-abi/E8O33onbnGQ/_RFWw_ixDQAJ

llvm-svn: 260133
2016-02-08 19:34:30 +00:00
Tim Northover
1dabed8e29 AArch64: match correct order in subtraction pattern.
The accumulator in multiply-and-subtract instructions is actually subtracted
*from* so these patterns were computing the wrong value.

llvm-svn: 260131
2016-02-08 19:33:18 +00:00
Sanjay Patel
98666d19ec fix typos; NFC
llvm-svn: 260130
2016-02-08 19:27:33 +00:00
Matt Arsenault
eed0ad4e3e AMDGPU: Remove bfi and bfm intrinsics
Nothing is using them.

llvm-svn: 260123
2016-02-08 19:06:01 +00:00
Teresa Johnson
fc270dff80 [ThinLTO] Remove imported available externally defs from comdats.
Summary:
Available externally definitions are considered declarations for the
linker and eventually dropped. As such they are not allowed to be
in comdats. Remove any such imported functions from comdats.

Reviewers: rafael

Subscribers: davidxl, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D16120

llvm-svn: 260122
2016-02-08 18:47:20 +00:00
Xinliang David Li
a698273397 [PGO] Enable compression in pgo instrumentation
This reduces sizes of instrumented object files, final binaries,
process images, and raw profile data.

The format of the indexed profile data remain the same.

Differential Revision: http://reviews.llvm.org/D16388 
 

llvm-svn: 260117
2016-02-08 18:13:49 +00:00
Silviu Baranga
6e6031d4bf [SCEV][LAA] Re-commit r260085 and r260086, this time with a fix for the memory
sanitizer issue. The PredicatedScalarEvolution's copy constructor
wasn't copying the Generation value, and was leaving it un-initialized.

Original commit message:

[SCEV][LAA] Add no wrap SCEV predicates and use use them to improve strided pointer detection

Summary:
This change adds no wrap SCEV predicates with:
  - support for runtime checking
  - support for expression rewriting:
      (sext ({x,+,y}) -> {sext(x),+,sext(y)}
      (zext ({x,+,y}) -> {zext(x),+,sext(y)}

Note that we are sign extending the increment of the SCEV, even for
the zext case. This is needed to cover the fairly common case where y would
be a (small) negative integer. In order to do this, this change adds two new
flags: nusw and nssw that are applicable to AddRecExprs and permit the
transformations above.

We also change isStridedPtr in LAA to be able to make use of
these predicates. With this feature we should now always be able to
work around overflow issues in the dependence analysis.

Reviewers: mzolotukhin, sanjoy, anemet

Subscribers: mzolotukhin, sanjoy, llvm-commits, rengolin, jmolloy, hfinkel

Differential Revision: http://reviews.llvm.org/D15412

llvm-svn: 260112
2016-02-08 17:02:45 +00:00
Haicheng Wu
d8d15dbfc7 [JumpThreading] Change a return of ComputeValueKnownInPredecessors()
Change a return statement of ComputeValueKnownInPredecessors() to be the same as
the rest return statements of the function. Otherwise, it might return true with
an empty Result when the current basic block has no predecessors and trigger the
first assert of JumpThreading::ProcessThreadableEdges().

llvm-svn: 260110
2016-02-08 17:00:39 +00:00
Matt Arsenault
34d57039a9 SelectionDAG: Lower some range metadata to AssertZext
If a range has a lower bound of 0, add an AssertZext from the
nearest floor power of two.

This allows operations with some workitem intrinsics with known
maximum ranges to use fast 24-bit multiplies.

llvm-svn: 260109
2016-02-08 16:28:19 +00:00
Michael Zuckerman
c705af63bb [AVX512][PROLQ][PROLD] Change imm8 to int
Differential Revision: http://reviews.llvm.org/D16983

llvm-svn: 260101
2016-02-08 15:13:32 +00:00
Igor Breger
7167612f73 [SLP] Fix placement of debug statement (NFC)
By Ayal Zaks (ayal.zaks@intel.com)

Differential Revision: http://reviews.llvm.org/D16976

llvm-svn: 260094
2016-02-08 14:11:39 +00:00
Silviu Baranga
bb2840e653 Revert r260086 and r260085. They have broken the memory
sanitizer bots.

llvm-svn: 260087
2016-02-08 11:56:15 +00:00
Silviu Baranga
4eaa779be8 [LoopVersioning] Don't assert when there are no memchecks
We shouldn't assert when there are no memchecks, since we
can have SCEV checks. There is already an assert covering
the case where there are no SCEV checks or memchecks.

This also changes the LAA pointer wrapping versioning test
to use the loop versioning pass (this was how I managed to
trigger the assert in the loop versioning pass).

llvm-svn: 260086
2016-02-08 11:15:29 +00:00
Silviu Baranga
f0b51949f8 [SCEV][LAA] Add no wrap SCEV predicates and use use them to improve strided pointer detection
Summary:
This change adds no wrap SCEV predicates with:
  - support for runtime checking
  - support for expression rewriting:
      (sext ({x,+,y}) -> {sext(x),+,sext(y)}
      (zext ({x,+,y}) -> {zext(x),+,sext(y)}

Note that we are sign extending the increment of the SCEV, even for
the zext case. This is needed to cover the fairly common case where y would
be a (small) negative integer. In order to do this, this change adds two new
flags: nusw and nssw that are applicable to AddRecExprs and permit the
transformations above.

We also change isStridedPtr in LAA to be able to make use of
these predicates. With this feature we should now always be able to
work around overflow issues in the dependence analysis.

Reviewers: mzolotukhin, sanjoy, anemet

Subscribers: mzolotukhin, sanjoy, llvm-commits, rengolin, jmolloy, hfinkel

Differential Revision: http://reviews.llvm.org/D15412

llvm-svn: 260085
2016-02-08 10:45:50 +00:00
Maxim Ostapenko
fce986a506 [asan] Introduce new hidden -asan-use-private-alias option.
As discussed in https://github.com/google/sanitizers/issues/398, with current
implementation of poisoning globals we can have some CHECK failures or false
positives in case of mixing instrumented and non-instrumented code due to ASan
poisons innocent globals from non-sanitized binary/library. We can use private
aliases to avoid such errors. In addition, to preserve ODR violation detection,
we introduce new __odr_asan_gen_XXX symbol for each instrumented global that
indicates if this global was already registered. To detect ODR violation in
runtime, we should only check the value of indicator and report an error if it
isn't equal to zero.

Differential Revision: http://reviews.llvm.org/D15642

llvm-svn: 260075
2016-02-08 08:30:57 +00:00
Dan Gohman
33dc7c1040 [WebAssembly] Add another optimization idea to README.txt.
llvm-svn: 260070
2016-02-08 03:42:36 +00:00
Craig Topper
bc3298f1ee [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461.
llvm-svn: 260069
2016-02-08 01:23:15 +00:00
Craig Topper
c6e9b3c725 [Support] Use hexdigit. NFC
llvm-svn: 260068
2016-02-08 01:03:01 +00:00
Simon Pilgrim
9ecb59bace [X86][SSE] Resolve target shuffle inputs to sentinels to permit more combines
The combineX86ShufflesRecursively only supports unary shuffles, but was missing the opportunity to combine binary shuffles with a zero / undef second input.

This patch resolves target shuffle inputs, converting the shuffle mask elements to SM_SentinelUndef/SM_SentinelZero where possible. It then resolves the updated mask to check if we have created a faux unary shuffle.

Additionally, we now attempt to recursively call combineX86ShufflesRecursively for all input operands (we used to just recurse for unary integer shuffles and unary unpacks) - it safely returns early if its not a target shuffle.

Differential Revision: http://reviews.llvm.org/D16683

llvm-svn: 260063
2016-02-07 22:51:06 +00:00
Nico Weber
54e14a897a Revert 259942, r259943, r259948.
The Windows bots have been failing for the last two days, with:

FAILED: C:\PROGRA~2\MICROS~1.0\VC\bin\amd64\cl.exe -c LLVMContextImpl.cpp
D:\buildslave\clang-x64-ninja-win7\llvm\lib\IR\LLVMContextImpl.cpp(137) :
    error C2248: 'llvm::TrailingObjects<llvm::AttributeSetImpl,
                                        llvm::IndexAttrPair>::operator delete' :
        cannot access private member declared in class 'llvm::AttributeSetImpl'
    TrailingObjects.h(298) : see declaration of
        'llvm::TrailingObjects<llvm::AttributeSetImpl,
                               llvm::IndexAttrPair>::operator delete'
    AttributeImpl.h(213) : see declaration of 'llvm::AttributeSetImpl'

llvm-svn: 260053
2016-02-07 20:09:18 +00:00
Simon Pilgrim
8d73f8b49c [X86][SSE] Added support for MOVHPD/MOVLPD + MOVHPS/MOVLPS shuffle decoding.
llvm-svn: 260034
2016-02-07 15:39:22 +00:00
Asaf Badouh
5bbbfafa66 [X86][AVX512] add intrinsics of Scalar FP to integer conversion with rounding mode
Differential Revision: http://reviews.llvm.org/D16629

llvm-svn: 260033
2016-02-07 14:59:13 +00:00
Simon Pilgrim
bab30569fb [X86][SSE] Pulled out repeated target shuffle decodes into helper functions. NFCI.
Pulled out the code used by PSHUFB/VPERMV/VPERMV3 shuffle mask decoding into common helper functions.

The helper functions handle masks coming from BROADCAST/BUILD_VECTOR and ConstantPool nodes respectively.

llvm-svn: 260032
2016-02-07 14:33:03 +00:00
Igor Breger
60ac21f165 AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation.
Differential Revision: http://reviews.llvm.org/D16813

llvm-svn: 260024
2016-02-07 08:30:50 +00:00
Daniel Berlin
75096416d0 Don't use module context here. It's unnecessary and makes it harder to write unittests
llvm-svn: 260015
2016-02-07 02:03:39 +00:00
Daniel Berlin
005950e536 Compute live-in for MemorySSA
llvm-svn: 260014
2016-02-07 01:52:19 +00:00
Daniel Berlin
3546e6c894 Only insert into definingblocks once per block
llvm-svn: 260013
2016-02-07 01:52:15 +00:00
Simon Pilgrim
b7e95cd192 [X86][AVX512] Added support for VPMOVZX shuffle decoding.
llvm-svn: 260007
2016-02-06 19:51:21 +00:00
Simon Pilgrim
a80ad70644 [X86][SSE] Moved shuffle decode CASE macros earlier. NFC.
To allow the helper functions to make use of them.

llvm-svn: 259997
2016-02-06 17:02:15 +00:00
Simon Pilgrim
520933a81a [X86][SSE] Refactored PMOVZX shuffle decoding to use scalar input types
First step towards being able to decode AVX512 PMOVZX instructions without a massive bloat in the shuffle decode switch statement.

This should also make it easier to decode X86ISD::VZEXT target shuffles in the future.

llvm-svn: 259995
2016-02-06 16:33:42 +00:00
Teresa Johnson
39cde37cb8 [ThinLTO] Include linkage type in function summary
Summary:
Adds the linkage type to both the per-module and combined function
summaries, which subsumes the current islocal bit. This will eventually
be used to optimized linkage types based on global summary-based
analysis.

Reviewers: joker.eph

Subscribers: joker.eph, davidxl, llvm-commits

Differential Revision: http://reviews.llvm.org/D16943

llvm-svn: 259993
2016-02-06 16:07:35 +00:00
Simon Pilgrim
f1a97ef96e [X86][SSE] Don't replace an existing 32-bit load with its duplicate
If we are already loading a single 32-bit float/integer then just reuse it.

Fix for regression in D16729

llvm-svn: 259991
2016-02-06 15:37:09 +00:00
Simon Pilgrim
354f04bdd5 Comment fix
llvm-svn: 259990
2016-02-06 14:21:49 +00:00
Ashutosh Nema
d6dcbf971a New Loop Versioning LICM Pass
Summary:
When alias analysis is uncertain about the aliasing between any two accesses,
it will return MayAlias. This uncertainty from alias analysis restricts LICM
from proceeding further. In cases where alias analysis is uncertain we might
use loop versioning as an alternative.

Loop Versioning will create a version of the loop with aggressive aliasing
assumptions in addition to the original with conservative (default) aliasing
assumptions. The version of the loop making aggressive aliasing assumptions
will have all the memory accesses marked as no-alias. These two versions of
loop will be preceded by a memory runtime check. This runtime check consists
of bound checks for all unique memory accessed in loop, and it ensures the
lack of memory aliasing. The result of the runtime check determines which of
the loop versions is executed: If the runtime check detects any memory
aliasing, then the original loop is executed. Otherwise, the version with
aggressive aliasing assumptions is used.

The pass is off by default and can be enabled with command line option 
-enable-loop-versioning-licm.

Reviewers: hfinkel, anemet, chatur01, reames

Subscribers: MatzeB, grosser, joker.eph, sanjoy, javed.absar, sbaranga,
             llvm-commits

Differential Revision: http://reviews.llvm.org/D9151

llvm-svn: 259986
2016-02-06 07:47:48 +00:00
Adrian Prantl
2cb4c84463 Relax assertion in ReplaceableMetadataImpl::replaceAllUsesWith().
There is a legitimate use-case in clang where we need to replace a
temporary placeholder node with the temporary node that may be a
forward declaration.

<rdar://problem/24493203>

llvm-svn: 259973
2016-02-06 01:56:55 +00:00
Lang Hames
94e9a3a474 [Orc] Slightly improve the x86-64 resolver block machine code.
Replace leaq + movq of a pointer with a single movabsq.

llvm-svn: 259968
2016-02-06 00:55:08 +00:00
Evandro Menezes
0e4ef392d8 [AArch64] Add the scheduling model for Exynos-M1
Summary:
Add the core scheduling model for the Samsung Exynos-M1 (ARMv8-A).


Reviewers: jmolloy, rengolin, christof, MinSeongKIM, t.p.northover

Subscribers: aemerson, rengolin, MatzeB

Differential Revision: http://reviews.llvm.org/D16644

llvm-svn: 259958
2016-02-06 00:01:41 +00:00
Sanjoy Das
aadec5f33a [StatepointLower] Use None instead of Optional<int>()
llvm-svn: 259956
2016-02-05 23:40:04 +00:00
Lang Hames
ca6e6e5e93 [Orc] Fix a typo in the comments for the x86_64 resolver block.
llvm-svn: 259953
2016-02-05 23:27:48 +00:00
Richard Smith
b9bfc6ebd8 Attempt#2 to work around MSVC rejects-valid.
llvm-svn: 259948
2016-02-05 23:05:09 +00:00
Richard Smith
2127c4d2a2 More workarounds for undefined behavior exposed when compiling in C++14 with
-fsized-deallocation. Disable sized deallocation for all objects derived from
TrailingObjects, as we expect the storage allocated for these objects to be
larger than the size of their dynamic type.

llvm-svn: 259942
2016-02-05 22:32:52 +00:00
Hans Wennborg
bebc5b5d9d CallAnalyzer::analyzeCall: change the condition back to "Cost < Threshold"
In r252595, I inadvertently changed the condition to "Cost <= Threshold",
which caused a significant size regression in Chrome. This commit rectifies
that.

llvm-svn: 259915
2016-02-05 20:32:42 +00:00
Jun Bum Lim
62bd130ca7 [AArch64] Refactoring aarch64-ldst-opt. NCF.
Remove narrow load / store instructions from getMatchingPairOpcode(),
and add getMatchingWideOpcode().

llvm-svn: 259914
2016-02-05 20:02:03 +00:00
Matt Arsenault
8009cfb6b5 AMDGPU: Account for LDS alignment
The current situation isn't great, because the amount of padding
requires is determined by the inverse order of the first encountered
use. We should eventually somehow sort these to minimize wasted space.

Another problem is the alignment of kernel arguments isn't
respected. The group_segment_alignment is always emitted as
the default 16, and typed arguments with higher alignments
or an explicitly set alignment are also ignored.

llvm-svn: 259912
2016-02-05 19:47:29 +00:00
Matt Arsenault
3c264fc8c0 AMDGPU: Preserve alignments on new created globals
Also switch to internal linkage, and include the name of the function in
the name.

llvm-svn: 259911
2016-02-05 19:47:23 +00:00
Tom Stellard
350a5c65b3 AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16862

llvm-svn: 259900
2016-02-05 18:44:57 +00:00
Tom Stellard
9f8aefe66d AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructors
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16863

llvm-svn: 259897
2016-02-05 18:29:17 +00:00
Wei Mi
5f6c0d3559 Some stackslots are allocated to vregs which have no real reference.
LiveRangeEdit::eliminateDeadDef is used to remove dead define instructions
after rematerialization. To remove a VNI for a vreg from its LiveInterval,
LiveIntervals::removeVRegDefAt is used. However, after non-PHI VNIs are all
removed, PHI VNI are still left in the LiveInterval. Such unused vregs will
be kept in RegsToSpill[] at the end of InlineSpiller::reMaterializeAll and
spiller will allocate stackslot for them.

The fix is to get rid of unused reg by checking whether it has non-dbg
reference instead of whether it has non-empty interval.

llvm-svn: 259895
2016-02-05 18:14:24 +00:00
Tom Stellard
4948571e05 AMDGPU/SI: Correctly initialize SIInsertWaits pass
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16724

llvm-svn: 259894
2016-02-05 17:42:38 +00:00
Dan Gohman
f44d278023 [WebAssembly] Update the select instructions' operand orders to match the spec.
llvm-svn: 259893
2016-02-05 17:14:59 +00:00
Nemanja Ivanovic
3a405a94b2 Fix for PR 26193
This is a simple fix for a PowerPC intrinsic that was incorrectly defined
(the return type was incorrect).

llvm-svn: 259886
2016-02-05 14:50:29 +00:00
Benjamin Kramer
9b60b05c94 Move classes defined in a cpp file into an anonymous namespace.
No functionality change intended.

llvm-svn: 259883
2016-02-05 13:50:53 +00:00
Renato Golin
c3580d7a36 Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3)."
This reverts commit r259812 as it broke AArch64 self-hosting.

llvm-svn: 259881
2016-02-05 12:14:30 +00:00
Dmitry Polukhin
53b2b4d2c5 [DebugInfo] Eliminate compilation warning about used variable LSDA
The waring was:
lib/DebugInfo/DWARF/DWARFDebugFrame.cpp:643:20: warning: variable ‘LSDA’ set but not used

llvm-svn: 259877
2016-02-05 09:24:34 +00:00
Michael Zolotukhin
151d484d3e [LoopUnrolling] Try harder to avoid rebuilding LCSSA when possible.
In r255133 (reapplied r253126) we started to avoid redundant
recomputation of LCSSA after loop-unrolling. This patch moves one step
further in this direction - now we can avoid it for much wider range of
loops, as we start to look at IR and try to figure out if the
transformation actually breaks LCSSA phis or makes it necessary to
insert new ones.

Differential Revision: http://reviews.llvm.org/D16838

llvm-svn: 259869
2016-02-05 02:17:36 +00:00
David Majnemer
4bcb5f2151 [MC] Add support for encoding CodeView variable definition ranges
CodeView, like most other debug formats, represents the live range of a
variable so that debuggers might print them out.

They use a variety of records to represent how a particular variable
might be available (in a register, in a frame pointer, etc.) along with
a set of ranges where this debug information is relevant.

However, the format only allows us to use ranges which are limited to a
maximum of 0xF000 in size.  This means that we need to split our debug
information into chunks of 0xF000.

Because the layout of code is not known until *very* late, we must use a
new fragment to record the information we need until we can know
*exactly* what the range is.

llvm-svn: 259868
2016-02-05 01:55:49 +00:00
Joseph Tremoulet
8e638f7f88 [RS4GC] Pass DenseMap by reference, NFC
Summary:
Passing the rematerialized values map to insertRematerializationStores by
value looks to be a simple oversight; update it to pass by reference.


Reviewers: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16911

llvm-svn: 259867
2016-02-05 01:42:52 +00:00
Adam Nemet
f087442a31 [LoopLoadElim] Don't allow versioning when optForSize
This was requested in the review of D16300.

llvm-svn: 259861
2016-02-05 01:14:05 +00:00
Matt Arsenault
a0cac04b13 Fix printing of f16 machine operands
Only single and double FP immediates are correctly printed by
MachineInstr::print() during debug output. Half float type goes to
APFloat::convertToDouble() and hits assertion it is not a double
semantics. This diff prints half machine operands correctly.

This cannot currently be hit by any in-tree target.

Patch by Stanislav Mekhanoshin

llvm-svn: 259857
2016-02-05 00:50:18 +00:00
Xinliang David Li
fb97e919ed Function name change /NFC
llvm-svn: 259851
2016-02-04 23:59:09 +00:00
Easwaran Raman
6960cdccb8 Refactor profile summary support code. NFC.
Summary computation is not just for instrumented profiling and so I have moved
the ProfileSummary class to ProfileCommon.h (named so to allow code unrelated
to summary but common to instrumented and sampled profiling to be placed there)

Differential Revision: http://reviews.llvm.org/D16661

llvm-svn: 259846
2016-02-04 23:34:31 +00:00
Nemanja Ivanovic
b7bc445a9f Fix for PR 26356
Using the load immediate only when the immediate (whether signed or unsigned)
can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and
0 to 65535 for unsigned. This patch also ensures that we sign-extend under the
right conditions.

llvm-svn: 259840
2016-02-04 23:14:42 +00:00
Chad Rosier
379876e08f [AArch64] Bound the number of instructions we scan when searching for updates.
This only impacts the creation of pre-/post-index instructions.  The bound was
set high enough such that it did not change code generation for SPEC200X.

llvm-svn: 259828
2016-02-04 21:26:02 +00:00
Simon Pilgrim
cc76b8656c [X86][SSE] Select domain for 32/64-bit partial loads for EltsFromConsecutiveLoads
Choose between MOVD/MOVSS and MOVQ/MOVSD depending on the target vector type.

This has a lot fewer test changes than trying to add this to X86InstrInfo::setExecutionDomain.....

llvm-svn: 259816
2016-02-04 19:27:51 +00:00
Wei Mi
09f022feb9 Fix a regression for r259736.
When SCEV expansion tries to reuse an existing value, it is needed to ensure
that using the Value at the InsertPt will not break LCSSA. The fix adds a
check that InsertPt is either inside the candidate Value's parent loop, or
the candidate Value's parent loop is nullptr.

llvm-svn: 259815
2016-02-04 19:17:33 +00:00
Xinliang David Li
0afdede2aa [PGO] Add interfaces to annotate instr with VP data
Add interfaces to do value profile data IR annnotation
  and read. Needed by both FE and IR based PGO.

llvm-svn: 259813
2016-02-04 19:11:43 +00:00
Chad Rosier
b8b5852fe4 [AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3).
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.

PR24465
http://reviews.llvm.org/D12116
Many thanks to Ahmed and Michael for fixes and code review.

This is a reapplication of r246769 and r259790.  The tramp3d failure was caused
by an incorrect refactoring in the patch.  Specifically, we weren't always
properly clearing the SExtIdx flag.

llvm-svn: 259812
2016-02-04 18:59:49 +00:00
Sanjoy Das
f8c1023d70 [SCEV] Add boolean accessors for NSW, NUW and NW; NFC
llvm-svn: 259809
2016-02-04 18:21:54 +00:00
Silviu Baranga
22ab3adc5c [AArch64] Multiply extended 32-bit ints with `[U|S]MADDL'
During instruction selection, the AArch64 backend can recognise the
following pattern and generate an [U|S]MADDL instruction, i.e. a
multiply of two 32-bit operands with a 64-bit result:

(mul (sext i32), (sext i32))
However, when one of the operands is constant, the sign extension
gets folded into the constant in SelectionDAG::getNode(). This means
that the instruction selection sees this:

(mul (sext i32), i64)
...which doesn't match the pattern. Sign-extension and 64-bit
multiply instructions are generated, which are slower than one 32-bit
multiply.

Add a pattern to match this and generate the correct instruction, for
both signed and unsigned multiplies.

Patch by Chris Diamand!

llvm-svn: 259800
2016-02-04 16:47:09 +00:00
Nemanja Ivanovic
42a51db8af Enable the %s modifier in inline asm template string
This patch corresponds to review:
http://reviews.llvm.org/D16847

There are some files in glibc that use the output operand modifier even though
it was deprecated in GCC. This patch just adds support for it to prevent issues
with such files.

llvm-svn: 259798
2016-02-04 16:18:08 +00:00
Simon Pilgrim
da26d272a9 [X86][SSE] Add general 32-bit LOAD + VZEXT_MOVL support to EltsFromConsecutiveLoads
This patch adds support for consecutive (load/undef elements) 32-bit loads, followed by trailing undef/zero elements to be combined to a single MOVD load.

Differential Revision: http://reviews.llvm.org/D16729

llvm-svn: 259796
2016-02-04 16:12:56 +00:00
Chad Rosier
fcca55983b Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR."
This reverts commit r259790. tramp3d-v4 is still having problems.

llvm-svn: 259795
2016-02-04 16:01:40 +00:00
Elena Demikhovsky
86a7e2549e AVX-512: Fixed a bug in FMA instruction selection on KNL
The FMA instruction was selected from AVX2 set instead of AVX-512

Differential Revision: http://reviews.llvm.org/D16884

llvm-svn: 259792
2016-02-04 15:11:11 +00:00
Petar Jovanovic
7a49463224 [Power PC] softening long double type
This patch implements softening of long double type (ppcf128) on ppc32
architecture and enables operations for this type for soft float.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D15811

llvm-svn: 259791
2016-02-04 14:43:50 +00:00
Chad Rosier
52d5d7b161 [AArch64] Improve load/store optimizer to handle LDUR + LDR.
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.

PR24465
http://reviews.llvm.org/D12116
Many thanks to Ahmed and Michael for fixes and code review.

This is a reapplication of r246769, which was reverted in r246782 due to a
test-suite failure.  I'm unable to reproduce the issue at this time.

llvm-svn: 259790
2016-02-04 14:42:55 +00:00
Michael Zuckerman
d8de4a9888 [AVX512] add vfmadd132ss and vfmadd132sd Intrinsic
Differential Revision: http://reviews.llvm.org/D16589

llvm-svn: 259789
2016-02-04 14:41:08 +00:00
Jonas Paulsson
b2c27a1f81 [ScheduleDagInstrs] Improved comments
llvm-svn: 259783
2016-02-04 13:08:48 +00:00
Simon Pilgrim
36bd348c5b [X86] Moved SEXT -> SIGN_EXTEND_VECTOR_INREG combine into helper. NFC.
llvm-svn: 259771
2016-02-04 09:27:19 +00:00
Andrey Turetskiy
93bc15df7c [X86] Use hash table in LEA optimization pass.
Use hash table (key is a memory operand) to store found LEA instructions to reduce compile time.

Differential Revision: http://reviews.llvm.org/D16404

llvm-svn: 259770
2016-02-04 08:57:03 +00:00
Craig Topper
a26758c5e3 [Support] Use range-based for loop. NFC
llvm-svn: 259763
2016-02-04 06:51:41 +00:00
Craig Topper
befca6184f [Support] Use hexdigit instead of manually coding the same thing. NFC
llvm-svn: 259762
2016-02-04 06:51:38 +00:00
Xinliang David Li
fa6cd53219 [PGO] Profile interface cleanup
- Remove unused valuemapper parameter
  - add totalcount optional parameter

llvm-svn: 259756
2016-02-04 05:29:51 +00:00
Jingyue Wu
bb54579422 [NVPTX] Disable performance optimizations when OptLevel==None
Reviewers: jholewinski, tra, eliben

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D16874

llvm-svn: 259749
2016-02-04 04:15:36 +00:00
Wei Mi
00d0d9c981 [SCEV] Try to reuse existing value during SCEV expansion
Current SCEV expansion will expand SCEV as a sequence of operations
and doesn't utilize the value already existed. This will introduce
redundent computation which may not be cleaned up throughly by
following optimizations.

This patch introduces an ExprValueMap which is a map from SCEV to the
set of equal values with the same SCEV. When a SCEV is expanded, the
set of values is checked and reused whenever possible before generating
a sequence of operations.

The original commit triggered regressions in Polly tests. The regressions
exposed two problems which have been fixed in current version.

1. Polly will generate a new function based on the old one. To generate an
instruction for the new function, it builds SCEV for the old instruction,
applies some tranformation on the SCEV generated, then expands the transformed
SCEV and insert the expanded value into new function. Because SCEV expansion
may reuse value cached in ExprValueMap, the value in old function may be
inserted into new function, which is wrong.
   In SCEVExpander::expand, there is a logic to check the cached value to
be used should dominate the insertion point. However, for the above
case, the check always passes. That is because the insertion point is
in a new function, which is unreachable from the old function. However
for unreachable node, DominatorTreeBase::dominates thinks it will be
dominated by any other node.
   The fix is to simply add a check that the cached value to be used in
expansion should be in the same function as the insertion point instruction.

2. When the SCEV is of scConstant type, expanding it directly is cheaper than
reusing a normal value cached. Although in the cached value set in ExprValueMap,
there is a Constant type value, but it is not easy to find it out -- the cached
Value set is not sorted according to the potential cost. Existing reuse logic
in SCEVExpander::expand simply chooses the first legal element from the cached
value set.
   The fix is that when the SCEV is of scConstant type, don't try the reuse
logic. simply expand it.

Differential Revision: http://reviews.llvm.org/D12090

llvm-svn: 259736
2016-02-04 01:27:38 +00:00
Richard Smith
79c273af95 Fix undefined behavior when compiling in C++14 mode (with sized deletion
enabled): ensure that we do not invoke the sized deallocator for MemoryBuffer
subclasses that have tail-allocated data.

llvm-svn: 259735
2016-02-04 01:21:16 +00:00
Reid Kleckner
3abdd85bc4 [codeview] Don't attempt a cross-section label diff
This only comes up when we're trying to find the next .cv_loc label.

Fixes PR26467

llvm-svn: 259733
2016-02-04 00:21:42 +00:00
Kostya Serebryany
b6b4bc42cc [libFuzzer] hot fix a test
llvm-svn: 259732
2016-02-04 00:12:28 +00:00
Kostya Serebryany
036c2a2dea [libFuzzer] don't write the test unit when a leak is detected (since we don't know which unit causes the leak)
llvm-svn: 259731
2016-02-04 00:02:17 +00:00
Gerolf Hoflehner
7e4894397c [SimplifyCFG] Fix for "endless" loop after dead code removal (Alternative to
D16251)

Summary:
This is a simpler fix to the problem than the dominator approach in
http://reviews.llvm.org/D16251. It adds only values into the gather() while loop
that have been seen before.

The actual endless loop is in the constant compare gather() routine in
Utils/SimplifyCFG.cpp. The same value ret.0.off0.i is pushed back into the
queue:
%.ret.0.off0.i = or i1 %.ret.0.off0.i, %cmp10.i

Here is what happens at the IR level:

for.cond.i:                                       ; preds = %if.end6.i,
%if.end.i54
%ix.0.i = phi i32 [ 0, %if.end.i54 ], [ %inc.i55, %if.end6.i ]
%ret.0.off0.i = phi i1 [false, %if.end.i54], [%.ret.0.off0.i, %if.end6.i] <<<
%cmp2.i = icmp ult i32 %ix.0.i, %11
br i1 %cmp2.i, label %for.body.i, label %LBJ_TmpSimpleNeedExt.exit

if.end6.i:                                        ; preds = %for.body.i
%cmp10.i = icmp ugt i32 %conv.i, %add9.i
%.ret.0.off0.i = or i1 %ret.0.off0.i, %cmp10.i <<<

When if.end.i54 gets eliminated which removes the definition of ret.0.off0.i.
The result is the expression %.ret.0.off0.i = or i1 %.ret.0.off0.i, %cmp10.i
(Note the first ‘or’ operand is now %.ret.0.off0.i, and *NOT* %ret.0.off0.i).
And
now there is use of .ret.0.off0.i before a definition which triggers the
“endless” loop in gather():

while(!DFT.empty()) {

    V = DFT.pop_back_val();   // V is .ret.0.off0.i

    if (Instruction *I = dyn_cast<Instruction>(V)) {
      // If it is a || (or && depending on isEQ), process the operands.
      if (I->getOpcode() == (isEQ ? Instruction::Or : Instruction::And)) {
        DFT.push_back(I->getOperand(1));  // This is now .ret.0.off0.i also
        DFT.push_back(I->getOperand(0));

        continue; // “endless loop” for .ret.0.off0.i
      }

Reviewers: reames, ahatanak

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16839

llvm-svn: 259730
2016-02-03 23:54:25 +00:00
Vedant Kumar
6bcac9b425 [InstrProfiling] Fix a comment (NFC)
llvm-svn: 259727
2016-02-03 23:22:43 +00:00
Junmo Park
bff0483f1c Minor code cleanups. NFC.
llvm-svn: 259725
2016-02-03 23:16:39 +00:00
Sanjay Patel
b4e4710cbb rangify; NFCI
llvm-svn: 259722
2016-02-03 22:44:14 +00:00
Sanjay Patel
58b4f8e215 clean up; NFC
llvm-svn: 259720
2016-02-03 22:37:37 +00:00
Ana Pazos
6e9622f689 Fix pointers to go on the right hand side. NFC.
Summary:
Fixed pointers to go on the right hand side following coding guidelines. NFC.

Patch by Mandeep Singh Grang.

Reviewers: majnemer, arsenm, sanjoy

Differential Revision: http://reviews.llvm.org/D16866

llvm-svn: 259703
2016-02-03 21:34:39 +00:00
David Majnemer
1126f604ac [LoopStrengthReduce] Don't rewrite PHIs with incoming values from CatchSwitches
Bail out if we have a PHI on an EHPad that gets a value from a
CatchSwitchInst.  Because the CatchSwitchInst cannot be split, there is
no good place to stick any instructions.

This fixes PR26373.

llvm-svn: 259702
2016-02-03 21:30:34 +00:00
David Majnemer
e08ae5f43b [ScalarEvolutionExpander] Simplify findInsertPointAfter
No functional change is intended.  The loop could only execute, at most,
once.

llvm-svn: 259701
2016-02-03 21:30:31 +00:00
Reid Kleckner
c9aa4356bd [codeview] Remove EmitLabelDiff in favor emitAbsoluteSymbolDiff
llvm-svn: 259700
2016-02-03 21:24:42 +00:00
Reid Kleckner
4c774eec2a [codeview] Use the MCStreamer interface directly instead of AsmPrinter
This is mostly about having shorter lines and standardizing on one
interface, but it also avoids some needless indirection.

No functional change.

llvm-svn: 259697
2016-02-03 21:15:48 +00:00
Keno Fischer
3198294a73 [DWARFDebug] Fix another case of overlapping ranges
Summary:
In r257979, I added code to ensure that we wouldn't merge DebugLocEntries if
the pieces they describe overlap. Unfortunately, I failed to cover the case,
where there may have multiple active Expressions in the entry, in which case we
need to make sure that no two values overlap before we can perform the merge.

This fixed PR26148.

Reviewers: aprantl
Differential Revision: http://reviews.llvm.org/D16742

llvm-svn: 259696
2016-02-03 21:13:33 +00:00
Todd Fiala
5cc6f2aece Address NDEBUG-related linkage issues for Value::assertModuleIsMaterialized()
The IR/Value class had a linkage issue present when LLVM was built
as a library, and the LLVM library build time had different settings
for NDEBUG than the client of the LLVM library.  Clients could get
into a state where the LLVM lib expected
Value::assertModuleIsMaterialized() to be inline-defined in the header
but clients expected that method to be defined in the LLVM library.

See this llvm-commits thread for more details:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160201/329667.html

llvm-svn: 259695
2016-02-03 21:13:23 +00:00
Tim Shen
c6dc619045 [SelectionDAG] Fix CombineToPreIndexedLoadStore O(n^2) behavior
This patch consists of two parts: a performance fix in DAGCombiner.cpp
and a correctness fix in SelectionDAG.cpp.

The test case tests the bug that's uncovered by the performance fix, and
fixed by the correctness fix.

The performance fix keeps the containers required by the
hasPredecessorHelper (which is a lazy DFS) and reuse them. Since
hasPredecessorHelper is called in a loop, the overall efficiency reduced
from O(n^2) to O(n), where n is the number of SDNodes.

The correctness fix keeps iterating the neighbor list even if it's time
to early return. It will return after finishing adding all neighbors to
Worklist, so that no neighbors are discarded due to the original early
return.

llvm-svn: 259691
2016-02-03 20:58:55 +00:00
Saleem Abdulrasool
d7405cba41 ARM: support TLS for WoA
Add support for TLS access for Windows on ARM.  This generates a similar access
to MSVC for ARM.

The changes to the tablegen data is needed to support loading an external symbol
global that is not for a call.  The adjustments to the DAG to DAG transforms are
needed to preserve the 32-bit move.

llvm-svn: 259676
2016-02-03 18:21:59 +00:00
Wei Mi
1ef051b016 Revert r259662, which caused regressions on polly tests.
llvm-svn: 259675
2016-02-03 18:05:57 +00:00
Quentin Colombet
091258f7a2 [InstCombine] Revert r238452: Fold IntToPtr and PtrToInt into preceding loads.
According to git bisect, this is the root cause of a miscompile for Regex in
libLLVMSupport. I am still working on reducing a test case.
The actual bug may be elsewhere and this commit just exposed it.

Anyway, at the moment, to reproduce, follow these steps:
1. Build clang and libLTO in release mode.
2. Create a new build directory <stage2> and cd into it.
3. Use clang and libLTO from #1 to build llvm-extract in Release mode + asserts
   using -O2 -flto
4. Run llvm-extract  -ralias '.*bar' -S test/Other/extract-alias.ll

Result:
program doesn't contain global named '.*bar'!

Expected result:
@a0a0bar = alias void ()* @bar
@a0bar = alias void ()* @bar

declare void @bar()

Note: In step #3, if you don't use lto or asserts, the miscompile disappears.
llvm-svn: 259674
2016-02-03 18:04:13 +00:00
Jonas Paulsson
99afcac2ad [ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.
Recommited, after some fixing with test cases.

Updated test cases:
test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
test/CodeGen/AArch64/tailcall_misched_graph.ll

Temporarily disabled test cases:
test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
test/CodeGen/PowerPC/ppc64-fastcc.ll (partially updated)
test/CodeGen/PowerPC/vsx-fma-m.ll
test/CodeGen/PowerPC/vsx-fma-sp.ll

http://reviews.llvm.org/D8705
Reviewers: Hal Finkel, Andy Trick.

llvm-svn: 259673
2016-02-03 17:52:29 +00:00
Wei Mi
4fc93e70ac [SCEV] Try to reuse existing value during SCEV expansion
Current SCEV expansion will expand SCEV as a sequence of operations
and doesn't utilize the value already existed. This will introduce
redundent computation which may not be cleaned up throughly by
following optimizations.

This patch introduces an ExprValueMap which is a map from SCEV to the
set of equal values with the same SCEV. When a SCEV is expanded, the
set of values is checked and reused whenever possible before generating
a sequence of operations.

Differential Revision: http://reviews.llvm.org/D12090

llvm-svn: 259662
2016-02-03 17:05:12 +00:00
Renato Golin
662cbc93f4 [ARM] Move GNUEABI divmod to __aeabi_divmod*
The GNU toolchain emits __aeabi_divmod for soft-divide on ARM cores
which happens to be a lot faster than __divsi3/__modsi3 when the core
has hardware divide instructions. Do the same here.

Fixes PR26450.

llvm-svn: 259657
2016-02-03 16:10:54 +00:00
Jun Bum Lim
9ed60626e8 [MachineCopyPropagation] Fix comment. NFC
Reviewers: MatzeB, qcolombet, jmolloy, mcrosier

Subscribers: llvm-commits, mcrosier

Differential Revision: http://reviews.llvm.org/D16806

llvm-svn: 259656
2016-02-03 15:56:27 +00:00
Daniel Sanders
36e4bed845 [mips] Remove redundant inclusions of MipsAnalyzeImmediate.h
llvm-svn: 259655
2016-02-03 15:54:12 +00:00
James Molloy
08b726e6d4 [DemandedBits] Revert r249687 due to PR26071
This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.

From the writeup in PR26071:

What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.

This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.

The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.

llvm-svn: 259649
2016-02-03 15:05:06 +00:00
Nemanja Ivanovic
3fb0b09e1f Fix for PR 26381
Simple fix - Constant values were not being sign extended in FastIsel.

llvm-svn: 259645
2016-02-03 12:53:38 +00:00
Simon Atanasyan
37a4fee5f0 [mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sections
MIPS ABI states that .sbss and .sdata sections must have SHF_MIPS_GPREL
flag. See Figure 4–7 on page 69 in the following document:
ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf.

Differential Revision: http://reviews.llvm.org/D15740

llvm-svn: 259641
2016-02-03 11:50:22 +00:00
Simon Pilgrim
8aa2db1f2d [X86][AVX] Add support for 64-bit VZEXT_LOAD of 256/512-bit vectors to EltsFromConsecutiveLoads
Follow up to D16217 and D16729

This change uncovered an odd pattern where VZEXT_LOAD v4i64 was being lowered to a load of the lower v2i64 (so the 2nd i64 destination element wasn't being zeroed), I can't find any use/reason for this and have removed the pattern and replaced it so only the 1st i64 element is loaded and the upper bits all zeroed. This matches the description for X86ISD::VZEXT_LOAD

Differential Revision: http://reviews.llvm.org/D16768

llvm-svn: 259635
2016-02-03 09:41:59 +00:00
Xinliang David Li
3e2749fc6c Fix a typo in comment
llvm-svn: 259631
2016-02-03 06:24:11 +00:00
Xinliang David Li
01e1f68547 Fix uninitiazed variable use problem
llvm-svn: 259630
2016-02-03 06:23:16 +00:00
Xinliang David Li
f9d9bfe484 [PGO] Profile summary reader/writer support
With this patch, the profile summary data will be available in indexed
profile data file so that profiler reader/compiler optimizer can start
to make use of.

Differential Revision: http://reviews.llvm.org/D16258

llvm-svn: 259626
2016-02-03 04:08:18 +00:00
Peter Collingbourne
7f6faddfa9 LowerBitSets: Don't bother to do any work if the llvm.bitset.test intrinsic is unused.
llvm-svn: 259625
2016-02-03 03:48:46 +00:00
Peter Collingbourne
6410c66883 Add #include "llvm/Support/raw_ostream.h" to fix Windows build.
llvm-svn: 259623
2016-02-03 03:16:37 +00:00
Peter Collingbourne
7a6e886fda Transforms: Move GlobalOpt's Evaluator to Utils where it can be reused.
llvm-svn: 259621
2016-02-03 02:51:00 +00:00
Kyle Butt
77f7a2b7a8 Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates.
The purpose of PPCVSXFMAMutate is to elide copies by changing FMA forms
on PPC.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg7
    ;v6 = v6 + v5 * v7

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg7, %vreg96
    ;v5 = v5 * v7 + v96

This was broken in the case where the target register was also used as a
multiplicand. Fix this case by checking for it and replacing both uses
with the copied register.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg6
    ;v6 = v6 + v5 * v6

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg96, %vreg96
    ;v5 = v5 * v96 + v96

llvm-svn: 259617
2016-02-03 01:41:09 +00:00
Yunzhong Gao
d9694f67fb Revert r259576: Disable the vzeroupper insertion pass on PS4.
Will re-implement based on review feedback.

llvm-svn: 259615
2016-02-03 01:25:12 +00:00
Marcello Maggioni
f5b5f33264 RegCoalescer: Making sure re-materialization defines all subranges
The register coalescer can rematerialize constants that define
more of a register than the copy it is going to replace was going
to do.
This is valid in the case the register was undef before the
copy happened.
This patch makes sure that all the subranges defined by the new
rematerialization instructions have at least a dead def.

Review: http://reviews.llvm.org/D16693
llvm-svn: 259614
2016-02-03 00:22:32 +00:00
Adam Nemet
21662c36f7 [LoopVersioning] Expose loop versioning as a pass too
Summary:
LoopVersioning is a transform utility that transform passes can use to
run-time disambiguate may-aliasing accesses. I'd like to also expose as
pass to allow it to be unit-tested.

I am planning to add support for non-aliasing annotation in
LoopVersioning and I'd like to be able to write tests directly using
this pass.

(After that feature is done, the pass could also be used to look for
optimization opportunities that are hidden behind incomplete alias
information at compile time.)

The pass drives LoopVersioning in its default way which is to fully
disambiguate may-aliasing accesses no matter how many checks are
required.

Reviewers: hfinkel, ashutosh.nema, sbaranga

Subscribers: zzheng, mssimpso, llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D16612

llvm-svn: 259610
2016-02-03 00:06:10 +00:00
George Burgess IV
505e3f362b Attempt #2 to unbreak r259595.
llvm-svn: 259602
2016-02-02 23:26:01 +00:00
David Majnemer
8b6b7aeece [codeview] Improve readability of codeview assembly output
Strictly speaking, this is not an improvement in functionality per se
but a usability improvement to those debugging codeview.

llvm-svn: 259601
2016-02-02 23:18:23 +00:00
Kostya Serebryany
aa6ade3737 [libFuzzer] don't create too many trace-based mutations as it may be too slow
llvm-svn: 259600
2016-02-02 23:17:45 +00:00
George Burgess IV
5301a2e16c Attempt to fix builds broken by r259595.
llvm-svn: 259599
2016-02-02 23:15:26 +00:00
George Burgess IV
1a7027b262 This patch adds MemorySSA to LLVM.
Please see include/llvm/Transforms/Utils/MemorySSA.h for a description
of MemorySSA, and what it does.

Differential Revision: http://reviews.llvm.org/D7864

llvm-svn: 259595
2016-02-02 22:46:49 +00:00
Philip Reames
86e6d0ce50 [LVI] Fix debug output
Due to staleness in a patch I committed yesterday, the debug output was reporting overdefined cases as being undefined.  Confusing to say the least.  The mistake appears to have only effected the debug output thankfully.

llvm-svn: 259594
2016-02-02 22:43:08 +00:00
Anna Zaks
f3c75f69fb [asan] Add iOS support to AddressSanitzier
Differential Revision: http://reviews.llvm.org/D15625

llvm-svn: 259586
2016-02-02 22:05:07 +00:00
Philip Reames
c3aef27beb [LVI] Code motion only [NFC]
I introduced a declaration in 259583 to keep the diff readable.  This change just moves the definition up to remove the declaration again.

llvm-svn: 259585
2016-02-02 22:03:19 +00:00
Philip Reames
1b510d2db4 [LVI] Refactor to use newly introduced intersect utility
This patch uses the newly introduced 'intersect' utility (from 259461: [LVI] Introduce an intersect operation on lattice values) to simplify existing code in LVI.

While not introducing any new concepts, this change is probably not NFC.  The common 'intersect' function is more powerful that the ad-hoc implementations we'd had in a couple of places.  Given that, we may see optimizations triggering a bit more often.

llvm-svn: 259583
2016-02-02 21:57:37 +00:00
Yunzhong Gao
3180165799 Disable the vzeroupper insertion pass on PS4.
See comments in test/CodeGen/X86/avx-vzeroupper.ll for more explanation.

Original patch by: Sean Silva

llvm-svn: 259576
2016-02-02 21:39:23 +00:00
Matt Arsenault
b7a70ed17f AMDGPU: Do not promote allocas with non-inbounds GEPs
If we can't assume the pointer value isn't within the bounds
of the object, it seems risky to try to replace the pointer
calculations.

llvm-svn: 259573
2016-02-02 21:16:12 +00:00
Matt Arsenault
1eab1a7019 AMDGPU: Handle promoting memmove
Also add missing tests for the others.

llvm-svn: 259558
2016-02-02 20:28:10 +00:00