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7779 Commits

Author SHA1 Message Date
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Chris Lattner
04a35e9a8c Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this... 
llvm-svn: 45476
 2008-01-01 01:05:34 +00:00
Chris Lattner
1285ec2ae7 Fix a problem where lib/Target/TargetInstrInfo.h would include and use 
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
 2008-01-01 01:03:04 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
 2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
 2007-12-30 23:10:15 +00:00
Chris Lattner
7504adbd72 More cleanups for MachineOperand: 
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
 2007-12-30 21:56:09 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 
llvm-svn: 45453
 2007-12-30 20:49:49 +00:00
Bill Wendling
4c22e299ef If we have a load of a global address that's not modified during the 
function, then go ahead and hoist it out of the loop. This is the result:

$ cat a.c
volatile int G;

int A(int N) {
  for (; N > 0; --N)
    G++;
}
$ llc -o - -relocation-model=pic
_A:
...
LBB1_2: # bb
        movl    L_G$non_lazy_ptr-"L1$pb"(%eax), %esi
        incl    (%esi)
        incl    %edx
        cmpl    %ecx, %edx
        jne     LBB1_2  # bb
...
$ llc -o - -relocation-model=pic -machine-licm
_A:
...
        movl    L_G$non_lazy_ptr-"L1$pb"(%eax), %eax
LBB1_2: # bb
        incl    (%eax)
        incl    %edx
        cmpl    %ecx, %edx
        jne     LBB1_2  # bb
...

I'm limiting this to the MOV32rm x86 instruction for now.

llvm-svn: 45444
 2007-12-30 03:18:58 +00:00
Chris Lattner
fac8748ca7 use simplified operand addition methods. 
llvm-svn: 45437
 2007-12-30 01:01:54 +00:00
Chris Lattner
4d0361fbf2 Shrinkify the machine operand creation method names. 
llvm-svn: 45433
 2007-12-30 00:45:46 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Chris Lattner
8193d4af33 remove attribution from lib Makefiles. 
llvm-svn: 45415
 2007-12-29 20:09:26 +00:00
Chris Lattner
d82b30a996 this is done. 
llvm-svn: 45408
 2007-12-29 19:38:02 +00:00
Chris Lattner
d55e743cfe One readme entry is done, one is really easy (Evan, want to investigate 
eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.

llvm-svn: 45407
 2007-12-29 19:31:47 +00:00
Chris Lattner
cd147e5596 Fold comparisons against a constant nan, and optimize ORD/UNORD 
comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

llvm-svn: 45405
 2007-12-29 08:37:08 +00:00
Chris Lattner
b36a4a7a84 this xform is implemented. 
llvm-svn: 45404
 2007-12-29 08:19:39 +00:00
Chris Lattner
f8e408b7b1 Codegen: 
as:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstps	(%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

instead of:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstpl	(%esi)
	cvtsd2ss	(%esi), %xmm0
	movss	%xmm0, (%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

llvm-svn: 45401
 2007-12-29 06:57:38 +00:00
Chris Lattner
e3515220d2 avoid going through a stack slot to convert from fpstack to xmm reg 
if we are just going to store it back anyway.  This improves things 
like:
double foo();
void bar(double *P) { *P = foo(); }

llvm-svn: 45399
 2007-12-29 06:41:28 +00:00
Chris Lattner
ac72965e02 add a note 
llvm-svn: 45397
 2007-12-29 05:51:58 +00:00
Chris Lattner
78c7878ca4 expand note. 
llvm-svn: 45393
 2007-12-29 01:05:01 +00:00
Chris Lattner
b8e060f7a6 add a note. 
llvm-svn: 45388
 2007-12-28 22:30:05 +00:00
Chris Lattner
2248a22bda add a note. 
llvm-svn: 45387
 2007-12-28 21:50:40 +00:00
Chris Lattner
e53df84267 add a note 
llvm-svn: 45377
 2007-12-28 04:42:05 +00:00
Chris Lattner
232e097cff add a simple hack 
llvm-svn: 45343
 2007-12-24 19:27:46 +00:00
Gordon Henriksen
3e409a37ac Setting GlobalDirective in TargetAsmInfo by default rather than 
providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.

llvm-svn: 45338
 2007-12-23 20:58:16 +00:00
Chris Lattner
a2156b160a fix some warnings. This code needs to be de-tabified :( 
llvm-svn: 45325
 2007-12-22 22:47:03 +00:00
Chris Lattner
1c6a1f71cb fix strict-aliasing violation 
llvm-svn: 45324
 2007-12-22 22:45:38 +00:00
Anton Korobeynikov
4275f59e61 Erm, really disable :) 
llvm-svn: 45319
 2007-12-22 20:46:24 +00:00
Anton Korobeynikov
9f148a1a2a Disable, until we'll really need it 
llvm-svn: 45318
 2007-12-22 20:41:12 +00:00
Evan Cheng
c226a1a7d3 Preliminary PIC JIT support for X86 (32-bit) / Darwin. 
llvm-svn: 45313
 2007-12-22 09:40:20 +00:00
Evan Cheng
5b05d625cd Oops. 
llvm-svn: 45312
 2007-12-22 09:14:34 +00:00
Evan Cheng
8f4ec948d3 Fix JIT code emission of X86::MovePCtoStack. 
llvm-svn: 45307
 2007-12-22 02:26:46 +00:00
Evan Cheng
51f51c7572 Allow JIT with non-static relocation model. 
llvm-svn: 45304
 2007-12-22 01:12:14 +00:00
Anton Korobeynikov
913c80d37f Fix silly typo in the FP CEP handling. 
llvm-svn: 45300
 2007-12-21 23:33:44 +00:00
Duncan Sands
99690fb26c Fix a brain fart by our beloved leader (the content 
of this patch is the last line).

llvm-svn: 45289
 2007-12-21 20:18:41 +00:00
Nicolas Geoffray
1996d8b1f4 Fix unintented change from last commit 
llvm-svn: 45282
 2007-12-21 12:22:29 +00:00
Nicolas Geoffray
18ab237446 Enable EH for linux/ppc32 targets 
llvm-svn: 45281
 2007-12-21 12:19:44 +00:00
Evan Cheng
a111629401 New entry. 
llvm-svn: 45280
 2007-12-21 01:31:58 +00:00
Evan Cheng
eba18a1952 Fix JIT encoding for CMPSD as well. 
llvm-svn: 45268
 2007-12-20 19:57:09 +00:00
Scott Michel
5cbdbd26a8 More working CellSPU tests: 
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads

llvm-svn: 45242
 2007-12-20 00:44:13 +00:00
Dale Johannesen
f93ea63eaa Enable EH on PPC Darwin. This basically works; there 
are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note:  By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work.  You need to trick it into
using the installed system unwinding code to get useful
results.)

llvm-svn: 45221
 2007-12-19 21:54:36 +00:00
Scott Michel
83ac96e27d CellSPU testcase, extract_elt.ll: extract vector element. 
llvm-svn: 45219
 2007-12-19 21:17:42 +00:00
Scott Michel
6cb9f6d20c Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll 
(vector insertions)

llvm-svn: 45216
 2007-12-19 20:15:47 +00:00
Scott Michel
d4d96bb6f6 Add new immed16.ll test case, fix CellSPU errata to make test case work. 
llvm-svn: 45196
 2007-12-19 07:35:06 +00:00
Bill Wendling
ce9eae6687 Mark the "isRemat" instruction as never having side effects. 
llvm-svn: 45190
 2007-12-19 06:07:48 +00:00
Chris Lattner
93d750bbe3 add an obvious load folding missed optzn. 
llvm-svn: 45161
 2007-12-18 16:48:14 +00:00
Christopher Lamb
aeb76743dc Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV. 
This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll

llvm-svn: 45158
 2007-12-18 09:34:41 +00:00
Chris Lattner
ad090a712a add a missed case. 
llvm-svn: 45141
 2007-12-18 01:19:18 +00:00
Bill Wendling
e5af8b6e5c Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I 
based what flag to set on whether it was already marked as
"isRematerializable". If there was a further check to determine if it's "really"
rematerializable, then I marked it as "mayHaveSideEffects" and created a check
in the X86 back-end similar to the remat one.

llvm-svn: 45132
 2007-12-17 23:07:56 +00:00
Scott Michel
4f980e1acd - Restore some i8 functionality in CellSPU 
- New test case: nand.ll

llvm-svn: 45130
 2007-12-17 22:32:34 +00:00
Bill Wendling
b33d6155da LD_Fp64m should have "isRematerializable" set. 
llvm-svn: 45128
 2007-12-17 22:17:14 +00:00
Bill Wendling
ec8be72a8b As per feedback, revised comments to (hopefully) make the different side effect 
flags clearer.

llvm-svn: 45120
 2007-12-17 21:02:07 +00:00
Christopher Lamb
a608afb52e Change the PointerType api for creating pointer types. The old functionality of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space. 
llvm-svn: 45082
 2007-12-17 01:12:55 +00:00
Chris Lattner
5e2b033d30 don't violate C TBAA rules, use FloatToBits instead. 
llvm-svn: 45076
 2007-12-16 20:41:33 +00:00
Chris Lattner
f04ce286e2 fix a questionable cast, thanks to Mike Stump for pointing this out. 
llvm-svn: 45075
 2007-12-16 20:26:54 +00:00
Chris Lattner
c6fd78dec1 Fix the JIT encoding of cmp*ss, which aborts with this assertion currently: 
X86CodeEmitter.cpp:378: failed assertion `0 && "Immediate size not set!"'

I *think* this is right, but Evan, please verify.  It also looks like
CMPSDrr and maybe others are missing this info.  Evan, plz investigate.

llvm-svn: 45074
 2007-12-16 20:12:41 +00:00
Evan Cheng
1d95b669b6 Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs. 
llvm-svn: 45058
 2007-12-15 03:00:47 +00:00
Scott Michel
307f334014 Start committing working test cases for CellSPU. 
llvm-svn: 45050
 2007-12-15 00:38:50 +00:00
Evan Cheng
55e450d6eb Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of MOVQI2PQIrm. 
llvm-svn: 45041
 2007-12-14 20:08:14 +00:00
Evan Cheng
0a36fa6625 Fix (mem) <-> low 64-bits of xmm bugs pointed out by David Greene. Mac OS X Leopard assembler recognizes movq. 
llvm-svn: 45040
 2007-12-14 19:54:07 +00:00
Dale Johannesen
1e083ec1f6 x86-32 long doubles are 4-byte aligned on the stack 
for parameter passing (only for that, on Darwin).

llvm-svn: 45038
 2007-12-14 19:25:34 +00:00
Evan Cheng
42f27a28a4 Fix bsf / bsr jit encoding. 
llvm-svn: 45037
 2007-12-14 18:49:43 +00:00
Evan Cheng
375141a82d Oops. Forgot these. 
llvm-svn: 45036
 2007-12-14 18:25:34 +00:00
Dan Gohman
0efc49e9b8 Fix Intel asm syntax for the bsr and bsf instructions. 
llvm-svn: 45030
 2007-12-14 15:10:00 +00:00
Evan Cheng
6909ff8c4b Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero. 
llvm-svn: 45029
 2007-12-14 08:30:15 +00:00
Evan Cheng
51cf86ded0 Implement ctlz and cttz with bsr and bsf. 
llvm-svn: 45024
 2007-12-14 02:13:44 +00:00
Bill Wendling
c8c611e88f Add flags to indicate that there are "never" side effects or that there "may be" 
side effects for machine instructions.

llvm-svn: 45022
 2007-12-14 01:48:59 +00:00
Evan Cheng
343929c773 Fold some and + shift in x86 addressing mode. 
llvm-svn: 44970
 2007-12-13 00:43:27 +00:00
Evan Cheng
64a1febf9a Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Duncan Sands
47526c4a42 Remove host endianness info from TargetData and 
put it in a new header System/Host.h instead.
Instead of getting the endianness from configure,
calculate it directly.

llvm-svn: 44959
 2007-12-12 23:03:45 +00:00
Dan Gohman
0075ea1f5f Allow vector integer constants to be created with 
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
 2007-12-12 22:21:26 +00:00
Evan Cheng
ad3e7f3286 Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64. 
llvm-svn: 44929
 2007-12-12 07:55:34 +00:00
Evan Cheng
d36d69fe92 Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part. 
llvm-svn: 44921
 2007-12-12 06:45:40 +00:00
Scott Michel
81b4099173 Correct typo for Linux: s/esp/%rsp/ 
llvm-svn: 44904
 2007-12-12 02:38:28 +00:00
Nate Begeman
e9067c13ec Allow the JIT to encode MMX instructions 
llvm-svn: 44869
 2007-12-11 18:06:14 +00:00
Evan Cheng
f6c2838f36 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as 
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836
 2007-12-11 01:46:18 +00:00
Nate Begeman
8b194d1718 x86 doesn't actually want to custom lower v3i32 
llvm-svn: 44835
 2007-12-11 01:41:33 +00:00
Chris Lattner
f7c53191c0 Move TargetData::hostIsLittleEndian out of line, which means we 
don't have to #include config.h in it.  #including config.h breaks
other projects that have their own autoconf stuff and try to #include
the llvm headers.  One obscure example is llvm-gcc.

llvm-svn: 44825
 2007-12-11 00:28:59 +00:00
Anton Korobeynikov
005fe34c3b Hey, English is not my native language :) 
llvm-svn: 44820
 2007-12-10 23:10:20 +00:00
Anton Korobeynikov
b003fb0ed7 Clarify the need of CFI() stuff 
llvm-svn: 44819
 2007-12-10 23:08:35 +00:00
Anton Korobeynikov
fd74645812 Provide convenient way to disable CFI stuff for old/broken assemblers. 
Use it for Darwin.

llvm-svn: 44818
 2007-12-10 23:04:38 +00:00
Chris Lattner
b511799808 Disable cfi directives for now, darwin does't support them. 
These should probably be something like:

  CFI(".cfi_def_cfa_offset 16\n")

where CFI is defined to a noop on darwin and other platforms
that don't support those directives.

llvm-svn: 44803
 2007-12-10 19:10:18 +00:00
Anton Korobeynikov
cd497afc30 And finally annotate X86-64 version of callback. 
All bad stuff from SSE version is implicitely inherited :)

llvm-svn: 44794
 2007-12-10 15:27:07 +00:00
Anton Korobeynikov
49e2962ad3 Provide annotation for SSE version of callback. It's even more 
broken, because doesn't mark xmm regs properly

llvm-svn: 44793
 2007-12-10 15:13:55 +00:00
Anton Korobeynikov
0e4780cfe2 Annotate JIT callback function with call frame infromation. 
This will allow us (theoretically) to unwind through JITer.
The code wasn't verified, so I'm pretty sure offsets are wrong :)

llvm-svn: 44792
 2007-12-10 14:54:42 +00:00
Bill Wendling
8d8d9a2f5e Reverting 44702. It wasn't correct to rename them. 
llvm-svn: 44727
 2007-12-08 23:58:46 +00:00
Chris Lattner
12fca81026 aesthetic changes, no functionality change. Evan, it's not clear 
what 'Available' is, please add a comment near it and rename it
if appropriate.

llvm-svn: 44703
 2007-12-08 07:22:58 +00:00
Bill Wendling
d10837def7 Renaming: 
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
 2007-12-08 07:17:56 +00:00
Chris Lattner
e93a775a4d Fix a significant code quality regression I introduced on PPC64 quite 
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
 2007-12-08 07:04:58 +00:00
Chris Lattner
e16166b78d implement __builtin_return_addr(0) on ppc. 
llvm-svn: 44700
 2007-12-08 06:59:59 +00:00
Chris Lattner
1024cda0bd refactor some code to avoid overloading the name 'usesLR' in 
different places to mean different things.  Document what the
one in PPCFunctionInfo means and when it is valid.

llvm-svn: 44699
 2007-12-08 06:39:11 +00:00
Evan Cheng
fdd03d0589 Doh 
llvm-svn: 44694
 2007-12-08 01:01:07 +00:00
Evan Cheng
28c2b7e647 Fix a compilation warning. 
llvm-svn: 44692
 2007-12-08 01:00:31 +00:00
Evan Cheng
6bfc0cadf3 Fix a compilation warning. 
llvm-svn: 44691
 2007-12-08 01:00:21 +00:00
Bill Wendling
c08dedb060 Initial commit of the machine code LICM pass. It successfully hoists this: 
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
 2007-12-07 21:42:31 +00:00
Evan Cheng
c4db072c74 Add comment. 
llvm-svn: 44686
 2007-12-07 21:30:01 +00:00
Evan Cheng
34c7b35135 Much improved v8i16 shuffles. (Step 1). 
llvm-svn: 44676
 2007-12-07 08:07:39 +00:00
Evan Cheng
4dc538449d Remove a bogus optimization. It's not possible to do a move to low element to a <8 x i16> or <16 x i8> vector. 
llvm-svn: 44669
 2007-12-06 22:14:22 +00:00
Chris Lattner
c467b49c96 implement a readme entry, compiling the code into: 
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656
 2007-12-06 07:33:36 +00:00