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567 Commits

Author SHA1 Message Date
Rafael Espindola
0324937229 Reduce code duplication on the TLS implementation. 
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.

llvm-svn: 68552
 2009-04-07 21:37:46 +00:00
Nick Lewycky
a0dcd7e173 Remove strange extra semicolons. 
llvm-svn: 67287
 2009-03-19 05:51:39 +00:00
Bill Wendling
bfc216c45a Make sure this doesn't access .end() too. 
llvm-svn: 65213
 2009-02-21 01:11:36 +00:00
Bill Wendling
96430050a5 Make sure we don't dereference the .end() of the container. 
llvm-svn: 65211
 2009-02-21 01:07:26 +00:00
Bill Wendling
66c3ffa2de Propagate more debug loc infos. This also includes some code cleaning. 
llvm-svn: 65207
 2009-02-21 00:43:56 +00:00
Bill Wendling
09289bc433 We need to propagate the debug location information even when dealing with the 
prologue/epilogue.

llvm-svn: 65206
 2009-02-21 00:32:08 +00:00
Dale Johannesen
560b03bbcd Remove non-DebugLoc versions of BuildMI from X86. 
There were some that might even matter in X86FastISel.

llvm-svn: 64437
 2009-02-13 02:33:27 +00:00
Bill Wendling
40e4b271af Revert this. It was breaking stuff. 
llvm-svn: 64428
 2009-02-13 02:16:35 +00:00
Bill Wendling
83b6edd760 Turn off the old way of handling debug information in the code generator. Use 
the new way, where all of the information is passed on SDNodes and machine
instructions.

llvm-svn: 64427
 2009-02-13 02:01:04 +00:00
Dale Johannesen
5a21722625 Eliminate a couple of non-DebugLoc BuildMI variants. 
Modify callers.

llvm-svn: 64409
 2009-02-12 23:08:38 +00:00
Dan Gohman
2decb4495d Don't try to set an EFLAGS operand to dead if no instruction was created. 
This fixes a bug introduced by r61215.

llvm-svn: 64316
 2009-02-11 19:50:24 +00:00
Evan Cheng
e00df1d39c Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. 
llvm-svn: 63938
 2009-02-06 17:43:24 +00:00
Dan Gohman
4ad174b236 Fix the Red Zone calculation for functions with frame pointers. 
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.

llvm-svn: 63074
 2009-01-27 00:40:06 +00:00
Dan Gohman
3a51d8e847 Implement Red Zone utilization on x86-64. This is currently 
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.

llvm-svn: 63056
 2009-01-26 22:22:31 +00:00
Dan Gohman
7ff343fe6c Fix a compiler-abort on a testcase where the stack-pointer is added to 
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.

llvm-svn: 61408
 2008-12-24 00:27:51 +00:00
Devang Patel
d4aebdfa3f Silence unused variable warnings. 
llvm-svn: 61392
 2008-12-23 21:56:28 +00:00
Dan Gohman
1c74326cea When emitting instructions that define EFLAGS and the EFLAGS value isn't 
used, mark the defs as dead.

llvm-svn: 61215
 2008-12-18 22:03:42 +00:00
Dan Gohman
54790143b2 When setting up the frame pointer, add it as a live-in register to all 
non-entry blocks, so that it doesn't appear use-before-def anywhere.

llvm-svn: 61214
 2008-12-18 22:01:52 +00:00
Dan Gohman
fb30c38893 Mark the x86 fp stack registers as "reserved". This tells LiveVariables 
and the RegisterScavenger not to expect traditional liveness 
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.

llvm-svn: 61179
 2008-12-18 01:05:09 +00:00
Dan Gohman
6a589b31f7 Fish kill flag annotations in PUSH instructions. 
llvm-svn: 60095
 2008-11-26 06:39:12 +00:00
Bill Wendling
f8f6ed82f1 Revert r58489. It isn't correct for all cases. 
llvm-svn: 58523
 2008-10-31 18:30:19 +00:00
Bill Wendling
0f1f4f8bb1 Don't skip over all "terminator" instructions when determining where to put the 
callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.

llvm-svn: 58489
 2008-10-31 04:00:23 +00:00
Dan Gohman
30c5ce1b7d Switch the MachineOperand accessors back to the short names like 
isReg, etc., from isRegister, etc.

llvm-svn: 57006
 2008-10-03 15:45:36 +00:00
Dan Gohman
4aacc3ab83 Split x86's ADJCALLSTACK instructions into 32-bit and 64-bit forms. 
This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.

Also, add some comments describing the CALL instructions' physreg
operand uses and defs.

llvm-svn: 56925
 2008-10-01 18:28:06 +00:00
Evan Cheng
28d9b3a8ad Re-apply 56683 with fixes. 
llvm-svn: 56748
 2008-09-27 01:56:22 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: 
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
 2008-09-26 22:10:44 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 
llvm-svn: 56683
 2008-09-26 19:48:35 +00:00
Evan Cheng
0d612aad67 X86 address displacement field must be interpreted as a 32-bit value. 
llvm-svn: 56665
 2008-09-26 16:58:16 +00:00
Anton Korobeynikov
24b906c8a3 XMM6-XMM15 are callee-saved on Win64. Patch by Nicolas Capens! 
llvm-svn: 56568
 2008-09-24 22:03:04 +00:00
Anton Korobeynikov
33c69aaf24 Reapply 55899: First draft of EH support on x86/64-linux 
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.

llvm-svn: 55955
 2008-09-08 21:12:47 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Anton Korobeynikov
8528e4dc99 First draft of EH support on x86/64-linux 
llvm-svn: 55899
 2008-09-08 14:21:53 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Evan Cheng
19738e3956 80 col. violations. 
llvm-svn: 55341
 2008-08-25 21:58:43 +00:00
Nate Begeman
730880eec2 Fit in 80 cols 
llvm-svn: 54029
 2008-07-25 17:34:41 +00:00
Dan Gohman
cd25487258 Pool-allocation for MachineInstrs, MachineBasicBlocks, and 
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
 2008-07-07 23:14:23 +00:00
Evan Cheng
1f6148a84c - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. 
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097
 2008-07-03 09:09:37 +00:00
Dan Gohman
83c1b4cede Prune a few dependencies on MachineFunction.h. 
llvm-svn: 52976
 2008-07-01 18:15:35 +00:00
Dan Gohman
c8097f8c8c Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating 
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
 2008-07-01 00:05:16 +00:00
Dale Johannesen
f170e29cf5 Fixes the last x86-64 test failure in compat.exp: 
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code.  The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing.  This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)

llvm-svn: 52750
 2008-06-26 01:51:13 +00:00
Duncan Sands
d634afe3aa Wrap MVT::ValueType in a struct to get type safety 
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
 2008-06-06 12:08:01 +00:00
Anton Korobeynikov
4b572e0f73 Fix typo 
llvm-svn: 50169
 2008-04-23 18:24:25 +00:00
Anton Korobeynikov
372e69e652 Only allow increase of max alignment value 
llvm-svn: 50168
 2008-04-23 18:23:50 +00:00
Anton Korobeynikov
47a8e6d7a9 Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register. 
llvm-svn: 50167
 2008-04-23 18:23:30 +00:00
Anton Korobeynikov
e7754f758b Add X86 Maximal Stack Alignment Calculator Pass before RA 
llvm-svn: 50166
 2008-04-23 18:23:05 +00:00
Anton Korobeynikov
158f614c67 Do proper book-keeping of offsets and prologue/epilogue code for stack realignment 
llvm-svn: 50163
 2008-04-23 18:21:27 +00:00
Anton Korobeynikov
1f07315f47 If stack realignment is used - incoming args will use EBP as base register and locals - ESP 
llvm-svn: 50162
 2008-04-23 18:21:02 +00:00
Anton Korobeynikov
5079553b9d Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not 
llvm-svn: 50161
 2008-04-23 18:20:17 +00:00
Anton Korobeynikov
492641d67f Cleanup 
llvm-svn: 50159
 2008-04-23 18:19:23 +00:00
Anton Korobeynikov
87325bfdf5 Simplify 
llvm-svn: 50158
 2008-04-23 18:18:36 +00:00
Anton Korobeynikov
73935826d4 Make stack alignment options global for all targets 
llvm-svn: 50157
 2008-04-23 18:18:10 +00:00
Anton Korobeynikov
6a59c959ca Provide option for enabling-disabling stack realignment 
llvm-svn: 50156
 2008-04-23 18:17:11 +00:00
Anton Korobeynikov
fc59ae78e0 Disable stack realignment for functions with dynamic-sized alloca's 
llvm-svn: 50155
 2008-04-23 18:16:43 +00:00
Anton Korobeynikov
7e6850d1a1 Provide convenient helpers for some operations 
llvm-svn: 50153
 2008-04-23 18:15:48 +00:00
Anton Korobeynikov
71adb49389 Whitespace cleanup 
llvm-svn: 50152
 2008-04-23 18:15:11 +00:00
Nicolas Geoffray
82baa2d2c6 Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented 
llvm-svn: 49809
 2008-04-16 20:10:13 +00:00
Dale Johannesen
edcba1161f Reverse sense of unwind-tables option. This means 
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.

llvm-svn: 49663
 2008-04-14 17:54:17 +00:00
Dale Johannesen
ec0fe04044 Implement new llc flag -disable-required-unwind-tables. 
Corresponds to -fno-unwind-tables (usually default in gcc).

llvm-svn: 49361
 2008-04-08 00:10:24 +00:00
Dale Johannesen
84a1314ea1 Cosmetic changes per EH patch review feedback. 
llvm-svn: 49096
 2008-04-02 17:04:45 +00:00
Dale Johannesen
79633a914f Recommitting EH patch; this should answer most of the 
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
 2008-04-02 00:25:04 +00:00
Dale Johannesen
8813206b7f Revert 49006 for the moment. 
llvm-svn: 49046
 2008-04-01 20:00:57 +00:00
Dale Johannesen
fa4433be71 Emit exception handling info for functions which are 
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.

llvm-svn: 49006
 2008-03-31 23:40:23 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 
llvm-svn: 48995
 2008-03-31 20:40:39 +00:00
Anton Korobeynikov
dbde70d7d6 Add information about callee-saved registers on Win64 
llvm-svn: 48692
 2008-03-22 21:04:01 +00:00
Anton Korobeynikov
c41f5b6af4 Fix newly-introduced 4.3 warnings 
llvm-svn: 47375
 2008-02-20 12:07:57 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Dan Gohman
d1cc100aef Avoid needlessly casting away const qualifiers. 
llvm-svn: 46877
 2008-02-08 03:29:40 +00:00
Evan Cheng
9ff6b89bd9 Frame index can be negative. 
llvm-svn: 46655
 2008-02-02 00:17:00 +00:00
Evan Cheng
d6222fc11d Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. 
llvm-svn: 46635
 2008-02-01 09:10:45 +00:00
Evan Cheng
705212577d Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. 
llvm-svn: 46609
 2008-01-31 09:59:15 +00:00
Evan Cheng
d1bed85965 Add x86 specific getFrameIndexOffset(). This fixes local variable debugging info. 
llvm-svn: 46598
 2008-01-31 04:06:00 +00:00
Evan Cheng
b2b94f7a81 Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them. 
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.

llvm-svn: 46571
 2008-01-30 20:08:35 +00:00
Evan Cheng
84adda6b67 Skip over the label which marks the beginning of the function before inserting prologue code. 
llvm-svn: 46546
 2008-01-30 03:57:33 +00:00
Anton Korobeynikov
37309ed741 Provide correct DWARF register numbering for debug information emission on x86-32/Darwin. 
This should fix bunch of issues.

llvm-svn: 46337
 2008-01-25 00:34:13 +00:00
Chris Lattner
f83aae613c rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo. 
Some day I'll get it all moved over...

llvm-svn: 45672
 2008-01-07 01:35:02 +00:00
Owen Anderson
2adf8c5533 Move some more functionality from MRegisterInfo to TargetInstrInfo. 
llvm-svn: 45603
 2008-01-04 23:57:37 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
 2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
 2007-12-30 23:10:15 +00:00
Chris Lattner
7504adbd72 More cleanups for MachineOperand: 
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
 2007-12-30 21:56:09 +00:00
Chris Lattner
4d0361fbf2 Shrinkify the machine operand creation method names. 
llvm-svn: 45433
 2007-12-30 00:45:46 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
1d95b669b6 Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs. 
llvm-svn: 45058
 2007-12-15 03:00:47 +00:00
Evan Cheng
55e450d6eb Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of MOVQI2PQIrm. 
llvm-svn: 45041
 2007-12-14 20:08:14 +00:00
Nate Begeman
e9067c13ec Allow the JIT to encode MMX instructions 
llvm-svn: 44869
 2007-12-11 18:06:14 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Evan Cheng
58b387dfb0 Remove redundant foldMemoryOperand variants and other code clean up. 
llvm-svn: 44517
 2007-12-02 08:30:39 +00:00
Evan Cheng
79e8b92dc3 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. 
llvm-svn: 44479
 2007-12-01 02:07:52 +00:00
Evan Cheng
fd33cb316f Clean up sub-register implementation by moving subReg information back to 
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104
 2007-11-14 07:59:08 +00:00
Dale Johannesen
5fd9e7a615 Add parameter to getDwarfRegNum to permit targets 
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056
 2007-11-13 19:13:01 +00:00
Evan Cheng
994043f515 Fix x86-64 jit: remove reliance on Dwarf numbers. 
llvm-svn: 44048
 2007-11-13 17:54:34 +00:00
Anton Korobeynikov
8e8473c783 Use TableGen to emit information for dwarf register numbers. 
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997
 2007-11-11 19:50:10 +00:00
Dale Johannesen
eca19e7eca Revert previous rewrite per chris's comments. 
llvm-svn: 43950
 2007-11-09 18:07:11 +00:00
Dale Johannesen
8a9ec1582b Rewrite Dwarf number handling per review comments. 
llvm-svn: 43918
 2007-11-09 00:47:10 +00:00
Dale Johannesen
b11aca8a92 Complete conditionalization of Dwarf reg numbers. 
Would somebody not on Darwin please make sure this
doesn't break anything.  Exception handling failures
would be the most likely symptom.

llvm-svn: 43844
 2007-11-07 21:48:35 +00:00
Dale Johannesen
a863789700 Interchange Dwarf numbers of ESP and EBP on x86 Darwin. 
Much improvement in exception handling.

llvm-svn: 43794
 2007-11-07 00:25:05 +00:00
Evan Cheng
c49995c027 Use movups to spill / restore SSE registers on targets where stacks alignment is 
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.

llvm-svn: 43703
 2007-11-05 07:30:01 +00:00
Anton Korobeynikov
0d3f43480e Fix off-by-one stack offset computations (dwarf information) for callee-saved 
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!

llvm-svn: 43381
 2007-10-26 09:13:24 +00:00
Evan Cheng
ddeab10144 Fix an unfolding bug. 
llvm-svn: 43212
 2007-10-22 03:03:20 +00:00
Evan Cheng
b56784f9ea Resolve unfold tables ambiguity. 
llvm-svn: 43194
 2007-10-19 23:50:58 +00:00
Evan Cheng
ded6550885 Local spiller optimization: 
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.

llvm-svn: 43192
 2007-10-19 21:23:22 +00:00
Evan Cheng
0449186690 - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.

llvm-svn: 43153
 2007-10-18 22:40:57 +00:00
Evan Cheng
c852780685 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
llvm-svn: 43150
 2007-10-18 21:29:24 +00:00
Evan Cheng
2e2d6358bc Change unfoldMemoryOperand(). User is now responsible for passing in the 
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.

llvm-svn: 42946
 2007-10-13 02:35:06 +00:00
Evan Cheng
c7b7a3cb74 Fold load / store into MOV32to32_ and MOV16to16_. 
llvm-svn: 42895
 2007-10-12 08:38:01 +00:00
Arnold Schwaighofer
d47210011e Added tail call optimization to the x86 back end. It can be 
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870
 2007-10-11 19:40:01 +00:00
Chris Lattner
fcccf4b6c4 disable this entirely: it is causing use of invalidated iterators and infinite looping. 
llvm-svn: 42739
 2007-10-07 22:00:31 +00:00
Chris Lattner
39dbb82db2 Fix many regressions on x86 by avoiding dereferencing the end iterator. 
llvm-svn: 42738
 2007-10-07 21:53:12 +00:00
Anton Korobeynikov
54ecd77023 Oops, I really wanted to commit this part also :) 
llvm-svn: 42700
 2007-10-06 16:39:43 +00:00
Anton Korobeynikov
34fefcf678 Move merge code into new helper function. 
llvm-svn: 42699
 2007-10-06 16:17:49 +00:00
Evan Cheng
6e5205d379 Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. 
llvm-svn: 42624
 2007-10-05 01:34:55 +00:00
Evan Cheng
3537dbbd1e Refactor code to add load / store folded instructions -> register only 
instructions reverse map.

llvm-svn: 42509
 2007-10-01 23:44:33 +00:00
Evan Cheng
f3c130a8b6 Enabling new condition code modeling scheme. 
llvm-svn: 42459
 2007-09-29 00:00:36 +00:00
Dan Gohman
50747737a5 TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets 
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.

llvm-svn: 42419
 2007-09-27 23:12:31 +00:00
Evan Cheng
d8ab90ae1f Use GR64 in 64-bit mode. 
llvm-svn: 42417
 2007-09-27 21:50:05 +00:00
Evan Cheng
0f9e307353 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). 
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.

llvm-svn: 42372
 2007-09-26 21:31:07 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!

llvm-svn: 42346
 2007-09-26 06:25:56 +00:00
Anton Korobeynikov
8cd666b659 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32 
llvm-svn: 42332
 2007-09-26 00:13:34 +00:00
Evan Cheng
24c5a1a484 Missing load / store folding entries. 
llvm-svn: 42323
 2007-09-25 22:10:43 +00:00
Evan Cheng
36b3babfde Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after 
all the kinks are worked out.

llvm-svn: 42285
 2007-09-25 01:57:46 +00:00
Dan Gohman
32b1df2aa3 The code that used the StartLabelId label was removed, so remove the 
code that creates the label too.

llvm-svn: 42265
 2007-09-24 16:44:26 +00:00
Dan Gohman
eb622df2ef Fix several more entries in the x86 reload/remat folding tables. 
llvm-svn: 42162
 2007-09-20 14:17:21 +00:00
Evan Cheng
ec83699473 PSHUFDmi, etc. are actually folding a load, not a store. 
llvm-svn: 42147
 2007-09-19 19:02:47 +00:00
Dan Gohman
be3b005b2d Move the entries for 64-bit CMP, IMUL, and a few others into the correct 
tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.

llvm-svn: 42094
 2007-09-18 14:59:14 +00:00
Dale Johannesen
46adce144c Remove RSTRegClass case from loadRegFromStackSlot 
and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)

llvm-svn: 42049
 2007-09-17 20:15:38 +00:00
Dale Johannesen
575bd6070a Remove the assumption that FP's are either float or 
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).

llvm-svn: 41967
 2007-09-14 22:26:36 +00:00
Dan Gohman
fb60c0dfed Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
 2007-09-14 20:33:02 +00:00
Evan Cheng
4715ccb29c It's not safe to rematerialize MOV32r0 etc. by simply cloning the original 
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802
 2007-09-10 20:48:53 +00:00
Owen Anderson
4b71e55287 Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!

llvm-svn: 41758
 2007-09-07 04:06:50 +00:00
Evan Cheng
cb317912b2 Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. 
llvm-svn: 41599
 2007-08-30 05:54:07 +00:00
Duncan Sands
26ef2a1767 Move getX86RegNum into X86RegisterInfo and use it 
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.

llvm-svn: 41577
 2007-08-29 19:01:20 +00:00
Evan Cheng
ffa8cbd22b Make sure epilogue esp adjustment is placed before any terminator and pop instructions. 
llvm-svn: 40538
 2007-07-26 17:45:41 +00:00
Anton Korobeynikov
e8170a07f8 Heal EH handling stuff by emitting correct offsets to callee-saved registers. 
Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)

llvm-svn: 40472
 2007-07-24 21:07:39 +00:00
Evan Cheng
8312ed6f77 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Evan Cheng
30e121adf6 Only adjust esp around calls in presence of alloca. 
llvm-svn: 40028
 2007-07-19 00:42:05 +00:00
Evan Cheng
6a4fb5d62b Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. 
llvm-svn: 40018
 2007-07-18 21:26:06 +00:00
Evan Cheng
cf0fdbc249 Fold prologue esp update when possible. 
llvm-svn: 39984
 2007-07-17 21:26:42 +00:00
Evan Cheng
26f6d71d26 Make sure not to break eh_return. 
llvm-svn: 39978
 2007-07-17 18:40:47 +00:00
Evan Cheng
46a48c5c3e Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. 
llvm-svn: 39974
 2007-07-17 18:03:34 +00:00
Evan Cheng
532b73311e Use push / pop for prologues and epilogues. 
llvm-svn: 39967
 2007-07-17 07:59:08 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Dan Gohman
928144b051 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, 
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.

llvm-svn: 38478
 2007-07-10 00:05:58 +00:00
Dale Johannesen
9072b65b0b Refactor X87 instructions. As a side effect, all 
their names are changed.

llvm-svn: 37876
 2007-07-04 21:07:47 +00:00
Dale Johannesen
7af19491d3 Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.

llvm-svn: 37847
 2007-07-03 00:53:03 +00:00
Anton Korobeynikov
7daaf71b29 More DWARF-related things cleanup: 
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.

llvm-svn: 37015
 2007-05-12 22:36:25 +00:00
Anton Korobeynikov
44aa4c588b Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux 
with non-llvm-compiled (e.g. "native") unwind runtime.

llvm-svn: 36647
 2007-05-02 19:53:33 +00:00
Anton Korobeynikov
d1bf4af988 Emit correct DWARF reg # for RA (return address) register 
llvm-svn: 36646
 2007-05-02 08:46:03 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Evan Cheng
c6fa6cb4c5 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
llvm-svn: 36456
 2007-04-26 01:09:28 +00:00
Chris Lattner
fd730d86e3 do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits

llvm-svn: 36442
 2007-04-25 17:23:53 +00:00
Chris Lattner
ca7480e8cb support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner
452294cb99 support >4G stack frames 
llvm-svn: 36423
 2007-04-25 04:25:10 +00:00
Bill Wendling
54134a37e0 Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Chris Lattner
c7109ece27 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Evan Cheng
41f4f032ee Added MRegisterInfo hook to re-materialize an instruction. 
llvm-svn: 35205
 2007-03-20 08:09:38 +00:00
Bill Wendling
5fef3fd7e7 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.

llvm-svn: 35031
 2007-03-08 22:09:11 +00:00
Evan Cheng
116f97f2c7 PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
llvm-svn: 34707
 2007-02-28 00:21:17 +00:00
Evan Cheng
da51cf986a By default, spills kills the register being stored. 
llvm-svn: 34515
 2007-02-23 01:10:04 +00:00
Jim Laskey
6a937ad320 Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Evan Cheng
e4ab9c032b Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng
8c2508f1ac Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Jim Laskey
6f5d7d292f Only gather frame info if debug or eh. 
llvm-svn: 33639
 2007-01-29 23:20:22 +00:00
Jim Laskey
eba0cf04e5 Landing pad-less eh for PPC. 
llvm-svn: 33622
 2007-01-29 18:51:14 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode. 
llvm-svn: 33537
 2007-01-26 14:34:52 +00:00
Jim Laskey
ba1dc7a8c7 Call frames for intel. 
llvm-svn: 33490
 2007-01-24 19:15:24 +00:00
Jim Laskey
ebaec45158 80 columns 
llvm-svn: 33489
 2007-01-24 18:50:57 +00:00
Evan Cheng
b6a4a7f72a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng
d9d93832b0 hasFP() is now a virtual method of MRegisterInfo. 
llvm-svn: 33455
 2007-01-23 00:57:47 +00:00
Evan Cheng
174826c1b9 One more try... 
llvm-svn: 33400
 2007-01-20 10:17:53 +00:00
Evan Cheng
672910d722 Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca). 
llvm-svn: 33399
 2007-01-20 10:11:56 +00:00
Evan Cheng
5807fbc934 Backend is reponsible for aligning the stack. 
llvm-svn: 33388
 2007-01-20 02:08:16 +00:00
Anton Korobeynikov
548b9af9c2 * PIC codegen for X86/Linux has been implemented 
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
 2007-01-12 19:20:47 +00:00
Anton Korobeynikov
2b39939053 Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
 2007-01-03 11:43:14 +00:00
Evan Cheng
bd6a333b52 Fix naming inconsistency. 
llvm-svn: 32823
 2007-01-02 21:33:40 +00:00
Evan Cheng
5effab79f3 f64 <-> i64 bit_convert using movq in 64-bit mode. 
llvm-svn: 32587
 2006-12-14 21:55:39 +00:00
Evan Cheng
9918e7780a Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand(). 
llvm-svn: 32583
 2006-12-14 19:44:45 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
f4788fe306 MI keeps a ptr of TargetInstrDescriptor, use it. 
llvm-svn: 32296
 2006-12-07 01:21:59 +00:00
Evan Cheng
bf13611e84 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Jim Laskey
bc27bd0c6e Hopefully a good crack at making debugging work on intel -disable-fp-elim. 
llvm-svn: 31830
 2006-11-17 21:19:15 +00:00
Evan Cheng
fc1b3d8bc8 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
llvm-svn: 31795
 2006-11-16 23:33:25 +00:00
Evan Cheng
2a92afa25d Properly transfer kill / dead info. 
llvm-svn: 31765
 2006-11-15 20:58:11 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Evan Cheng
de7ff3fa3d Fix a potential bug. 
llvm-svn: 31634
 2006-11-10 09:13:37 +00:00
Evan Cheng
013597778d Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng
6f0095807e Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
llvm-svn: 31616
 2006-11-10 01:28:43 +00:00
Evan Cheng
8743c67826 Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng
54c4be233e Dead code. 
llvm-svn: 31405
 2006-11-03 02:08:41 +00:00
Evan Cheng
02e193e2ff Delete dead code; fix 80 col violations. 
llvm-svn: 30583
 2006-09-22 21:43:59 +00:00
Anton Korobeynikov
7c2118575c Added some eye-candy for Subtarget type checking 
Added X86 StdCall & FastCall calling conventions. Codegen will follow.

llvm-svn: 30446
 2006-09-17 20:25:45 +00:00
Evan Cheng
59e25ca829 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.

llvm-svn: 30205
 2006-09-08 21:08:13 +00:00
Evan Cheng
15dd42884e Committing X86-64 support. 
llvm-svn: 30177
 2006-09-08 06:48:29 +00:00
Chris Lattner
a96d4ad830 Some notes on better load folding we could do 
llvm-svn: 30155
 2006-09-07 20:32:01 +00:00
Evan Cheng
24ce2a3b27 Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll 
llvm-svn: 30113
 2006-09-05 08:32:49 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Chris Lattner
59a4d8dfcd Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.

llvm-svn: 30108
 2006-09-05 02:12:02 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks! 
llvm-svn: 29756
 2006-08-17 22:00:08 +00:00
Evan Cheng
a634c2b838 Missing a space. 
llvm-svn: 29233
 2006-07-20 22:52:28 +00:00
Jim Laskey
88d7595eb3 Tidy up a few things. 
llvm-svn: 29213
 2006-07-19 19:32:06 +00:00
Jim Laskey
d31b3778d8 Reduce size of routine. Shrinks .o by 37%. 
llvm-svn: 29210
 2006-07-19 17:53:32 +00:00
Evan Cheng
1d5fa40da3 Add shift and rotate by 1 instructions / patterns. 
llvm-svn: 28980
 2006-06-29 00:36:51 +00:00
Evan Cheng
2a0f3b2e79 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
llvm-svn: 28764
 2006-06-13 05:14:44 +00:00
Evan Cheng
2da9d803a4 Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Evan Cheng
696779cea0 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng
889544823a Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng
dc9b5f5fc0 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
llvm-svn: 28324
 2006-05-16 07:21:53 +00:00
Chris Lattner
dbbbabb17b More coverity fixes 
llvm-svn: 28266
 2006-05-12 21:14:20 +00:00
Evan Cheng
0fb3fc3626 Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
 2006-05-08 08:01:26 +00:00
Evan Cheng
84612a59c2 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
 2006-05-05 05:40:20 +00:00
Chris Lattner
075404adaa Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
97f1af2f14 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Evan Cheng
37af498015 Use movaps instead of movapd for spill / restore. 
llvm-svn: 28005
 2006-04-28 02:23:35 +00:00
Evan Cheng
70237fcb5d MakeMIInst() should handle jump table index operands. 
llvm-svn: 27955
 2006-04-24 05:37:35 +00:00
Evan Cheng
7364ee1c92 - PEXTRW cannot take a memory location as its first source operand. 
- PINSRWrmi encoding bug.

llvm-svn: 27818
 2006-04-18 21:59:43 +00:00
Evan Cheng
d6fa185be2 SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand. 
llvm-svn: 27817
 2006-04-18 21:56:36 +00:00
Evan Cheng
82d7cacbbc Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate). 
llvm-svn: 27815
 2006-04-18 21:31:08 +00:00
Evan Cheng
5728f30f7c Incorrect foldMemoryOperand entries 
llvm-svn: 27763
 2006-04-17 18:06:12 +00:00
Evan Cheng
b2e3339cb2 Can't fold loads into alias vector SSE ops used for scalar operation. The load 
address has to be 16-byte aligned but the values aren't spilled to 128-bit
locations.

llvm-svn: 27732
 2006-04-16 06:58:19 +00:00
Evan Cheng
300456c7f2 Added SSE (and other) entries to foldMemoryOperand(). 
llvm-svn: 27716
 2006-04-14 23:33:27 +00:00
Evan Cheng
4831ed56e4 We were not adjusting the frame size to ensure proper alignment when alloca / 
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.

llvm-svn: 27698
 2006-04-14 07:26:43 +00:00
Evan Cheng
4f357911ad Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. 
llvm-svn: 27554
 2006-04-10 07:21:31 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Evan Cheng
22dd2900e6 Minor fixes + naming changes. 
llvm-svn: 27410
 2006-04-04 19:12:30 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Jim Laskey
8688957c53 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Evan Cheng
8dd794ea70 Use the generic vector register classes VR64 / VR128 rather than V4F32, 
V8I16, etc.

llvm-svn: 26838
 2006-03-18 01:23:20 +00:00
Evan Cheng
1f5cb60f28 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. 
llvm-svn: 26817
 2006-03-17 02:36:22 +00:00
Evan Cheng
fc79bdafbe Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. 
ADD32ri8.

llvm-svn: 26816
 2006-03-17 02:25:01 +00:00
Evan Cheng
07ffd089da Fix an obvious bug exposed when we are doing 
ADD X, 4
==>
MOV32ri $X+4, ...

llvm-svn: 26366
 2006-02-25 01:37:02 +00:00
Evan Cheng
1b23fdda1a Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. 
Added generic vector types: VR64 and VR128.

llvm-svn: 26295
 2006-02-21 01:38:21 +00:00
Evan Cheng
6a9422ce1c Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
 2006-02-20 22:34:53 +00:00
Evan Cheng
bf4008c701 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Evan Cheng
74228303ad Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
 2006-02-16 01:50:02 +00:00
Chris Lattner
70ef21db04 When rewriting frame instructions, emit the appropriate small-immediate 
instruction when possible.

llvm-svn: 25938
 2006-02-03 18:20:04 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner
10f9a9daa5 implement isStoreToStackSlot 
llvm-svn: 25911
 2006-02-02 20:00:41 +00:00
Evan Cheng
adc4966129 Added SSE entries to foldMemoryOperand(). 
llvm-svn: 25888
 2006-02-01 23:02:25 +00:00