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Commit Graph

1895 Commits

Author SHA1 Message Date
Dan Gohman
9d7cf23808 Don't maintain a set of deleted nodes; instead, use a HandleSDNode
to track a node over CSE events. This fixes PR7368.

llvm-svn: 106266
2010-06-18 01:24:29 +00:00
Dan Gohman
8185674354 Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.

llvm-svn: 106263
2010-06-18 01:05:21 +00:00
Dan Gohman
08da31dc83 Make this test less fragile.
llvm-svn: 106255
2010-06-18 00:06:03 +00:00
Bill Wendling
9b8de6dcec Create a more targeted fix for not sinking instructions into a range where it
will conflict with another live range. The place which creates this scenerio is
the code in X86 that lowers a select instruction by splitting the MBBs. This
eliminates the need to check from the bottom up in an MBB for live pregs.

llvm-svn: 106066
2010-06-15 23:46:31 +00:00
Jakob Stoklund Olesen
7fe0620525 Remove the local register allocator.
Please use the fast allocator instead.

llvm-svn: 106051
2010-06-15 21:58:33 +00:00
Chris Lattner
48961d3ca6 fix fastisel to handle GS and FS relative pointers. Patch by
Nelson Elhage!

llvm-svn: 106031
2010-06-15 19:08:40 +00:00
Jakob Stoklund Olesen
88e1f2b2b5 Avoid processing early clobbers twice in RegAllocFast.
Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

llvm-svn: 105998
2010-06-15 16:20:57 +00:00
Chris Lattner
45c451acae apparently lots of dupes.
llvm-svn: 105956
2010-06-14 20:19:03 +00:00
Chris Lattner
3fd8e8a2f5 fix a nasty bug where we were not treating available_externally
symbols as declarations in the X86 backend.  This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:

symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression

This fixes PR7353.

llvm-svn: 105954
2010-06-14 20:11:56 +00:00
Chris Lattner
add4d84c77 remove old test.
llvm-svn: 105953
2010-06-14 20:07:43 +00:00
Chris Lattner
f2d0008dce rename test
llvm-svn: 105952
2010-06-14 20:07:34 +00:00
Bill Wendling
0e4d704f16 Testcase for r105741.
llvm-svn: 105750
2010-06-09 20:30:22 +00:00
Jakob Stoklund Olesen
9611ad3317 Mark physregs defined by inline asm as implicit.
This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.

llvm-svn: 105749
2010-06-09 20:05:00 +00:00
Dan Gohman
1865db1b89 LSR needs to remember inserted instructions even in postinc mode, because
there could be multiple subexpressions within a single expansion which
require insert point adjustment. This fixes PR7306.

llvm-svn: 105510
2010-06-05 00:33:07 +00:00
Dan Gohman
332b06bd4f Fix normalization and de-normalization of non-affine SCEVs.
llvm-svn: 105480
2010-06-04 19:16:34 +00:00
Mon P Wang
f83cdf3d18 Fixed a bug during widening where we would avoid legalizing a node. When we
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes.  Since OpA has been processed, the new uses are
not examined again.  The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.

llvm-svn: 105453
2010-06-04 01:20:10 +00:00
Dan Gohman
bbd309edaa This test doesn't need the ssp attribute.
llvm-svn: 105440
2010-06-04 00:14:48 +00:00
Dan Gohman
ab8153cf58 Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It
needs to demand the high bits because it's asserting that they're zero.

llvm-svn: 105406
2010-06-03 20:21:33 +00:00
Bill Wendling
077afde4bf Machine sink could potentially sink instructions into a block where the physical
registers it defines then interfere with an existing preg live range.

For instance, if we had something like these machine instructions:

BB#0
  ... = imul ... EFLAGS<imp-def,dead>
  test ..., EFLAGS<imp-def>
  jcc BB#2 EFLAGS<imp-use>

BB#1
  ... ; fallthrough to BB#2

BB#2
  ... ; No code that defines EFLAGS
  jcc ... EFLAGS<imp-use>

Machine sink will come along, see that imul implicitly defines EFLAGS, but
because it's "dead", it assumes that it can move imul into BB#2. But when it
does, imul's "dead" imp-def of EFLAGS is raised from the dead (a zombie) and
messes up the condition code for the jump (and pretty much anything else which
relies upon it being correct).

The solution is to know which pregs are live going into a basic block. However,
that information isn't calculated at this point. Nor does the LiveVariables pass
take into account non-allocatable physical registers. In lieu of this, we do a
*very* conservative pass through the basic block to determine if a preg is live
coming out of it.

llvm-svn: 105387
2010-06-03 07:54:20 +00:00
Eric Christopher
00f399e90a One underscore, not two.
llvm-svn: 105379
2010-06-03 04:02:59 +00:00
Dan Gohman
3a3a65dadc Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
llvm-svn: 105283
2010-06-01 18:35:14 +00:00
Chris Lattner
14bf35ae45 fix PR6623: when optimizing for size, don't inline memcpy/memsets
that are too large.  This causes the freebsd bootloader to be too
large apparently.

It's unclear if this should be an -Os or -Oz thing.  Thoughts welcome.

llvm-svn: 105228
2010-05-31 17:30:14 +00:00
Chris Lattner
e8b65c0352 upgrade and filecheckize this test.
llvm-svn: 105227
2010-05-31 17:27:17 +00:00
Evan Cheng
fd971f18cb Remove schedule-livein-copies. It's not being used.
llvm-svn: 105095
2010-05-29 02:23:39 +00:00
Evan Cheng
96bdf3e6f1 Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments.
llvm-svn: 105092
2010-05-29 01:35:22 +00:00
Jakob Stoklund Olesen
f58cd7c838 Fix more tests that depended on the default register allocator choice.
llvm-svn: 104961
2010-05-28 17:06:30 +00:00
Dan Gohman
bcee12027f Eliminate the restriction that the array size in an alloca must be i32.
This will help reduce the amount of casting required on 64-bit targets.

llvm-svn: 104911
2010-05-28 01:14:11 +00:00
Jakob Stoklund Olesen
d76041cf58 Add a -regalloc=default option that chooses a register allocator based on the -O
optimization level.

This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.

llvm-svn: 104904
2010-05-27 23:57:25 +00:00
Devang Patel
bdda547db4 Simplify. Eliminate unneeded debug_loc entry.
llvm-svn: 104785
2010-05-26 23:55:23 +00:00
Devang Patel
2ea3f77515 Update debug info when live-in reg is copied into a vreg.
llvm-svn: 104732
2010-05-26 20:18:50 +00:00
Dale Johannesen
81afa3569a Testcase for 104624/104619/PR7191/8023512.
Reduced from one provided by Duncan Sands, thanks!

llvm-svn: 104710
2010-05-26 17:55:45 +00:00
Dale Johannesen
9d2f1f2b16 Removing test; Chris thinks it's better to have the
bug go untested than have a testcase this large.  So be it.

llvm-svn: 104632
2010-05-25 20:40:10 +00:00
Dale Johannesen
8fd73c1910 Fix another variant of PR 7191. Also add a testcase
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.

llvm-svn: 104624
2010-05-25 18:47:23 +00:00
Eric Christopher
189eca1291 This test is darwin only. Make it so(tm).
llvm-svn: 104418
2010-05-22 00:55:55 +00:00
Eric Christopher
165bcdf8a8 Add full bss data support for darwin tls variables.
llvm-svn: 104414
2010-05-22 00:10:22 +00:00
Chris Lattner
4c14d2c4a4 now that fp reg kill insertion stuff happens as a separate
pass after isel instead of being interlaced with it, we can
trust that all the code for a function has been isel'd before
it is run.

The practical impact of this is that we can scan for machine
instr phis instead of doing a fuzzy match on the LLVM BB for
phi nodes.  Doing the fuzzy match required knowing when isel
would produce an fp reg stack phi which was gross.  It was
also wrong in cases where select got lowered to a branch
tree because cmovs aren't available (PR6828).

Just do the scan on machine phis which is simpler, faster
and more correct.  This fixes PR6828.

llvm-svn: 104333
2010-05-21 18:17:54 +00:00
Dale Johannesen
d0a5fdb32f Fix i64->f64 conversion, x86-64, -no-sse. A bit
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.

llvm-svn: 104308
2010-05-21 00:52:33 +00:00
Dan Gohman
89f64e13fe When canonicalizing icmp operand order to put the loop invariant
operand on the left, the interesting operand is on the right. This
fixes a bug where LSR was failing to recognize ICmpZero uses,
which led it to be unable to reverse the induction variable in the
attached testcase.

Delete test/CodeGen/X86/stack-color-with-reg-2.ll, because its test
is extremely fragile and hard to meaningfully update.

llvm-svn: 104262
2010-05-20 19:26:52 +00:00
Dan Gohman
eaa3ee65bd When converting a test to a cmp to fold a load, use the cmp that has an
8-bit immediate field rather than one with a wider immediate field.

llvm-svn: 104064
2010-05-18 21:42:03 +00:00
Daniel Dunbar
8c20c162fe MC/X86: Implement custom lowering to make sure we match things like
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

llvm-svn: 104030
2010-05-18 17:22:24 +00:00
Dale Johannesen
b71d6a4150 Removing as part of previous reversion.
llvm-svn: 103915
2010-05-16 20:19:40 +00:00
Dale Johannesen
cf2d4b9f91 Revert 103911; it broke a test that expects bitconvert
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine).  The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.

llvm-svn: 103914
2010-05-16 20:19:04 +00:00
Dale Johannesen
15dce10b5a Make x86-64 64-bit bitconvert work when SSE is not available.
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)

llvm-svn: 103911
2010-05-16 18:22:38 +00:00
Anton Korobeynikov
925a32ae37 Add support for thiscall calling convention.
Patch by Charles Davis and Steven Watanabe!

llvm-svn: 103902
2010-05-16 09:08:45 +00:00
Jakob Stoklund Olesen
3eac02b22f Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
2010-05-14 18:03:25 +00:00
Jakob Stoklund Olesen
d99818256c Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686
2010-05-13 00:19:43 +00:00
Jakob Stoklund Olesen
7d1323d9a5 Make sure to add kill flags to the last use of a virtreg when it is redefined.
The X86 floating point stack pass and others depend on good kill flags.

llvm-svn: 103635
2010-05-12 18:46:03 +00:00
Jakob Stoklund Olesen
6976c543cd Enable a bunch more -regalloc=fast tests
llvm-svn: 103531
2010-05-12 00:11:24 +00:00
Jakob Stoklund Olesen
99d5d74fb0 One more -regalloc=fast test
llvm-svn: 103509
2010-05-11 20:51:07 +00:00
Jakob Stoklund Olesen
e27902ac68 Simplify the tracking of used physregs to a bulk bitor followed by a transitive
closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

llvm-svn: 103500
2010-05-11 20:30:28 +00:00