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Author SHA1 Message Date
Jim Grosbach
6faf547463 Thumb2 assembly parsing and encoding for LDRH. 
llvm-svn: 139386
 2011-09-09 19:13:53 +00:00
Jim Grosbach
26f684d4ff Shuffle a bit. 
llvm-svn: 139385
 2011-09-09 19:09:54 +00:00
Akira Hatanaka
17df2dfe8c Drop support for Allegrex. Allegrex implements a variant of Mips2. 
llvm-svn: 139383
 2011-09-09 19:00:51 +00:00
Jim Grosbach
eb2d668899 Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. 
llvm-svn: 139381
 2011-09-09 18:37:27 +00:00
Jakob Stoklund Olesen
659d713274 Reapply r139247: Cache intermediate results during traceSiblingValue. 
In some cases such as interpreters using indirectbr, the CFG can be very
complicated, and live range splitting may be forced to insert a large
number of phi-defs.  When that happens, traceSiblingValue can spend a
lot of time zipping around in the CFG looking for defs and reloads.

This patch causes more information to be cached in SibValues, and the
cached values are used to terminate searches early.  This speeds up
spilling by 20x in one interpreter test case.  For more typical code,
this is just a 10% speedup of spilling.

The previous version had bugs that caused miscompilations. They have
been fixed.

llvm-svn: 139378
 2011-09-09 18:11:41 +00:00
Andrew Trick
77fa88a786 Comment formatting. 
llvm-svn: 139375
 2011-09-09 17:35:10 +00:00
Devang Patel
8a2e622f38 Update docs to reflect recent addition of new CompileUnit elements. 
llvm-svn: 139374
 2011-09-09 17:07:15 +00:00
Jim Grosbach
1091b2913d Add FIXME. 
llvm-svn: 139371
 2011-09-09 16:45:31 +00:00
Duncan Sands
6fc4c521c9 Mark the eh.typeid.for intrinsic as being 'const', which it is inside 
any given function.  As pointed out by John McCall, this is needed to
have redundant eh.typeid.for tests be eliminated in the presence of
cleanups.

llvm-svn: 139360
 2011-09-09 07:50:37 +00:00
Craig Topper
23adfa4738 Add disassembler test for Intel syntax. Tests r139353. 
llvm-svn: 139356
 2011-09-09 06:35:44 +00:00
Craig Topper
18cbd5db26 Fix handling of Intel syntax disassembling of movs and stos to stop being blank. Also fixed scas, and cmps to always print size suffix in Intel syntax since its abiguous without arguments. Fixes PR10875. 
llvm-svn: 139353
 2011-09-09 05:40:53 +00:00
Akira Hatanaka
e1eb015eb9 Change default target architecture from Mips1 to Mips32r1 in preparation for 
removing support for Mips1 and Mips2. 

This change and the ones that follow have been discussed with and approved by
Bruno.

llvm-svn: 139344
 2011-09-09 01:13:27 +00:00
Benjamin Kramer
da0ca686c9 Remove dead code. 
llvm-svn: 139343
 2011-09-09 00:22:05 +00:00
Nick Lewycky
ec5437bfc4 Fix release build: 
MachOObjectFile.cpp:524: error: unused variable 'NumLoadCommands' [-Wunused-variable]

llvm-svn: 139341
 2011-09-09 00:16:50 +00:00
Ivan Krasin
19d51af328 gold plugin: report errors occured in lto_module_create_from_* 
llvm-svn: 139340
 2011-09-09 00:14:04 +00:00
Akira Hatanaka
94deb5f3f9 80 columns. 
llvm-svn: 139339
 2011-09-09 00:13:35 +00:00
Devang Patel
ba2d56b1ef Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 
llvm-svn: 139330
 2011-09-08 22:59:09 +00:00
Owen Anderson
99ad1a853e All conditional branches are disallowed in IT blocks, not just CBZ/CBNZ. 
llvm-svn: 139329
 2011-09-08 22:48:37 +00:00
Owen Anderson
d7127e0c27 Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. 
llvm-svn: 139328
 2011-09-08 22:42:49 +00:00
Eric Christopher
fc8e09962f Formatting and typo. 
llvm-svn: 139325
 2011-09-08 22:17:40 +00:00
Nadav Rotem
2f256b7f9f Dix the 80-columns and remove unsupported v8i16 type from the list of legal vselect types. 
llvm-svn: 139324
 2011-09-08 22:17:35 +00:00
Jim Grosbach
9f150bfedf Thumb2 assembly parsing and encoding for LDRD(immediate). 
Refactor operand handling for STRD as well. Tests for that forthcoming.

llvm-svn: 139322
 2011-09-08 22:07:06 +00:00
Bruno Cardoso Lopes
54962ac233 Add a AVX version of a simple i64 -> f64 bitcast. This could be 
triggered using llc with -O0, which wouldn't let it be folded and
expose the lack of this pattern.

llvm-svn: 139320
 2011-09-08 21:52:33 +00:00
Bruno Cardoso Lopes
50596b096c Reapply testcase from r139309! 
llvm-svn: 139318
 2011-09-08 21:05:43 +00:00
Eli Friedman
fd4451674b Make sure to handle the case where emitPredicateMatch returns false. Noticed by inspection. 
llvm-svn: 139317
 2011-09-08 21:00:31 +00:00
Kevin Enderby
16f9df1f05 Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 
without a base symbol that must not have a relocation entry.

llvm-svn: 139316
 2011-09-08 20:53:44 +00:00
Benjamin Kramer
3c40c2100b Add support for relocations to ObjectFile. 
Patch by Danil Malyshev!

llvm-svn: 139314
 2011-09-08 20:52:17 +00:00
Bruno Cardoso Lopes
2f07ca9728 * Combines Alignment, AuxInfo, and TB_NOT_REVERSABLE flag into a 
single field (Flags), which is a bitwise OR of items from the TB_*
enum. This makes it easier to add new information in the future.

* Gives every static array an equivalent layout: { RegOp, MemOp, Flags }

* Adds a helper function, AddTableEntry, to avoid duplication of the
insertion code.

* Renames TB_NOT_REVERSABLE to TB_NO_REVERSE.

* Adds TB_NO_FORWARD, which is analogous to TB_NO_REVERSE, except that
it prevents addition of the Reg->Mem entry. (This is going to be used
by Native Client, in the next CL).

Patch by David Meyer

llvm-svn: 139311
 2011-09-08 18:35:57 +00:00
Bruno Cardoso Lopes
3ecc7a69fd Remove this crashing test, until I figure out what's going wrong here 
llvm-svn: 139309
 2011-09-08 18:32:36 +00:00
Bruno Cardoso Lopes
74a67e22b0 Add AVX versions of blend vector operations and fix some issues noticed 
in Nadav's r139285 and r139287 commits.

1) Rename vsel.ll to a more descriptive name
2) Change the order of BLEND operands to "Op1, Op2, Cond", this is
necessary because PBLENDVB is already used in different places with
this order, and it was being emitted in the wrong way for vselect
3) Add AVX patterns and tests for the same SSE41 instructions

llvm-svn: 139305
 2011-09-08 18:05:08 +00:00
Bruno Cardoso Lopes
84c53e3965 Fix PR10844: Add patterns to cover non foldable versions of X86vzmovl. 
Triggered using llc -O0. Also fix some SET0PS patterns to their AVX
forms and test it on the testcase.

llvm-svn: 139304
 2011-09-08 18:05:02 +00:00
Caitlin Sadowski
ac6881fc85 Added LateParsed property to TableGen attributes. 
This patch was written by DeLesley Hutchins.

llvm-svn: 139300
 2011-09-08 17:40:49 +00:00
Jim Grosbach
222a102bd1 Add tests for Thumb2 LDRB indexed addressing w/ writeback. 
llvm-svn: 139292
 2011-09-08 16:49:36 +00:00
Nadav Rotem
fd68584146 This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll 
llvm-svn: 139288
 2011-09-08 08:43:23 +00:00
Nadav Rotem
dbfa2c8810 add a testcase for the previous patch 
llvm-svn: 139287
 2011-09-08 08:31:31 +00:00
James Molloy
090d019a29 Fix warning on windows; use of comparison with bool argument. 
llvm-svn: 139286
 2011-09-08 08:12:01 +00:00
Nadav Rotem
b461f2190e Add X86-SSE4 codegen support for vector-select. 
llvm-svn: 139285
 2011-09-08 08:11:19 +00:00
Ivan Krasin
2f2f63807f lto/addAsmGlobalSymbols: fast path when no module level asm is present. 
llvm-svn: 139284
 2011-09-08 07:38:25 +00:00
Ivan Krasin
6d62a9f1b3 lto/addAsmGlobalSymbols: fail fracefully when the target does not define AsmParser. 
llvm-svn: 139283
 2011-09-08 07:36:39 +00:00
David Blaikie
385dc75118 Adding myself to test my new commit powers. 
llvm-svn: 139280
 2011-09-08 05:32:49 +00:00
Andrew Trick
dc3f981b08 Fix a use of freed string contents. 
Speculatively try to fix our windows testers with a patch I found on the internet.

llvm-svn: 139279
 2011-09-08 05:25:49 +00:00
Andrew Trick
daeb007cee whitespace 
llvm-svn: 139278
 2011-09-08 05:23:14 +00:00
Eli Friedman
c933295353 A couple minor corrections to r139276. 
llvm-svn: 139277
 2011-09-08 02:37:07 +00:00
Eli Friedman
6e9cab83b0 Fix the logic in BasicAliasAnalysis::aliasGEP for comparing GEP's with variable differences so that it actually does something sane. Fixes PR10881. 
llvm-svn: 139276
 2011-09-08 02:23:31 +00:00
Jim Grosbach
5ac3aa158b Thumb2 assembly parsing and encoding for LDR post-indexed. 
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

llvm-svn: 139272
 2011-09-08 01:01:32 +00:00
Jim Grosbach
1aa191032a Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. 
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

llvm-svn: 139270
 2011-09-08 00:39:19 +00:00
Owen Anderson
4a5ec6836f Remove the "common" set of instructions shared between ARM and Thumb2 modes. This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions. 
llvm-svn: 139268
 2011-09-08 00:11:18 +00:00
Jim Grosbach
8b54d19514 Thumb2 assembly parsing and encoding for LDRBT. 
llvm-svn: 139267
 2011-09-07 23:39:14 +00:00
Jim Grosbach
7482c11b79 Thumb2 assembly parsing and encoding for LDRB(register). 
llvm-svn: 139266
 2011-09-07 23:17:00 +00:00
Jim Grosbach
a3ff9eeb85 Thumb2 assembly parsing and encoding for LDR(register). 
llvm-svn: 139264
 2011-09-07 23:10:15 +00:00