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Author SHA1 Message Date
Owen Anderson
f22cd77ceb Add testcase for r143162. 
llvm-svn: 143163
 2011-10-27 22:54:14 +00:00
Owen Anderson
d35df0aaeb Add some NEON stores to the VLD decoding hook that were accidentally omitted previously. 
llvm-svn: 143162
 2011-10-27 22:53:10 +00:00
Jakob Stoklund Olesen
de21509dcd Also set addrmode6 alignment when align==size. 
Previously, we were only setting the alignment bits on over-aligned
loads and stores.

llvm-svn: 143160
 2011-10-27 22:39:16 +00:00
Eli Friedman
bd9c6b8914 The default alias analysis is -noaa; update the docs to reflect that. Patch by Michael Ilseman. 
llvm-svn: 143159
 2011-10-27 22:32:13 +00:00
Jim Grosbach
67d4fb4bc0 ARM isel for vld1, opcode selection for register stride post-index pseudos. 
llvm-svn: 143158
 2011-10-27 22:25:42 +00:00
Jim Grosbach
ef4767e393 Delete dead code. Nothing ever instantiates this. 
llvm-svn: 143153
 2011-10-27 21:59:17 +00:00
Owen Anderson
c14e970962 Revert r143149, stubbing out symbolic disassembly support. The symbolic disassembly support is too MC-engrained to be useful in llvm-objdump. 
llvm-svn: 143152
 2011-10-27 21:55:13 +00:00
Owen Anderson
6508cba44c If we're searching for a symbol reference to pretty-print a scattered relocation address, and we don't find a symbol table entry, try section begin addresses as well. 
llvm-svn: 143151
 2011-10-27 21:53:50 +00:00
Owen Anderson
52982d93c4 Stub out support for symbol disassembly in llvm-objdump. 
llvm-svn: 143149
 2011-10-27 21:46:31 +00:00
Daniel Dunbar
ac2b6ca8cb projects/sample: Switch over to imported Makefile setup. 
- This will require you to manually reconfigure the projects/sample project (by running projects/config/sample/config.status --recheck) if you haven't updated/built since the 1st part of this commit went in.

llvm-svn: 143148
 2011-10-27 21:25:09 +00:00
Evan Cheng
75271d09f1 Avoid partial CPSR dependency from loop backedges. rdar://10357570 
llvm-svn: 143145
 2011-10-27 21:21:05 +00:00
Daniel Dunbar
9ca0ee457c tests: Rip out a bunch of now unused test code relating to use of llvm-gcc in LLVM tests. 
llvm-svn: 143143
 2011-10-27 20:59:26 +00:00
Daniel Dunbar
bb9f7884ae tests: Remove llvm2cpp, I'm pretty sure no one uses this. 
llvm-svn: 143142
 2011-10-27 20:59:21 +00:00
Daniel Dunbar
b1e6d3a421 lit: Drop some unneeded code from example tests. 
- Also, cleanup site.exp files in example tests.

llvm-svn: 143141
 2011-10-27 20:59:19 +00:00
Owen Anderson
9aaee13bf1 Fix pretty printing of i386 local sect diff relocations, TLV relocations, and x86_64 TLV relocations in MachO. 
llvm-svn: 143140
 2011-10-27 20:46:09 +00:00
Peter Collingbourne
24c42c8534 Add a pinned metadata name for fpaccuracy, and document it 
llvm-svn: 143135
 2011-10-27 19:19:14 +00:00
Peter Collingbourne
798811d4fd Document tbaa metadata in LangRef (documentation largely based on 
comments at top of TypeBasedAliasAnalysis.cpp).

llvm-svn: 143134
 2011-10-27 19:19:07 +00:00
Duncan Sands
ca325638c8 Reapply commit 143028 with a fix: the problem was casting a ConstantExpr Mul 
using BinaryOperator (which only works for instructions) when it should have
been a cast to OverflowingBinaryOperator (which also works for constants).
While there, correct a few other dubious looking uses of BinaryOperator.
Thanks to Chad Rosier for the testcase.  Original commit message:
My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1).  This occurs in 464.h264ref.

llvm-svn: 143125
 2011-10-27 19:16:21 +00:00
Stepan Dyatkovskiy
7942165053 Fixed llvm-objdump uint64_t formatted output. 
llvm-svn: 143120
 2011-10-27 18:40:45 +00:00
Benjamin Kramer
3bb9d5377e 2>&1 doesn't work here, it just creates an empty file called "&1" 
llvm-svn: 143117
 2011-10-27 18:27:45 +00:00
Pete Cooper
cca60da8cd Changed test to check for correct load size instead of shift as the shift might change if optimised 
llvm-svn: 143116
 2011-10-27 18:15:58 +00:00
Jim Grosbach
ee31b72246 Trailing whitespace. 
llvm-svn: 143113
 2011-10-27 17:44:01 +00:00
Kevin Enderby
837c1d56a2 Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and 
not depend on In32BitMode.  Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode.  rdar://9738584

llvm-svn: 143112
 2011-10-27 17:40:41 +00:00
Jim Grosbach
4f7964293a Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix. 
rdar://10348844

llvm-svn: 143110
 2011-10-27 17:33:59 +00:00
Owen Anderson
997d323baa Expose relocation accessors through the libObject C API. 
llvm-svn: 143109
 2011-10-27 17:32:36 +00:00
Jim Grosbach
e1ec953149 Thumb2 t2MVNi assembly parsing to recognize ".w" suffix. 
rdar://10348584

llvm-svn: 143108
 2011-10-27 17:16:55 +00:00
Owen Anderson
ece66e91f2 Add relocation iterators to the libObject C API. 
llvm-svn: 143107
 2011-10-27 17:15:47 +00:00
Benjamin Kramer
ad2fb4eeb5 BlockFrequency: Use a smarter overflow check. 
This trades one 64 bit div for one 64 bit mul and some arithmetic.

llvm-svn: 143106
 2011-10-27 16:38:50 +00:00
Bob Wilson
2ca603d9b7 Revert Duncan's r143028 expression folding which appears to be the culprit 
behind a compile failure on 483.xalancbmk.

llvm-svn: 143102
 2011-10-27 15:47:25 +00:00
Benjamin Kramer
7e10fef545 LLLexer: Factor hex char parsing. 
llvm-svn: 143101
 2011-10-27 14:08:01 +00:00
Nick Lewycky
651475977d Teach our Dwarf emission to use the string pool. 
llvm-svn: 143097
 2011-10-27 06:44:11 +00:00
Eli Friedman
76e3969f05 Don't crash on 128-bit sdiv by constant. Found by inspection. 
llvm-svn: 143095
 2011-10-27 02:06:39 +00:00
Eli Friedman
e6918ac01a It is not safe to sink an alloca into a stacksave/stackrestore pair, so don't do that. <rdar://problem/10352360> 
llvm-svn: 143093
 2011-10-27 01:33:51 +00:00
Chad Rosier
e76ba1b654 A branch predicated on a constant can just FastEmit an unconditional branch. 
llvm-svn: 143086
 2011-10-27 00:21:16 +00:00
Lang Hames
e8bb71f80d Rename NonScalarIntSafe to something more appropriate. 
llvm-svn: 143080
 2011-10-26 23:50:43 +00:00
Chad Rosier
e3141f4f8b Add a TODO comment. FastISel works by parsing each basic block from the bottom 
up.  Thus, improving the support for compares is goodness because it increases
the number of terminator instructions we can handle.  This creates many more 
opportunities for target specific fast-isel.

llvm-svn: 143079
 2011-10-26 23:34:37 +00:00
Chad Rosier
75378507e3 Factor a little more code into EmitCmp, which should have been done in the first 
place.  No functional change intended.

llvm-svn: 143078
 2011-10-26 23:25:44 +00:00
Chad Rosier
52109646da Use EmitCmp in SelectBranch. No functional change intended. 
llvm-svn: 143076
 2011-10-26 23:17:28 +00:00
Nick Lewycky
4aa5a52a80 Reflow lines, fix comments for doxygen style, fix whitespace. No functionality 
change.

llvm-svn: 143074
 2011-10-26 22:55:33 +00:00
Bill Wendling
aa34e68e85 Add include-what-you-use to the External Projects list. 
llvm-svn: 143073
 2011-10-26 22:55:18 +00:00
Chad Rosier
3f38cb48de Factor out an EmitCmp function that can be used by both SelectCmp and 
SelectBranch.  No functional change intended.

llvm-svn: 143072
 2011-10-26 22:47:55 +00:00
Jim Grosbach
c1cf1fe985 Trailing whitespace. 
llvm-svn: 143071
 2011-10-26 22:44:41 +00:00
Jim Grosbach
e3c6fa663f Thumb2 ldr pc-relative encoding fixes. 
We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.

More of rdar://10348687

llvm-svn: 143068
 2011-10-26 22:22:01 +00:00
Rafael Espindola
8c0e2c2fe7 Run test with -verify-machineinstrs. 
Patch by Sanjoy Das.

llvm-svn: 143066
 2011-10-26 21:20:26 +00:00
Rafael Espindola
1958dc7193 Fixes an issue reported by -verify-machineinstrs. 
Patch by Sanjoy Das.

llvm-svn: 143064
 2011-10-26 21:16:41 +00:00
Jim Grosbach
4597f361f6 ARM parse parenthesized expressions for label references. 
Partial fix for rdar://10348687.

llvm-svn: 143063
 2011-10-26 21:14:08 +00:00
Rafael Espindola
90896edc6c This commit introduces two fake instructions MORESTACK_RET and 
MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively.  Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV).  It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.

Patch by Sanjoy Das.

llvm-svn: 143062
 2011-10-26 21:12:27 +00:00
Lang Hames
d87e366c7f Make sure short memsets on ARM lower to stores, even when optimizing for size. 
llvm-svn: 143055
 2011-10-26 20:56:52 +00:00
Duncan Sands
5c8fa99c32 The maximum power of 2 dividing a power of 2 is itself. This occurs 
in 403.gcc and was spotted by my super-optimizer.

llvm-svn: 143054
 2011-10-26 20:55:21 +00:00
Owen Anderson
11396b575d Add support for scattered relocations to the MachO relocatation pretty printer. 
llvm-svn: 143051
 2011-10-26 20:42:54 +00:00