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Author SHA1 Message Date
Nadav Rotem
f9d8f801d9 Add additional element-promotion tests. 
llvm-svn: 142442
 2011-10-18 23:05:33 +00:00
Jim Grosbach
6a932d6ad1 ARM VTBL (one register) assembly parsing and encoding. 
llvm-svn: 142441
 2011-10-18 23:02:30 +00:00
Bill Wendling
da2d6a83c8 Use the integer compare when the value is small enough. Use the "move into a 
register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142440
 2011-10-18 22:52:20 +00:00
Eric Christopher
4046de9d18 Turn on the vzeroupper pass by default. 
I'll remove/rename the option in a few days.

llvm-svn: 142439
 2011-10-18 22:50:17 +00:00
Eric Christopher
341c5b689a Whitespace. 
llvm-svn: 142438
 2011-10-18 22:50:13 +00:00
Bill Wendling
f200722cbc Use the integer compare when the value is small enough. Use the "move into a 
register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142437
 2011-10-18 22:49:07 +00:00
Nick Lewycky
7624680f12 Missed a spot! 
llvm-svn: 142436
 2011-10-18 22:40:18 +00:00
Nick Lewycky
0de6ef455c Fix some typo/formatting issues. No functionality change. 
llvm-svn: 142435
 2011-10-18 22:39:43 +00:00
Nadav Rotem
e435b9e2fd Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero. 
llvm-svn: 142434
 2011-10-18 22:32:43 +00:00
Lang Hames
ccf186dd30 Teach fast isel about vector stores, and make DoSelectCall return false when it fails to emit a store. This fixes <rdar://problem/10215997>. 
llvm-svn: 142432
 2011-10-18 22:11:33 +00:00
Bill Wendling
6900914506 The value we're comparing against may be too large for the ARM CMP 
instruction. Move the value into a register and then use that for the CMP.
<rdar://problem/10305266>

llvm-svn: 142431
 2011-10-18 22:11:18 +00:00
Bill Wendling
198609713e The immediate may be too large for the CMP instruction. Move it into a register 
and use that in the CMP.
<rdar://problem/10305266>

llvm-svn: 142429
 2011-10-18 21:55:58 +00:00
Jim Grosbach
6110df7008 Tidy up formatting. 
llvm-svn: 142422
 2011-10-18 21:09:01 +00:00
Jim Grosbach
de82cec744 Tidy up formatting. 
llvm-svn: 142421
 2011-10-18 21:08:16 +00:00
Jim Grosbach
d748cf251f Yet more ARM NEON assembly parsing for the lane index operand. 
llvm-svn: 142416
 2011-10-18 20:21:17 +00:00
Jim Grosbach
f0d2d6bfc1 Enable more encoded immediate tests. 
llvm-svn: 142415
 2011-10-18 20:20:51 +00:00
Jim Grosbach
8c1298946c More vmov lane testcases. 
llvm-svn: 142414
 2011-10-18 20:19:48 +00:00
Jim Grosbach
ff8c26a53f ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142413
 2011-10-18 20:14:56 +00:00
Jim Grosbach
ed5cb526e2 ARM vmov assembly parsing for the lane index operand. 
llvm-svn: 142412
 2011-10-18 20:10:47 +00:00
Jim Grosbach
1abb2e7e1b The MCJITMemoryManager takes ownership of the JMM, so don't leak it. 
llvm-svn: 142410
 2011-10-18 19:57:38 +00:00
Michael J. Spencer
1b471da6b0 Object/COFF: Remove useless test. 
llvm-svn: 142408
 2011-10-18 19:51:36 +00:00
Michael J. Spencer
f21a701890 llvm-objdump: Add static symbol table dumping. 
llvm-svn: 142404
 2011-10-18 19:32:17 +00:00
Michael J. Spencer
cdfd6ee8bc Object/COFF: Change type from a struct to a uint16_t. The struct would be 
incorrect for bigendian systems.

llvm-svn: 142403
 2011-10-18 19:31:59 +00:00
Daniel Dunbar
81780d9982 build: Tidy up a bunch of tool Makefiles, and simplify where possible using the 
new all-targets pseudo-component.

llvm-svn: 142401
 2011-10-18 19:27:24 +00:00
Daniel Dunbar
2299fff72b llvm-ar: Remove local test target, this is no longer useful. 
llvm-svn: 142400
 2011-10-18 19:27:10 +00:00
Daniel Dunbar
ff8a3694fe llvm-config: Add an all-targets pseudo-component. 
llvm-svn: 142399
 2011-10-18 19:27:08 +00:00
Daniel Dunbar
c5f0100c3a build: Remove some unused code. 
llvm-svn: 142398
 2011-10-18 19:27:04 +00:00
Andrew Trick
1b84db85e7 Use ARM/t2PseudoInst class from ARM/Thumb2 special adds/subs patterns. 
Clean up the patterns, fix comments, and avoid confusing both tools
and coders. Note that the special adds/subs SelectionDAG nodes no
longer have the dummy cc_out operand.

llvm-svn: 142397
 2011-10-18 19:18:52 +00:00
Bob Wilson
bb191a9fef Use isIntN and isUIntN to check for valid signed/unsigned numbers. 
llvm-svn: 142395
 2011-10-18 18:46:49 +00:00
Andrew Trick
5e61a8e533 whitespace 
llvm-svn: 142394
 2011-10-18 18:40:53 +00:00
Bill Wendling
92050387bb A landing pad could have more than one predecessor. In that case, we want that 
predecessor to remove the jump to it as well. Delay clearing the 'landing pad'
flag until after the jumps have been removed. (There is an implicit assumption
in several modules that an MBB which jumps to a landing pad has only two
successors.)
<rdar://problem/10304224>

llvm-svn: 142390
 2011-10-18 18:30:49 +00:00
Jim Grosbach
988b8dd4ce ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142389
 2011-10-18 18:27:07 +00:00
Owen Anderson
39a3d3305a Another failing encoding. 
llvm-svn: 142388
 2011-10-18 18:23:03 +00:00
Jim Grosbach
de8f8bec78 Fix NEON mul encoding tests. Wrong file contents previously. 
llvm-svn: 142387
 2011-10-18 18:14:55 +00:00
Jim Grosbach
2752e0b869 ARM vqdmulh assembly parsing for the lane index operand. 
llvm-svn: 142386
 2011-10-18 18:12:09 +00:00
Jim Grosbach
d2162f8c95 Remove duplicate test. 
llvm-svn: 142383
 2011-10-18 18:05:50 +00:00
Jim Grosbach
86d53ed3d4 Tidy up formatting. 
llvm-svn: 142382
 2011-10-18 18:05:16 +00:00
Jim Grosbach
b56577b650 ARM vmul assembly parsing for the lane index operand. 
llvm-svn: 142381
 2011-10-18 18:01:52 +00:00
Jim Grosbach
93213f0ca9 Tidy up. 
llvm-svn: 142380
 2011-10-18 18:01:09 +00:00
Owen Anderson
593bfe68d2 Add a few more testcases. 
llvm-svn: 142379
 2011-10-18 17:57:31 +00:00
Bruno Cardoso Lopes
edc2e30d42 Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

llvm-svn: 142378
 2011-10-18 17:50:36 +00:00
Owen Anderson
77f405511d Add several FIXME cases for ARM encodings. 
llvm-svn: 142377
 2011-10-18 17:50:22 +00:00
Bob Wilson
f78f688c02 Fix incorrect check for sign-extended constant BUILD_VECTOR. 
<rdar://problem/10298332>

llvm-svn: 142371
 2011-10-18 17:34:51 +00:00
Bob Wilson
0273c767c8 Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS. 
svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization.  For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.

llvm-svn: 142370
 2011-10-18 17:34:47 +00:00
Bill Wendling
8e0af5ff3b Don't exit just because some early commands fail. Use the -k flag when running the checks. 
llvm-svn: 142369
 2011-10-18 17:27:12 +00:00
Jim Grosbach
8c454cac49 Tests for 142365. 
llvm-svn: 142368
 2011-10-18 17:23:34 +00:00
Jim Grosbach
df6fb84ea5 Tidy up formatting. 
llvm-svn: 142367
 2011-10-18 17:22:53 +00:00
Jim Grosbach
4a138cb8d9 ARM vqdmlal assembly parsing for the lane index operand. 
llvm-svn: 142365
 2011-10-18 17:16:30 +00:00
Jim Grosbach
5cc37c406d Thumb2 parsing of 'mov.w' gets the cc_out operand wrong. Add an alias for it. 
llvm-svn: 142363
 2011-10-18 17:09:35 +00:00
Jim Grosbach
031bb99231 ARM assembly parsing and encoding for VMOV.i64. 
llvm-svn: 142356
 2011-10-18 16:18:11 +00:00