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Florian Hahn
f2662d35c8 Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB" 
This reverts commit 1b748faf2bae246e2fc77d88420df13c2e60f4df because it
breaks building the llvm-test-suite with -verify-machineinstrs on X86:
http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-x86_64-O3/9585/

Running llc -verify-machineinstr on X86 crashes on the IR below:

    target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"

    %struct.widget = type { i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [16 x [16 x i16]], [6 x [32 x i32]], [16 x [16 x i32]], [4 x [12 x [4 x [4 x i32]]]], [16 x i32], i8**, i32*, i32***, i32**, i32, i32, i32, i32, %struct.baz*, %struct.wobble.1*, i32, i32, i32, i32, i32, i32, %struct.quux.2*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32***, i32***, i32****, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x [2 x i32]], [3 x [2 x i32]], i32, i32, i64, i64, %struct.zot.3, %struct.zot.3, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
    %struct.baz = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.snork*, %struct.wombat.0*, %struct.wobble*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (%struct.widget*, %struct.eggs*)*, i32, i32, i32, i32 }
    %struct.snork = type { %struct.spam*, %struct.zot, i32 (%struct.wombat*, %struct.widget*, %struct.snork*)* }
    %struct.spam = type { i32, i32, i32, i32, i8*, i32 }
    %struct.zot = type { i32, i32, i32, i32, i32, i8*, i32* }
    %struct.wombat = type { i32, i32, i32, i32, i32, i32, i32, i32, void (i32, i32, i32*, i32*)*, void (%struct.wombat*, %struct.widget*, %struct.zot*)* }
    %struct.wombat.0 = type { [4 x [11 x %struct.quux]], [2 x [9 x %struct.quux]], [2 x [10 x %struct.quux]], [2 x [6 x %struct.quux]], [4 x %struct.quux], [4 x %struct.quux], [3 x %struct.quux] }
    %struct.quux = type { i16, i8 }
    %struct.wobble = type { [2 x %struct.quux], [4 x %struct.quux], [3 x [4 x %struct.quux]], [10 x [4 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [5 x %struct.quux]], [10 x [5 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [15 x %struct.quux]] }
    %struct.eggs = type { [1000 x i8], [1000 x i8], [1000 x i8], i32, i32, i32, i32, i32, i32, i32, i32 }
    %struct.wobble.1 = type { i32, [2 x i32], i32, i32, %struct.wobble.1*, %struct.wobble.1*, i32, [2 x [4 x [4 x [2 x i32]]]], i32, i64, i64, i32, i32, [4 x i8], [4 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
    %struct.quux.2 = type { i32, i32, i32, i32, i32, %struct.quux.2* }
    %struct.zot.3 = type { i64, i16, i16, i16 }

    define void @blam(%struct.widget* %arg, i32 %arg1) local_unnamed_addr {
    bb:
      %tmp = load i32, i32* undef, align 4
      %tmp2 = sdiv i32 %tmp, 6
      %tmp3 = sdiv i32 undef, 6
      %tmp4 = load i32, i32* undef, align 4
      %tmp5 = icmp eq i32 %tmp4, 4
      %tmp6 = select i1 %tmp5, i32 %tmp3, i32 %tmp2
      %tmp7 = getelementptr inbounds [4 x [4 x i32]], [4 x [4 x i32]]* undef, i64 0, i64 0, i64 0
      %tmp8 = zext i16 undef to i32
      %tmp9 = zext i16 undef to i32
      %tmp10 = load i16, i16* undef, align 2
      %tmp11 = zext i16 %tmp10 to i32
      %tmp12 = zext i16 undef to i32
      %tmp13 = zext i16 undef to i32
      %tmp14 = zext i16 undef to i32
      %tmp15 = load i16, i16* undef, align 2
      %tmp16 = zext i16 %tmp15 to i32
      %tmp17 = zext i16 undef to i32
      %tmp18 = sub nsw i32 %tmp8, %tmp9
      %tmp19 = shl nsw i32 undef, 1
      %tmp20 = add nsw i32 %tmp19, %tmp18
      %tmp21 = sub nsw i32 %tmp11, %tmp12
      %tmp22 = shl nsw i32 undef, 1
      %tmp23 = add nsw i32 %tmp22, %tmp21
      %tmp24 = sub nsw i32 %tmp13, %tmp14
      %tmp25 = shl nsw i32 undef, 1
      %tmp26 = add nsw i32 %tmp25, %tmp24
      %tmp27 = sub nsw i32 %tmp16, %tmp17
      %tmp28 = shl nsw i32 undef, 1
      %tmp29 = add nsw i32 %tmp28, %tmp27
      %tmp30 = sub nsw i32 %tmp20, %tmp29
      %tmp31 = sub nsw i32 %tmp23, %tmp26
      %tmp32 = shl nsw i32 %tmp30, 1
      %tmp33 = add nsw i32 %tmp32, %tmp31
      store i32 %tmp33, i32* undef, align 4
      %tmp34 = mul nsw i32 %tmp31, -2
      %tmp35 = add nsw i32 %tmp34, %tmp30
      store i32 %tmp35, i32* undef, align 4
      %tmp36 = select i1 %tmp5, i32 undef, i32 undef
      br label %bb37

    bb37:                                             ; preds = %bb
      %tmp38 = load i32, i32* undef, align 4
      %tmp39 = ashr i32 %tmp38, %tmp6
      %tmp40 = load i32, i32* undef, align 4
      %tmp41 = sdiv i32 %tmp39, %tmp40
      store i32 %tmp41, i32* undef, align 4
      ret void
    }
 2021-06-12 11:41:38 +01:00
Florian Hahn
daff62b038 Revert "[X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB optimization" 
This reverts commit f35bcea1d4748889b8240defdf00cb7a71cbe070 because it
depends on 1b748faf2bae246e2fc77d88420df13c2e60f4df, which breaks
building the llvm-test-suite with -verify-machineinstrs on X86.

See 154adc0f135cff3f8a8861c335d2b88c8049d098 for more details.
 2021-06-12 11:40:47 +01:00
madhur13490
1d0f3b309b [AMDGPU][IndirectCalls] Fix register usage propagation for indirect/external calls 
This patch computes max SGPRs and VGPRs used by module
in presence of indirect calls and makes that
as register requirement for functions/kernels
which makes indirect calls.

This patch also refactors code AMDGPUSubTarget.cpp
which add a "base" variants of getMaxNumSGPRs which
is used by MachineFunction and new Function version.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D103636
 2021-06-12 11:59:34 +05:30
spupyrev
09c0e58fa9 A post-processing for BFI inference 
The current implementation for computing relative block frequencies does
not handle correctly control-flow graphs containing irreducible loops. This
results in suboptimally generated binaries, whose perf can be up to 5%
worse than optimal.

To resolve the problem, we apply a post-processing step, which iteratively
updates block frequencies based on the frequencies of their predesessors.
This corresponds to finding the stationary point of the Markov chain by
an iterative method aka "PageRank computation". The algorithm takes at
most O(|E| * IterativeBFIMaxIterations) steps but typically converges faster.

It is turned on by passing option `use-iterative-bfi-inference`
and applied only for functions containing profile data and irreducible loops.

Tested on SPEC06/17, where it is helping to get correct profile counts for one of
the binaries (403.gcc). In prod binaries, we've seen a speedup of up to 2%-5%
for binaries containing functions with hot irreducible loops.

Reviewed By: hoy, wenlei, davidxl

Differential Revision: https://reviews.llvm.org/D103289
 2021-06-11 21:46:04 -07:00
Adrian Prantl
5f69f29b5c Allow signposts to take advantage of deferred string substitution 
One nice feature of the os_signpost API is that format string
substitutions happen in the consumer, not the logging
application. LLVM's current Signpost class doesn't take advantage of
this though and instead always uses a static "Begin/End %s" format
string.

This patch uses variadic macros to allow the API to be used as
intended. Unfortunately, the primary use-case I had in mind (the
LLDB_SCOPED_TIMER() macro) does not get much better from this, because
__PRETTY_FUNCTION__ is *not* a macro, but a static string, so
signposts created by LLDB_SCOPED_TIMER() still use a static "%s"
format string. At least LLDB_SCOPED_TIMERF() works as intended.

This reapplies the previsously reverted patch with support for
platforms where signposts are unavailable.

Differential Revision: https://reviews.llvm.org/D103575
 2021-06-11 16:52:34 -07:00
Adrian Prantl
5ed934f9e8 Revert "Allow signposts to take advantage of deferred string substitution" 
I forgot to make the LLDB macro conditional on Linux.

This reverts commit 541ccd1c1bb23e1e20a382844b35312c0caffd79.
 2021-06-11 16:46:34 -07:00
Andrew Litteken
77b6ee14d4 [IRSim] Strip out the findSimilarity call from the constructor 
Both doInitialize and runOnModule were running the entire analysis
due to the actual work being done in the constructor. Strip it out here
and only get the similarity during runOnModule.

Author: lanza
Reviewers: AndrewLitteken, paquette, plofti

Differential Revision: https://reviews.llvm.org/D92524
 2021-06-11 18:41:28 -05:00
Adrian Prantl
111b1fef7a Allow signposts to take advantage of deferred string substitution 
One nice feature of the os_signpost API is that format string
substitutions happen in the consumer, not the logging
application. LLVM's current Signpost class doesn't take advantage of
this though and instead always uses a static "Begin/End %s" format
string.

This patch uses variadic macros to allow the API to be used as
intended. Unfortunately, the primary use-case I had in mind (the
LLDB_SCOPED_TIMER() macro) does not get much better from this, because
__PRETTY_FUNCTION__ is *not* a macro, but a static string, so
signposts created by LLDB_SCOPED_TIMER() still use a static "%s"
format string. At least LLDB_SCOPED_TIMERF() works as intended.

Differential Revision: https://reviews.llvm.org/D103575
 2021-06-11 16:35:43 -07:00
Alexander Shaposhnikov
29e2b0118b [llvm-objcopy][MachO] Do not strip symbols with the flag REFERENCED_DYNAMICALLY set 
Do not strip symbols having the flag REFERENCED_DYNAMICALLY set.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D104092
 2021-06-11 16:34:59 -07:00
Arthur Eubanks
bd92e2af3f [NFC][OpaquePtr] Make getMemoryParamAllocType() compatible with opaque pointers 
These ABI attributes now always require the type parameter.

sret was missing from the first set of checks but was covered by the
second set.
 2021-06-11 16:01:23 -07:00
Sanjay Patel
2226e4e9b8 [InstCombine] add tests for bit manipulation intrinsics with bool values; NFC 2021-06-11 18:20:14 -04:00
Sanjay Patel
12e7c56398 [InstCombine] update test checks; NFC 2021-06-11 18:20:14 -04:00
Kevin Athey
4f02bdce75 [sanitizer] Remove numeric values from -asan-use-after-return flag. (NFC) 
for issue: https://github.com/google/sanitizers/issues/1394

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D104152
 2021-06-11 15:14:51 -07:00
Andrew Litteken
0fda28ba27 [IRSim] Don't copy the Mapper for createCandidatesFromSuffixTree 
Every invocation this was copying the Mapper for no reason. Take a const
ref instead.

Author: lanza
Reviewers: AndrewLitteken, plofti, paquette,

Differential Review: https://reviews.llvm.org/D92532
 2021-06-11 16:36:23 -05:00
Roman Lebedev
18451cc4a4 [NFC][X86][Codegen] Megacommit: mass-regenerate all check lines that were already autogenerated 
The motivation is that the update script has at least two deviations
(`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from
what pretty much all the checklines were generated with,
and most of the tests are still not updated, so each time one of the
non-up-to-date tests is updated to see the effect of the code change,
there is a lot of noise. Instead of having to deal with that each
time, let's just deal with everything at once.

This has been done via:
```
cd llvm-project/llvm/test/CodeGen/X86
grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc
```

Not all tests were regenerated, however.
 2021-06-11 23:57:02 +03:00
Daniil Fukalov
3d8b8a6451 [NFC][CostModel] Fixed comment that comparisons work regardless of the state. 
Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D104068
 2021-06-11 23:48:49 +03:00
Andrew Litteken
b0b7d897d8 Revert "[IRSim] Adding basic implementation of llvm-sim." 
This reverts commit f47d00c54b52bd8adf9b8725912ea1cd0f1873d5.
 2021-06-11 15:44:19 -05:00
Philip Reames
5d8953a6cd Allow ptrtoint/inttoptr of non-integral pointer types in IR 
I don't like landing this change, but it's an acknowledgement of a practical reality.  Despite not having well specified semantics for inttoptr and ptrtoint involving non-integral pointer types, they are used in practice.  Here's a quick summary of the current pragmatic reality:
* I happen to know that the main external user of non-integral pointers has effectively disabled the verifier rules.
* RS4GC (the lowering pass for abstract GC machine model which is the key motivation for non-integral pointers), even supports them.  We just have all the tests using an integral pointer space to let the verifier run.
* Certain idioms (such as alignment checks for alignment N, where any relocation is guaranteed to be N byte aligned) are fine in practice.
* As implemented, inttoptr/ptrtoint are CSEd and are not control dependent.  This means that any code which is intending to check a particular bit pattern at site of use must be wrapped in an intrinsic or external function call.

This change allows them in the Verifier, and updates the LangRef to specific them as implementation dependent.  This allows us to acknowledge current reality while still leaving ourselves room to punt on figuring out "good" semantics until the future.
 2021-06-11 13:38:32 -07:00
Andrew Litteken
f5356265d8 [IRSim] Adding basic implementation of llvm-sim. 
This is a similarity visualization tool that accepts a Module and
passes it to the IRSimilarityIdentifier.  The resulting SimilarityGroups
are output in a JSON file.

Tests are found in test/tools/llvm-sim and check for the file not found,
a bad module, and that the JSON is created correctly.

Reviewers: paquette, jroelofs, MaskRay

Recommit of: 15645d044bcfe2a0f63156048b302f997a717688 to fix linking
errors.

Differential Revision: https://reviews.llvm.org/D86974
 2021-06-11 14:56:41 -05:00
Arthur Eubanks
df6897c0ce [docs][OpaquePtr] Add some specific examples of what needs to be done 2021-06-11 12:51:46 -07:00
Kevin Athey
cd621c234a [clang-cl][sanitizer] Add -fsanitize-address-use-after-return to clang. 
Also:
  - add driver test (fsanitize-use-after-return.c)
  - add basic IR test (asan-use-after-return.cpp)
  - (NFC) cleaned up logic for generating table of __asan_stack_malloc
    depending on flag.

for issue: https://github.com/google/sanitizers/issues/1394

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D104076
 2021-06-11 12:07:35 -07:00
Arthur Eubanks
5f73af13bd [NFC][OpaquePtr] Explicitly pass GEP source type in optimizeGatherScatterInst() 
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103480
 2021-06-11 11:49:59 -07:00
LLVM GN Syncbot
174f747fbd [gn build] Port 7eba4856c702 2021-06-11 18:04:01 +00:00
Matt Arsenault
ddaa8ec259 AMDGPU/GlobalISel: Remove leftover hack for argument memory sizes 
Since the call lowering code now tries to respect the tablegen
reported argument types, this is no longer necessary.
 2021-06-11 13:45:25 -04:00
Matt Arsenault
8ecbf4dea3 AMDGPU/GlobalISel: Fix indentation 2021-06-11 13:45:25 -04:00
Matt Arsenault
71dc8a693a GlobalISel: Reduce indentation and remove dead path 2021-06-11 13:45:24 -04:00
Matt Arsenault
f133d28419 CodeGen: Fix missing const 2021-06-11 13:45:24 -04:00
Valery N Dmitriev
abf46bdcd3 [SLP][NFC] Fix condition that was supposed to save a bit of compile time. 
It was found by chance revealing discrepancy between comment (few lines above),
the condition and how re-ordering of instruction is done inside the if statement
it guards. The condition was always evaluated to true.

Differential Revision: https://reviews.llvm.org/D104064
 2021-06-11 10:08:55 -07:00
LLVM GN Syncbot
c85b97b264 [gn build] Port c54d3050f7b9 2021-06-11 16:57:34 +00:00
Guozhi Wei
0b1bb7b700 [X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB optimization 
In function searchALUInst, sub register usage of LEA dest should also block LEA/SUB optimization, otherwise the sub register usage gets an undefined value.

This patch fixes https://bugs.llvm.org/show_bug.cgi?id=50615.

Differential Revision: https://reviews.llvm.org/D103922
 2021-06-11 09:45:56 -07:00
LLVM GN Syncbot
0f438067de [gn build] Port 9106047ee3dd 2021-06-11 16:34:49 +00:00
Adam Nemet
aa865c5959 [Matrix] In transpose opts, handle a^t * a^t 
Without the fix the testcase crashes because we remove the same instruction
twice.

Differential Revision: https://reviews.llvm.org/D104127
 2021-06-11 09:29:43 -07:00
Tomas Matheson
bb84fe4048 [CodeGen][regalloc] Don't align stack slots if the stack can't be realigned 
Register allocation may spill virtual registers to the stack, which can
increase alignment requirements of the stack frame. If the the function
did not require stack realignment before register allocation, the
registers required to do so may not be reserved/available. This results
in a stack frame that requires realignment but can not be realigned.

Instead, only increase the alignment of the stack if we are still able
to realign.

The register SpillAlignment will be ignored if we can't realign, and the
backend will be responsible for emitting the correct unaligned loads and
stores. This seems to be the assumed behaviour already, e.g.
ARMBaseInstrInfo::storeRegToStackSlot and X86InstrInfo::storeRegToStackSlot
are both `canRealignStack` aware.

Differential Revision: https://reviews.llvm.org/D103602
 2021-06-11 16:49:12 +01:00
Alexey Bataev
2de818fda2 [SLP]Allow reordering of insertelements. 
After we added support for non-ordered insertelements, we can allow
their reordering.

Differential Revision: https://reviews.llvm.org/D104057
 2021-06-11 08:47:41 -07:00
Matt Morehouse
72312d4d23 [HWASan] Add basic stack tagging support for LAM. 
Adds the basic instrumentation needed for stack tagging.

Currently does not support stack short granules or TLS stack histories,
since a different code path is followed for the callback instrumentation
we use.

We may simply wait to support these two features until we switch to
a custom calling convention.

Patch By: xiangzhangllvm, morehouse

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102901
 2021-06-11 08:21:17 -07:00
Alexey Bataev
fc8fbabc07 [SLP]Remove unnecessary UndefValue in CreateShuffle. 
No need to use UndefValue in CreateShuffle call.

Differential Revision: https://reviews.llvm.org/D104113
 2021-06-11 08:08:30 -07:00
Alexey Bataev
5c202745a6 [SLP][NFC]Add a test for unordered stores, NFC. 2021-06-11 08:02:24 -07:00
LLVM GN Syncbot
621e1fc902 [gn build] Port 9907746f5db7 2021-06-11 14:01:11 +00:00
Sjoerd Meijer
ee05a3e562 Move Function Specialization to its correct location. NFC. 
As a follow up of rGc4a0969b9c14, and as part of D104102, move it to
the IPO transformations directory.
 2021-06-11 15:00:10 +01:00
Zahira Ammarguellat
fa7aa68b13 Fix for error "'Run' overrides a member function but is not marked 
'override' [-Werror,-Wsuggest-override]" occuring during windows
debug self-build.
 2021-06-11 06:56:00 -07:00
Sanjay Patel
c009e5b6df [SimplifyCFG] avoid crash on degenerate loop 
The problematic code pattern in the test is based on:
https://llvm.org/PR50638

If the IfCond is itself the phi that we are trying to remove,
then the loop around line 2835 can end up with something like:
%cmp = select i1 %cmp, i1 false, i1 true

That can then lead to a use-after-free and assert (although
I'm still not seeing that locally in my release + asserts build).

I think this can only happen with unreachable code.

Differential Revision: https://reviews.llvm.org/D104063
 2021-06-11 09:37:06 -04:00
Simon Pilgrim
e36a7e7583 StringExtrasTest.cpp - add missing newline at the end of file. NFCI. 2021-06-11 14:32:35 +01:00
Simon Pilgrim
b871c5c8a1 APInt.h - add missing <utility> header. 
Some buildbots are complaining about std::move() after rG61cdaf66fe22be2b5942ddee4f46a998b4f3ee29
 2021-06-11 13:35:12 +01:00
Simon Pilgrim
165132af1b [ADT] Remove APInt/APSInt toString() std::string variants 
<string> is currently the highest impact header in a clang+llvm build:

https://commondatastorage.googleapis.com/chromium-browser-clang/llvm-include-analysis.html

One of the most common places this is being included is the APInt.h header, which needs it for an old toString() implementation that returns std::string - an inefficient method compared to the SmallString versions that it actually wraps.

This patch replaces these APInt/APSInt methods with a pair of llvm::toString() helpers inside StringExtras.h, adjusts users accordingly and removes the <string> from APInt.h - I was hoping that more of these users could be converted to use the SmallString methods, but it appears that most end up creating a std::string anyhow. I avoided trying to use the raw_ostream << operators as well as I didn't want to lose having the integer radix explicit in the code.

Differential Revision: https://reviews.llvm.org/D103888
 2021-06-11 13:19:15 +01:00
Fraser Cormack
13db9330f8 [VP][NFC] Format comment to 80 columns 2021-06-11 12:53:48 +01:00
Max Kazantsev
26f8809224 [Test] One more elaborate test with selects for loop deletion 2021-06-11 18:41:34 +07:00
Jingu Kang
e751d91e95 precommit tests for D104042 2021-06-11 12:33:16 +01:00
Zarko Todorovski
64bac7eb58 [PowerPC] Allow wa inline asm to also accept floating point arguments 
GCC documentation for the `wa` constraint states that:
```
wa

    A VSX register (VSR), vs0…vs63. This is either an FPR (vs0…vs31 are f0…f31)
    or a VR (vs32…vs63 are v0…v31).
```
This technically means that we could accept floating point parameters. In fact,
gcc itself does. The following testcase compiles and runs on all PPC platforms with GCC,
whereas clang/llc will assert:
```
#include <stdio.h>
double foo ( vector double a ) {
  double b, c;
  asm("xvabsdp  %x0, %x2        \n"
             "xxsldwi  %x1, %x0, %x0, 2 \n"
      :  "+wa"    (b),
         "=wa"    (c)
      :  "wa"    (a)
      );
  return b+c;
}
int main(void) {
  vector double a = {-3., -4.};
  double t = foo( a );
  printf("%g\n", t);
}
```
This patch allows clang/llc to build and run this testcase.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D103409
 2021-06-11 07:19:10 -04:00
Max Kazantsev
3bc0d7e3d3 [Test] Add loop deletion test with switch 2021-06-11 18:05:07 +07:00
Simon Pilgrim
942f6eb554 [ADT] Consistently use StringExtrasTest for the test suite filter. NFCI. 
Noticed while updating D103888 - some of the tests were using "StringExtras" for the test_suite_name instead of the expected "StringExtrasTest"
 2021-06-11 12:00:54 +01:00