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20667 Commits

Author SHA1 Message Date
Jim Grosbach
48f58bcce9 ARM on darwin, v6 implies the presence of VFP for the assembler. 
rdar://10838899

llvm-svn: 150222
 2012-02-10 02:21:49 +00:00
Sirish Pande
a30ca9ed98 Test for commit access. 
llvm-svn: 150178
 2012-02-09 15:20:33 +00:00
James Molloy
85be8f7f88 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. 
llvm-svn: 150169
 2012-02-09 10:56:31 +00:00
Craig Topper
c20605c287 More tweaks to get the size of the X86 disassembler tables down. 
llvm-svn: 150167
 2012-02-09 08:58:07 +00:00
Craig Topper
82b0ee4558 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. 
llvm-svn: 150161
 2012-02-09 07:45:30 +00:00
Jakob Stoklund Olesen
27f005d12d Handle register masks when searching for EFLAGS clobbers. 
Calls clobber the flags, but when using register masks there is no
EFLAGS<imp-def> operand.

llvm-svn: 150117
 2012-02-09 00:17:22 +00:00
Andrew Trick
b9d2e9e81d Codegen pass definition cleanup. No functionality. 
Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

llvm-svn: 150100
 2012-02-08 21:23:13 +00:00
Andrew Trick
c210c552ee Move pass configuration out of pass constructors: StackSlotColoring. 
llvm-svn: 150097
 2012-02-08 21:22:57 +00:00
Andrew Trick
a6dea8798a Move pass configuration out of pass constructors: PostRAScheduler. 
llvm-svn: 150096
 2012-02-08 21:22:53 +00:00
Andrew Trick
9da1cc8ddd Move pass configuration out of pass constructors: BranchFolderPass 
llvm-svn: 150095
 2012-02-08 21:22:48 +00:00
Andrew Trick
fb24596a02 Added TargetPassConfig::setOpt 
llvm-svn: 150093
 2012-02-08 21:22:39 +00:00
Andrew Trick
e696d2f01f Move pass configuration out of pass constructors: TailDuplicate::PreRegAlloc 
llvm-svn: 150091
 2012-02-08 21:22:30 +00:00
Brendon Cahoon
39fcf7dc1b Use TSFlag bit to describe instruction properties. 
Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.

llvm-svn: 150078
 2012-02-08 18:25:47 +00:00
Elena Demikhovsky
87a6e08d3a Fixed a bug in printing "cmp" pseudo ops. 
> This IR code
> %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14)
> fails with assertion:
>
> llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed.
> 0  llc             0x0000000001355803
> 1  llc             0x0000000001355dc9
> 2  libpthread.so.0 0x00007f79a30575d0
> 3  libc.so.6       0x00007f79a23a1945 gsignal + 53
> 4  libc.so.6       0x00007f79a23a2f21 abort + 385
> 5  libc.so.6       0x00007f79a239a810 __assert_fail + 240
> 6  llc             0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119

I added the full testing for all possible pseudo-ops of cmp.
I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp.

You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in.

llvm-svn: 150068
 2012-02-08 08:37:26 +00:00
Craig Topper
f19c739d2d Remove a couple unneeded intrinsic patterns 
llvm-svn: 150067
 2012-02-08 08:29:30 +00:00
Craig Topper
6dbd5e534c Remove GCC builtins for vpermilp* intrinsics as clang no longer needs them. Custom lower the intrinsics to the vpermilp target specific node and remove intrinsic patterns. 
llvm-svn: 150060
 2012-02-08 06:36:57 +00:00
Chad Rosier
b70d1dfae6 [fast-isel] Add support for SUBs with non-legal types. 
llvm-svn: 150047
 2012-02-08 02:45:44 +00:00
Chad Rosier
1ef78d6989 [fast-isel] Add support for ORs with non-legal types. 
llvm-svn: 150045
 2012-02-08 02:29:21 +00:00
Chad Rosier
26610906f0 [fast-isel] Add support for indirect branches. 
llvm-svn: 150014
 2012-02-07 23:56:08 +00:00
Evan Cheng
ab4ad855cc Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang. 
llvm-svn: 150008
 2012-02-07 22:50:41 +00:00
Evan Cheng
653966d99b Do not fold ADD / SUB into load / store (to form pre-indexed, post-indexed 
load / store) if the ADD / SUB has a live definition of CPSR.

Bug reported by David Meyer. Alas, no test case.

llvm-svn: 149970
 2012-02-07 07:09:28 +00:00
Craig Topper
a8a69356e1 Add instruction selection for 256-bit VPSHUFD and 128-bit VPERMILPS/VPERMILPD. 
llvm-svn: 149968
 2012-02-07 06:28:42 +00:00
Craig Topper
11bcb12b5e Convert assert(0) to llvm_unreachable 
llvm-svn: 149961
 2012-02-07 02:50:20 +00:00
Chad Rosier
945ab43c4f [fast-isel] Add support for ADDs with non-legal types. 
llvm-svn: 149934
 2012-02-06 23:50:07 +00:00
Andrew Trick
4f5b6f7f93 Add TargetPassConfig to the PassManager for use inside passes 
llvm-svn: 149926
 2012-02-06 22:51:15 +00:00
Derek Schuff
f522835510 Enable streaming of bitcode 
This CL delays reading of function bodies from initial parse until
materialization, allowing overlap of compilation with bitcode download.

llvm-svn: 149918
 2012-02-06 22:30:29 +00:00
Chris Lattner
7a6bd0185e Remove some dead code and tidy things up now that vectors use ConstantDataVector 
instead of always using ConstantVector.

llvm-svn: 149912
 2012-02-06 21:56:39 +00:00
Bill Wendling
4e92f798ff [unwind removal] We no longer have 'unwind' instructions being generated, so 
remove the code that handles them.

llvm-svn: 149901
 2012-02-06 21:16:41 +00:00
Benjamin Kramer
3443a8294a X86: Don't call malloc for 4 bits. No functionality change. 
llvm-svn: 149866
 2012-02-06 12:06:18 +00:00
Benjamin Kramer
db46bec410 Hexagon: Remove forbidden iostream includes (it introduces static initializers) 
Reorder includes while at it.

llvm-svn: 149863
 2012-02-06 10:19:29 +00:00
Craig Topper
74416bcd0e Add shuffle decoding support for 256-bit pshufd. Merge vpermilp* and pshufd decoding. 
llvm-svn: 149859
 2012-02-06 07:17:51 +00:00
Evan Cheng
f5efaef65b DefinesPredicate should only look for def operands. Patch by Ludwig Meier. 
llvm-svn: 149846
 2012-02-05 19:55:04 +00:00
Duncan Sands
13ce9d000a Remove dead test: this was already checked and handled a few lines 
above.

llvm-svn: 149841
 2012-02-05 19:30:06 +00:00
Duncan Sands
cc472eec96 Persuade GCC that there is nothing worth warning about here (there isn't). 
llvm-svn: 149834
 2012-02-05 14:20:11 +00:00
Duncan Sands
c1b9cbec06 Don't initialize CV in terms of itself! Spotted by GCC. 
llvm-svn: 149833
 2012-02-05 14:16:09 +00:00
Chandler Carruth
9db1b1bb0a Begin fleshing out more convenience predicates in llvm::Triple and 
convert at least one client over to use them. Subsequent patches both to
LLVM and Clang will try to convert more people over to a common set of
predicates.

This round of predicates is focused on OS-categorization predicates.

llvm-svn: 149815
 2012-02-05 08:26:40 +00:00
Craig Topper
dfa8617ab9 Convert assert(0) to llvm_unreachable 
llvm-svn: 149814
 2012-02-05 07:21:30 +00:00
Craig Topper
fe4a950689 Convert assert(0) to llvm_unreachable in X86 Target directory. 
llvm-svn: 149809
 2012-02-05 05:38:58 +00:00
Craig Topper
7b7867bbaa Convert some assert(0) in default of switch statements to llvm_unreachable. 
llvm-svn: 149808
 2012-02-05 03:43:23 +00:00
Craig Topper
07b9d056fa Add target specific node for PMULUDQ. Change patterns to use it and custom lower intrinsics to it. Use it instead of intrinsic to handle 64-bit vector multiplies. 
llvm-svn: 149807
 2012-02-05 03:14:49 +00:00
Chris Lattner
9782adedd7 reapply the patches reverted in r149470 that reenable ConstantDataArray, 
but with a critical fix to the SelectionDAG code that optimizes copies
from strings into immediate stores: the previous code was stopping reading
string data at the first nul.  Address this by adding a new argument to
llvm::getConstantStringInfo, preserving the behavior before the patch.

llvm-svn: 149800
 2012-02-05 02:29:43 +00:00
Craig Topper
c289726019 Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file. 
llvm-svn: 149795
 2012-02-05 00:55:56 +00:00
Andrew Trick
fb574d1c19 TargetPassConfig: confine the MC configuration to TargetMachine. 
Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.

Sorry for the target header churn. Attempting to stabilize them.

llvm-svn: 149754
 2012-02-04 02:56:59 +00:00
Chad Rosier
a6e543e80b [fast-isel] Add support for URem. 
llvm-svn: 149716
 2012-02-03 21:23:45 +00:00
Chad Rosier
6de31d433d [fast-isel] Rename isZExt to isSigned. No functional change intended. 
llvm-svn: 149714
 2012-02-03 21:14:11 +00:00
Chad Rosier
fc667757e8 [fast-isel] Add support for UDIV. 
llvm-svn: 149712
 2012-02-03 21:07:27 +00:00
Chad Rosier
cff3c98417 [fast-isel] Add support for FPToUI. Also add test cases for FPToSI. 
llvm-svn: 149706
 2012-02-03 20:27:51 +00:00
Chad Rosier
40b3e74387 [fast-isel] Add support for selecting UIToFP. 
llvm-svn: 149704
 2012-02-03 19:42:52 +00:00
Craig Topper
dee5f41723 Remove getShuffleVPERMILPImmediate function, getShuffleSHUFImmediate performs the same calculation. 
llvm-svn: 149683
 2012-02-03 06:52:33 +00:00
Craig Topper
afb89fb5f9 Remove unnecessary qualification on 256-bit vector handling in LowerBUILD_VECTOR. Condition was already guaranteed by earlier code. 
llvm-svn: 149680
 2012-02-03 06:32:21 +00:00