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Commit Graph

119620 Commits

Author SHA1 Message Date
Adam Nemet
da30ff366a Revert "ARM: Enable MachineScheduler and disable PostRAScheduler for swift."
This reverts commit r242500.

It broke some internal tests and Matthias asked me to revert it while he
is investigating.

llvm-svn: 242553
2015-07-17 18:14:19 +00:00
Matthias Braun
64f3466a53 Use llvm_unreachable() instead of report_fatal_error() if the machine model is incomplete
This error is for developers only so it makes sense to abort and get a
backtrace.

llvm-svn: 242551
2015-07-17 17:50:11 +00:00
Peter Zotov
f03bb5d046 [OCaml] Do not use -warn-error in tests.
This -warn-error flag invariably gets into release tarballs
and breaks builds on distributions that run tests as a part
of release process. The OCaml binding tests are especially
critical, since they often expose lingering toolchain bugs,
and so it is replaced with -w +A (equivalent to -Wall).

llvm-svn: 242550
2015-07-17 17:33:23 +00:00
James Molloy
4e1c143536 [ARM] Use [SU]ABSDIFF nodes instead of intrinsics for VABD/VABA
No functional change, but it preps codegen for the future when SABSDIFF
will start getting generated in anger.

llvm-svn: 242546
2015-07-17 17:10:55 +00:00
James Molloy
c5d3ffedd0 [AArch64] Use [SU]ABSDIFF nodes instead of intrinsics for ABD/ABA
No functional change, but it preps codegen for the future when SABSDIFF
will start getting generated in anger.

llvm-svn: 242545
2015-07-17 17:10:45 +00:00
Hans Wennborg
6c8fabcf34 Add libunwind to the release scripts
llvm-svn: 242543
2015-07-17 16:49:59 +00:00
Eli Bendersky
d69a59088c Use inbounds GEPs for memcpy and memset lowering
Follow-up on discussion in http://reviews.llvm.org/D11220

llvm-svn: 242542
2015-07-17 16:42:33 +00:00
Rafael Espindola
e9bb2459f5 Add support for producing thin archives in llvm-lib.
I will send an entry in docs/CommandGuide for review today.

llvm-svn: 242533
2015-07-17 16:01:11 +00:00
Alexandros Lamprineas
979f1a44e1 Edited the CPUNames table of TargetParser
- Changed the default FPU of cortex-m4.
- Removed "cortex-m4f" entry. Currently not supported.

Change-Id: I73121e358aa9e7ba68eb001c2143df390ff2352a
Phabricator: http://reviews.llvm.org/D11100
llvm-svn: 242528
2015-07-17 15:49:32 +00:00
John Brawn
1ef8168343 Make global aliases have symbol size equal to their type
This is mainly for the benefit of GlobalMerge, so that an alias into a
MergedGlobals variable has the same size as the original non-merged
variable.

Differential Revision: http://reviews.llvm.org/D10837

llvm-svn: 242520
2015-07-17 12:12:03 +00:00
Daniel Sanders
02977484ac test-release.sh: Add ability to do a test build using the trunk or branches.
Summary:
Adds '--svn-path BRANCH' that causes the script to export the specified path
from each project. Otherwise the tag specified by -release, -rc, etc. will be
used. The version portion of the package name will be 'test-$path' (any forward
slashes in the branch name are replaced with underscores), for example:
  -svn-path trunk => clang+llvm-test-trunk-mips-linux-gnu.tar.xz
  -svn-path branches/release_35 => clang+llvm-test-branches_release_35-mips-linux-gnu.tar.xz

This is primarily useful for bringing new release packages up to standard
without needing to create and maintain a tag for the purpose.

Reviewers: tstellarAMD, hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6563

llvm-svn: 242518
2015-07-17 10:40:40 +00:00
Chandler Carruth
27209caf10 [PM/AA] Disable the core unsafe aspect of GlobalsModRef in the face of
basic changes to the IR such as folding pointers through PHIs, Selects,
integer casts, store/load pairs, or outlining.

This leaves the feature available behind a flag. This flag's default
could be flipped if necessary, but the real-world performance impact of
this particular feature of GMR may not be sufficiently significant for
many folks to want to run the risk.

Currently, the risk here is somewhat mitigated by half-hearted attempts
to update GlobalsModRef when the rest of the optimizer changes
something. However, I am currently trying to remove that update
mechanism as it makes migrating the AA infrastructure to a form that can
be readily shared between new and old pass managers very challenging.
Without this update mechanism, it is possible that this still unlikely
failure mode will start to trip people, and so I wanted to try to
proactively avoid that.

There is a lengthy discussion on the mailing list about why the core
approach here is flawed, and likely would need to look totally different
to be both reasonably effective and resilient to basic IR changes
occuring. This patch is essentially the first of two which will enact
the result of that discussion. The next patch will remove the current
update mechanism.

Thanks to lots of folks that helped look at this from different angles.
Especial thanks to Michael Zolotukhin for doing some very prelimanary
benchmarking of LTO without GlobalsModRef to get a rough idea of the
impact we could be facing here. So far, it looks very small, but there
are some concerns lingering from other benchmarking. The default here
may get flipped if performance results end up pointing at this as a more
significant issue.

Also thanks to Pete and Gerolf for reviewing!

Differential Revision: http://reviews.llvm.org/D11213

llvm-svn: 242512
2015-07-17 06:58:24 +00:00
Peter Zotov
d8604d794a [OCaml] Use a nicer style for documentation than OCaml default.
In particular, it's much easier to read, as it doesn't expand all
the way on wide-screen displays.

CSS committed under LLVM license with explicit permission from
Daniel Bünzli <daniel.buenzli@erratique.ch>.

llvm-svn: 242511
2015-07-17 06:37:59 +00:00
Kuba Brecka
03f9d3de4c [asan] Fix invalid debug info for promotable allocas
Since r230724 ("Skip promotable allocas to improve performance at -O0"), there is a regression in the generated debug info for those non-instrumented variables. When inspecting such a variable's value in LLDB, you often get garbage instead of the actual value. ASan instrumentation is inserted before the creation of the non-instrumented alloca. The only allocas that are considered standard stack variables are the ones declared in the first basic-block, but the initial instrumentation setup in the function breaks that invariant.

This patch makes sure uninstrumented allocas stay in the first BB.

Differential Revision: http://reviews.llvm.org/D11179

llvm-svn: 242510
2015-07-17 06:29:57 +00:00
Davide Italiano
39f1c932a2 [llvm-cxxdump] Don't rely on global state
Differential Revision:	http://reviews.llvm.org/D11227

llvm-svn: 242509
2015-07-17 06:18:36 +00:00
Tim Northover
945e456686 AArch64: add comment missed out from earlier patch.
Helps explain some of the background behind this bit of code.

llvm-svn: 242503
2015-07-17 03:31:50 +00:00
Matthias Braun
27408a4dbe ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
This is mostly done to disable the PostRAScheduler which optimizes for
instruction latencies which isn't a good fit for out-of-order
architectures. This also allows to leave out the itinerary table in
swift in favor of the SchedModel ones.

This change leads to performance improvements/regressions by as much as
10% in some benchmarks, in fact we loose 0.4% performance over the
llvm-testsuite for reasons that appear to be unknown or out of the
compilers control. rdar://20803802 documents the investigation of
these effects.

While it is probably a good idea to perform the same switch for the
other ARM out-of-order CPUs, I limited this change to swift as I cannot
perform the benchmark verification on the other CPUs.

Differential Revision: http://reviews.llvm.org/D10513

llvm-svn: 242500
2015-07-17 01:44:31 +00:00
Matt Arsenault
87f1d755ab Only do fmul (fadd x, x), c combine if the fadd only has one use
This was increasing the instruction count if the fadd has multiple uses.

llvm-svn: 242498
2015-07-17 01:14:35 +00:00
Rafael Espindola
35a7e47fa4 Use small encodings for constants when possible.
llvm-svn: 242493
2015-07-17 00:57:52 +00:00
Alex Lorenz
6fa497343d MIR Serialization: Serialize the frame setup machine instruction flag.
llvm-svn: 242491
2015-07-17 00:24:15 +00:00
Alex Lorenz
b3441a0f38 MIR Serialization: Serialize the frame index machine operands.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242487
2015-07-16 23:37:45 +00:00
Cong Hou
9e8d1a2460 Add new constructors for LoopInfo/DominatorTree/BFI/BPI
Those new constructors make it more natural to construct an object for a function. For example, previously to build a LoopInfo for a function, we need four statements:

DominatorTree DT;
LoopInfo LI;
DT.recalculate(F);
LI.analyze(DT);

Now we only need one statement:

LoopInfo LI(DominatorTree(F));

http://reviews.llvm.org/D11274

llvm-svn: 242486
2015-07-16 23:23:35 +00:00
Matthias Braun
fbe0089d74 Arm: Don't define a label twice with two setjmps in a function.
Constructing a name based on the function name didn't give us a unique
symbol if we had more than one setjmp in a function. Using
MCContext::createTempSymbol() always gives us a unique name.

Differential Revision: http://reviews.llvm.org/D9314

llvm-svn: 242482
2015-07-16 22:34:20 +00:00
Matthias Braun
f00b5af3eb Fix __builtin_setjmp in combination with sjlj exception handling.
llvm.eh.sjlj.setjmp was used as part of the SjLj exception handling
style but is also used in clang to implement __builtin_setjmp.  The ARM
backend needs to output additional dispatch tables for the SjLj
exception handling style, these tables however can't be emitted if
llvm.eh.sjlj.setjmp is simply used for __builtin_setjmp and no actual
landing pad blocks exist.

To solve this issue a new llvm.eh.sjlj.setup_dispatch intrinsic is
introduced which is used instead of llvm.eh.sjlj.setjmp in the SjLj
exception handling lowering, so we can differentiate between the case
where we actually need to setup a dispatch table and the case where we
just need the __builtin_setjmp semantic.

Differential Revision: http://reviews.llvm.org/D9313

llvm-svn: 242481
2015-07-16 22:34:16 +00:00
Mehdi Amini
6678a399ab Fix ffiInvoke() use of DataLayout, broken in 242414
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 242456
2015-07-16 22:23:09 +00:00
Sanjoy Das
780517da42 [SCEV][NFC] Use triple-slash (///) for comment.
Makes the comments for proveNoWrapByVaryingStart consistent with the
rest of ScalarEvolution.h

llvm-svn: 242451
2015-07-16 22:08:37 +00:00
Simon Pilgrim
cfd83bb179 Fix spelling. NFCI.
llvm-svn: 242448
2015-07-16 21:44:53 +00:00
Tim Northover
b07439e7ad AArch64: make inexact signalling on round Darwin-specific
C11 leaves the choice on whether round-to-integer operations set the inexact
flag implementation-defined. Darwin does expect it to be set, but this seems to
be against the intent of the IEEE document and slower to implement anyway. So
it should be opt-in.

llvm-svn: 242446
2015-07-16 21:30:21 +00:00
Simon Pilgrim
4c670f2794 [X86][SSE] Added nounwind attribute to vector shift tests.
Stop i686 codegen from generating cfi directives.

llvm-svn: 242443
2015-07-16 21:14:26 +00:00
Bill Schmidt
af026989c7 [PowerPC] v4i32 is a VSRCRegClass
I was looking at some vector code generation and kept seeing
unnecessary vector copies into the Altivec half of the VSX registers.
I discovered that we overlooked v4i32 when adding the register classes
for VSX; we only added v4f32 and v2f64.  This means that anything that
canonicalizes into v4i32 (which is a LOT of stuff) ends up being
forced into VRRC on its way to VSRC.

The fix is one line.  The rest of the patch is fixing up some test
cases whose code generation has changed as a result.

This seems like it would be a good candidate for backport to 3.7.

llvm-svn: 242442
2015-07-16 21:14:07 +00:00
Philip Reames
bd417e52c5 List supported architectures for StackMap section and related intrinsics
Not having this documented led to some confusion in a recent review thread.

llvm-svn: 242441
2015-07-16 21:10:46 +00:00
Simon Pilgrim
466e395dc0 [X86][SSE] Updated vector conversion test names.
I'll be adding further tests shortly so need a more thorough naming convention.

llvm-svn: 242440
2015-07-16 21:00:57 +00:00
Eli Bendersky
59b16e2ab4 Streamline the coding style in NVPTXLowerAggrCopies
Make the style consistent with LLVM style throughout and clang-format.

llvm-svn: 242439
2015-07-16 20:42:38 +00:00
Matthias Braun
810eff0106 MachineInstr: Explain the subtle semantics of uses()/defs()
llvm-svn: 242438
2015-07-16 20:27:01 +00:00
Jingyue Wu
e11ca7270f [NVPTX] enable SpeculativeExecution in NVPTX
Summary:
SpeculativeExecution enables a series straight line optimizations (such
as SLSR and NaryReassociate) on conditional code. For example,

  if (...)
    ... b * s ...
  if (...)
    ... (b + 1) * s ...

speculative execution can hoist b * s and (b + 1) * s from then-blocks,
so that we have

  ... b * s ...
  if (...)
    ...
  ... (b + 1) * s ...
  if (...)
    ...

Then, SLSR can rewrite (b + 1) * s to (b * s + s) because after
speculative execution b * s dominates (b + 1) * s.

The performance impact of this change is significant. It speeds up the
benchmarks running EigenFloatContractionKernelInternal16x16
(ba68f42fa6/unsupported/Eigen/CXX11/src/Tensor/TensorContractionCuda.h (cl-526))
by roughly 2%. Some internal benchmarks that have the above code pattern
are improved by up to 40%. No significant slowdowns are observed on
Eigen CUDA microbenchmarks.

Reviewers: jholewinski, broune, eliben

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11201

llvm-svn: 242437
2015-07-16 20:13:48 +00:00
Matthias Braun
0a9f87ba79 AArch64: Implement conditional compare sequence matching.
This is a new iteration of the reverted r238793 /
http://reviews.llvm.org/D8232 which wrongly assumed that any and/or
trees can be represented by conditional compare sequences, however there
are some restrictions to that. This version fixes this and adds comments
that explain exactly what types of and/or trees can actually be
implemented as conditional compare sequences.

Related to http://llvm.org/PR20927, rdar://18326194

Differential Revision: http://reviews.llvm.org/D10579

llvm-svn: 242436
2015-07-16 20:02:37 +00:00
Tom Stellard
d96b39afde AMDPGU/SI: Negative offsets aren't allowed in MUBUF's vaddr operand
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11226

llvm-svn: 242434
2015-07-16 19:40:09 +00:00
Tom Stellard
718e3450df AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
Summary:
We can safely assume that the high bit of scratch offsets will never
be set, because this would require at least 128 GB of GPU memory.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11225

llvm-svn: 242433
2015-07-16 19:40:07 +00:00
Matthias Braun
2b7092f0dc LiveInterval: Document and enforce rules about empty subranges.
Empty subranges are not allowed in a LiveInterval and must be removed
instead: Check this in the verifiers, put a reminder for this in the
comment of the shrinkToUses variant for a single lane and make it
automatic for the shrinkToUses variant for a LiveInterval.

llvm-svn: 242431
2015-07-16 18:55:35 +00:00
Matthias Braun
98cc760cb6 Do not duplicate method name in comment, remove duplicate comment
llvm-svn: 242430
2015-07-16 18:55:32 +00:00
Rafael Espindola
0901f8e543 Delete an unused function.
Patch by Xan López!

llvm-svn: 242429
2015-07-16 18:41:41 +00:00
Pete Cooper
d871542c52 Revert "Add missing load/store flags to thumb2 instructions."
This reverts commit r242300.

This is causing buildbot failures which we are investigating.
I'll reapply once we know whats going on, but for now want to
get the bots green.

llvm-svn: 242428
2015-07-16 18:38:13 +00:00
Cong Hou
bd3b6b651a Rename LoopInfo::Analyze() to LoopInfo::analyze() and turn its parameter type to const&.
The benefit of turning the parameter of LoopInfo::analyze() to const& is that it now can accept a rvalue.

http://reviews.llvm.org/D11250

llvm-svn: 242426
2015-07-16 18:23:57 +00:00
Peter Collingbourne
0d8bc759d0 Internalize: internalize comdat members as a group, and drop comdat on such members.
Internalizing an individual comdat group member without also internalizing
the other members of the comdat can break comdat semantics. For example,
if a module contains a reference to an internalized comdat member, and the
linker chooses a comdat group from a different object file, this will break
the reference to the internalized member.

This change causes the internalizer to only internalize comdat members if all
other members of the comdat are not externally visible. Once a comdat group
has been fully internalized, there is no need to apply comdat rules to its
members; later optimization passes (e.g. globaldce) can legally drop individual
members of the comdat. So we drop the comdat attribute from all comdat members.

Differential Revision: http://reviews.llvm.org/D10679

llvm-svn: 242423
2015-07-16 17:42:21 +00:00
Benjamin Kramer
60ea17723f [NVPTX] Don't leak dead instructions after unlinking them from the BasicBlock
llvm-svn: 242417
2015-07-16 16:51:48 +00:00
Mehdi Amini
fa35697f02 Fix Kaleidoscope tuto: ExecutionEngine->getDataLayout() returns a ref
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 242416
2015-07-16 16:47:18 +00:00
Mehdi Amini
b1449ffcc8 Make ExecutionEngine owning a DataLayout
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

The ExecutionEngine will act as an exception and will be unsafe to
be reused across context. We don't enforce this rule but undefined
behavior can occurs if the user tries to do it.

Reviewers: lhames

Subscribers: echristo, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11110

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 242414
2015-07-16 16:34:23 +00:00
Eli Bendersky
901c8f80fc Correct lowering of memmove in NVPTX
This fixes https://llvm.org/bugs/show_bug.cgi?id=24056

Also a bit of refactoring along the way.

Differential Revision: http://reviews.llvm.org/D11220

llvm-svn: 242413
2015-07-16 16:27:19 +00:00
Tom Stellard
d16c446389 AMDGPU/R600: Remove unused variable
This fixes a warning introduced by r242410.

llvm-svn: 242412
2015-07-16 16:13:34 +00:00
Tom Stellard
6ee5852b02 AMDPGU/R600: Replace llvm_unreachable() call with LLVMContext::emitError()
Summary:
This fixes an issue on MIPS where the infinite-loop-evergreen.ll test
was failing to terminate.

Fixes PR24147.

Reviewers: arsenm, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11260

llvm-svn: 242410
2015-07-16 15:38:29 +00:00