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Commit Graph

156715 Commits

Author SHA1 Message Date
Simon Dardis
f6b523e7ac [mips][mt] Add missing test cases from r318207
llvm-svn: 318389
2017-11-16 10:50:44 +00:00
Benjamin Kramer
5b50192eda Assert correct removal of SUnit in LatencyPriorityQueue
The LatencyPriorityQueue doesn't currently check whether the SU being removed really exists in the Queue.
This method fails quietly when SU is not found and removes the last element from the Queue, leading to unexpected behavior.

Unfortunately, this only occurs on our custom target, with the custom scheduler. In our case, when remove() is invoked, it removes the wrong SU at the end of the Queue, which is only discovered later when VerifyScheduledDAG() is invoked and finds that some nodes were not scheduled at all.

As this is only reproducible with a lot of proprietary code, I'm hopeful this assert is straightforward enough to not necessitate a test.

Patch by Ondrej Glasnak!

Differential Revision: https://reviews.llvm.org/D40084

llvm-svn: 318387
2017-11-16 10:18:07 +00:00
Mohammed Agabaria
aed9eba03d [TTI][X86] update costs of interleaved load\store of i64\double
This patch contains more accurate cost of interelaved load\store of stride 2 for the types int64\double on AVX2.

Reviewers: delena, RKSimon, craig.topper, dorit

Reviewed By: dorit

Differential Revision: https://reviews.llvm.org/D40008

llvm-svn: 318385
2017-11-16 09:38:32 +00:00
Mikael Holmen
3b15d9b288 [MachineRegisterInfo] Avoid having dbg.values affect code generation
Summary:
Use use_nodbg_empty() rather than use_empty() in
MachineRegisterInfo::EmitLiveInCopies() when determining if a livein
register has any uses or not. Otherwise a single dbg.value can make us
generate different code, meaning -g would affect code generation.

Found when compiling code for my out-of-tree target. Unfortunately I
haven't been able to reproduce the problem on X86 or any of the other
in-tree targets that I tried, so no test case.

Reviewers: MatzeB

Reviewed By: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39044

llvm-svn: 318382
2017-11-16 07:01:23 +00:00
Max Kazantsev
4a3238b17b [IRCE] Fix SCEVExpander's usage in IRCE
When expanding exit conditions for pre- and postloops, we may end up expanding a
recurrency from the loop to in its loop's preheader. This produces incorrect IR.

This patch ensures that IRCE uses SCEVExpander correctly and only expands code which
is safe to expand in this particular location.

Differentian Revision: https://reviews.llvm.org/D39234

llvm-svn: 318381
2017-11-16 06:06:27 +00:00
Craig Topper
7346e8250d [X86] Update TTI to report that v1iX/v1fX types aren't legal for masked gather/scatter/load/store.
The type legalizer will try to scalarize these operations if it sees them, but there is no handling for scalarizing them. This leads to a fatal error. With this change they will now be scalarized by the mem intrinsic scalarizing pass before SelectionDAG.

llvm-svn: 318380
2017-11-16 06:02:05 +00:00
Craig Topper
ec4cab03b9 [SelectionDAG] Use report_fatal_error instead of llvm_unreachable in some code that can be reached if targets don't configure things correctly.
For example, this is currently reachable by X86 if you use a masked store intrinsic with a v1iX type.

Using a fatal error seems like a better user experience if someone were to encounter this on a release build. There are several other similar places that have been converted from unreachable to fatal error previously.

llvm-svn: 318379
2017-11-16 06:02:03 +00:00
Max Kazantsev
b69919b5fd [SCEV][NFC] Introduce isSafeToExpandAt function to SCEVExpander
This function checks that:
1) It is safe to expand a SCEV;
2) It is OK to materialize it at the specified location.
For example, attempt to expand a loop's AddRec to the same loop's preheader should fail.

Differential Revision: https://reviews.llvm.org/D39236

llvm-svn: 318377
2017-11-16 05:10:56 +00:00
Eric Christopher
3cb028557c Fix thinko in last commit.
llvm-svn: 318374
2017-11-16 03:25:02 +00:00
Eric Christopher
42cba5c5cb Add NDEBUG checks around LLVM_DUMP_METHOD functions for Wunused-function warnings.
llvm-svn: 318373
2017-11-16 03:18:15 +00:00
Eric Christopher
41da73a555 Need to work around the gcc Wunused-function bug as far back as gcc 6.1, update accordingly.
llvm-svn: 318372
2017-11-16 03:18:13 +00:00
Yaxun Liu
482825c438 Fix APInt bit size in processDbgDeclares
processDbgDeclares assumes pointer size is the same for different addr spaces.
It uses pointer size for addr space 0 for all pointers, which causes assertion
in stripAndAccumulateInBoundsConstantOffsets for amdgcn---amdgiz since
pointer in addr space 5 has different size than in addr space 0.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D40085

llvm-svn: 318370
2017-11-16 02:54:49 +00:00
Evgeniy Stepanov
5820f2fc39 [asan] Fallback to non-ifunc dynamic shadow on android<22.
Summary: Android < 22 does not support ifunc.

Reviewers: pcc

Subscribers: srhines, kubamracek, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40116

llvm-svn: 318369
2017-11-16 02:52:19 +00:00
Craig Topper
fe779dbf15 [X86] Custom type legalize v2f32 masked gathers instead of trying to cleanup after type legalization.
llvm-svn: 318368
2017-11-16 02:07:45 +00:00
Bob Haarman
af957b937e LTO: clarify why we need to gracefully handle sys::fs::rename failures
Reviewers: pcc, rafael

Reviewed By: pcc

Subscribers: mehdi_amini, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D40094

llvm-svn: 318362
2017-11-16 01:16:52 +00:00
Rafael Espindola
8186c8ab68 Convert a use of createUniqueFile to TempFile::create.
llvm-svn: 318361
2017-11-16 01:06:36 +00:00
Yonghong Song
d4b87d9fc8 bpf: enable llvm-objdump to print out symbolized jmp target
Add hook in BPF backend so that llvm-objdump can print out
the jmp target with label names, e.g.,
  ...
  if r1 != 2 goto 6 <LBB0_2>
  ...
  goto 7 <LBB0_4>
  ...
 LBB0_2:
  ...
 LBB0_4:
  ...

Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 318358
2017-11-16 00:52:30 +00:00
Daniel Sanders
f521e30212 [globalisel][tablegen] Generate rule coverage and use it to identify untested rules
Summary:
This patch adds a LLVM_ENABLE_GISEL_COV which, like LLVM_ENABLE_DAGISEL_COV,
causes TableGen to instrument the generated table to collect rule coverage
information. However, LLVM_ENABLE_GISEL_COV goes a bit further than
LLVM_ENABLE_DAGISEL_COV. The information is written to files
(${CMAKE_BINARY_DIR}/gisel-coverage-* by default). These files can then be
concatenated into ${LLVM_GISEL_COV_PREFIX}-all after which TableGen will
read this information and use it to emit warnings about untested rules.

This technique could also be used by SelectionDAG and can be further
extended to detect hot rules and give them priority over colder rules.

Usage:
* Enable LLVM_ENABLE_GISEL_COV in CMake
* Build the compiler and run some tests
* cat gisel-coverage-[0-9]* > gisel-coverage-all
* Delete lib/Target/*/*GenGlobalISel.inc*
* Build the compiler

Known issues:
* ${LLVM_GISEL_COV_PREFIX}-all must be generated as a manual
  step due to a lack of a portable 'cat' command. It should be the
  concatenation of all ${LLVM_GISEL_COV_PREFIX}-[0-9]* files.
* There's no mechanism to discard coverage information when the ruleset
  changes

Depends on D39742

Reviewers: ab, qcolombet, t.p.northover, aditya_nandakumar, rovka

Reviewed By: rovka

Subscribers: vsk, arsenm, nhaehnle, mgorny, kristof.beyls, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D39747

llvm-svn: 318356
2017-11-16 00:46:35 +00:00
Reid Kleckner
244630215c Try to fix WebAssembly build after r318352
llvm-svn: 318355
2017-11-16 00:32:19 +00:00
Craig Topper
b7aaba0874 [GVNHoist] Fix a signed/unsigned comparison warning that occurs in 32-bit builds with gcc.
std::distance returns ptrdiff_t which is signed. 64-bit builds don't notice because type promotion widens the unsigned first.

llvm-svn: 318354
2017-11-16 00:19:59 +00:00
Rong Xu
3783277be4 [CodeGen] Fix the branch probability assertion in r318202
Due to integer precision, we might have numerator greater than denominator in
the branch probability scaling. Add a check to prevent this from happening.

llvm-svn: 318353
2017-11-16 00:14:05 +00:00
Daniel Sanders
6503157726 Add backend name to Target to enable runtime info to be fed back into TableGen
Summary:
Make it possible to feed runtime information back to tablegen to enable
profile-guided tablegen-eration, detection of untested tablegen definitions, etc.

Being a cross-compiler by nature, LLVM will potentially collect data for multiple
architectures (e.g. when running 'ninja check'). We therefore need a way for
TableGen to figure out what data applies to the backend it is generating at the
time. This patch achieves that by including the name of the 'def X : Target ...'
for the backend in the TargetRegistry.

Reviewers: qcolombet

Reviewed By: qcolombet

Subscribers: jholewinski, arsenm, jyknight, aditya_nandakumar, sdardis, nemanjai, ab, nhaehnle, t.p.northover, javed.absar, qcolombet, llvm-commits, fedor.sergeev

Differential Revision: https://reviews.llvm.org/D39742

llvm-svn: 318352
2017-11-15 23:55:44 +00:00
Evandro Menezes
ee25897122 [AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of FP stores.

llvm-svn: 318351
2017-11-15 23:49:58 +00:00
Aditya Nandakumar
a6c4884cb1 [GISel][NFC]: Move getOpcodeDef from the LegalizationArtifactCombiner into GlobalISel/Utils for use elsewhere
llvm-svn: 318350
2017-11-15 23:45:04 +00:00
Sanjay Patel
0f6b54159f [InstCombine] add sub narrowing tests; NFC
This might be the root cause of PR35295:
https://bugs.llvm.org/show_bug.cgi?id=35295

llvm-svn: 318342
2017-11-15 22:19:55 +00:00
Matt Arsenault
e4ccb8ba03 AMDGPU: Replace i64 add/sub lowering
Use VOP3 add/addc like usual.

This has some tradeoffs. Inline immediates fold
a little better, but other constants are worse off.
SIShrinkInstructions could be made smarter to handle
these cases.

This allows us to avoid selecting scalar adds where we
need to track the carry in scc and replace its users.
This makes it easier to use the carryless VALU adds.

llvm-svn: 318340
2017-11-15 21:51:43 +00:00
Dan Gohman
8f3e512189 [WebAssembly] Update cfg-stackify.ll to remove the workaround added in r318288.
Remove -switch-peel-threshold=100 and update the expected results in test10
in cfg-stackify.ll.

llvm-svn: 318338
2017-11-15 21:38:33 +00:00
Evandro Menezes
b81553263f [AArch64] Refactor the loads and stores optimizer
Move remaining inline matching of instructions of some optimizations into
separate functions, like in the other optimizations.  Otherwise, NFC.

Differential revision: https://reviews.llvm.org/D40090

llvm-svn: 318335
2017-11-15 21:06:22 +00:00
Rafael Espindola
df81e5d550 Simplify file handling in dsymutil.
This moves the file handling out of DwarfLinker.cpp.

This fixes what is at least an oddity if not a bug. DwarfLinker.cpp
was using ToolOutputFile, which uses RemoveFileOnSignal. The issue is
that dsymutil.cpp uses that too. It is now clear from the interface
that only dsymutil.cpp is responsible for creating and deleting files.

llvm-svn: 318334
2017-11-15 20:55:53 +00:00
Craig Topper
95d3c686a5 [X86] Add some explanatory comments to the ProcessorFeatures enum in Host.cpp.
llvm-svn: 318331
2017-11-15 20:42:49 +00:00
Craig Topper
b6b01e9936 [X86] Add a return to the end of a switch to prevent an accidental fallthrough in the future.
llvm-svn: 318330
2017-11-15 20:42:47 +00:00
Jake Ehrlich
20e541caa9 [llvm-objcopy] Change -O binary to respect section removal and behave like GNU objcopy
The original -O binary implementation just copied segment data from the
object and dumped it into a file. This doesn't take into account any
operations performed on objects such as section removal. GNU objcopy has
some specific behavior that we'd also like to respect. For instance
using -O binary and -j <some_section> will dump <some_section> to a
file. This change implements GNU objcopy style -O binary to as close of
an approximation as I can determine.

Differential Revision: https://reviews.llvm.org/D39713

llvm-svn: 318324
2017-11-15 19:13:31 +00:00
Sanjay Patel
d0c3452c1c [InstCombine] trunc (binop X, C) --> binop (trunc X, C')
Note that one-use and shouldChangeType() are checked ahead of the switch.

Without the narrowing folds, we can produce inferior vector code as shown in PR35299:
https://bugs.llvm.org/show_bug.cgi?id=35299

llvm-svn: 318323
2017-11-15 19:12:01 +00:00
Rafael Espindola
80b0b1837b Use TempFile in lto caching.
This requires a small change to TempFile: allowing a discard after a
failed keep.

With this the cache now handles signals and reuses a fd instead of
reopening the file.

llvm-svn: 318322
2017-11-15 19:09:22 +00:00
Sean Fertile
88680a74ac [PowerPC] Implement mayBeEmittedAsTailCall for PPC
Implements TargetLowering callback 'mayBeEmittedAsTailCall' that enables
CodeGenPrepare to duplicate returns when they might enable a tail-call.

Differential Revision: https://reviews.llvm.org/D39777

llvm-svn: 318321
2017-11-15 18:58:27 +00:00
Reid Kleckner
b527562cd4 [InstCombine] Salvage debug info during initial DCE
InstCombine salvages debug info for every instruction it erases from its
worklist, but it wasn't doing it during its initial DCE when populating
its worklist. This fixes that.

This should help improve availability of 'this' in optimized debug info
when casts are necessary.

llvm-svn: 318320
2017-11-15 18:51:12 +00:00
Sanjay Patel
1d82d52db7 [InstCombine] add tests for missing trunc folds; NFC
As noted in PR35299:
https://bugs.llvm.org/show_bug.cgi?id=35299
...this is likely the root cause for a mis-vectorization transform.

llvm-svn: 318319
2017-11-15 18:09:43 +00:00
Vedant Kumar
969fd3b155 [docs] Mention opt -metarenamer in the bugpoint docs
Thanks to arsenm and davide for the suggestion!

llvm-svn: 318318
2017-11-15 18:05:19 +00:00
Evandro Menezes
afc0e3dbbc [AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of loads and stores using the pre or post indexed
addressing modes.

llvm-svn: 318312
2017-11-15 17:39:37 +00:00
Simon Pilgrim
04a7c8e081 [X86] Add CBW/CDQ/CDQE/CQO/CWD/CWDE to WriteALU schedule class
Some CPUs are already overriding these sign extension instructions but we should be able to use the WriteALU schedule class by default.

Differential Revision: https://reviews.llvm.org/D39899

llvm-svn: 318308
2017-11-15 17:11:24 +00:00
Adam Nemet
01d159b6a1 [SLP] Added more missed optimization remarks
Summary:
Added more remarks to SLP pass, in particular "missed" optimization remarks.
Also proposed several tests for new functionality.

Patch by Vladimir Miloserdov!

For reference you may look at: https://reviews.llvm.org/rL302811

Reviewers: anemet, fhahn

Reviewed By: anemet

Subscribers: javed.absar, lattner, petecoup, yakush, llvm-commits

Differential Revision: https://reviews.llvm.org/D38367

llvm-svn: 318307
2017-11-15 17:04:53 +00:00
Sean Fertile
71ec02692c [PowerPC] Split out the tailcall calling convention checks. NFC.
Move the calling convention checks for tail-call eligibility for the 64-bit
SysV ABI into a separate function. This is so that it can be shared with
'mayBeEmittedAsTailCall' in a subsequent change.

llvm-svn: 318305
2017-11-15 16:53:41 +00:00
Sanjay Patel
852b9d1ff8 [PassManager, SimplifyCFG] add test for PR34603 / D38566; NFC
This is a recommit of r316908 which was reverted by r317444.

llvm-svn: 318300
2017-11-15 16:37:30 +00:00
Sanjay Patel
dc0444504e [(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
This is a recommit of r316869 which was speculatively reverted with r317444 and 
subsequently shown to not be the cause of PR35210. That crash should be fixed
after r318237.

Original commit message:

The old PM sets the options of what used to be known as "latesimplifycfg" on the
instantiation after the vectorizers have run, so that's what we'redoing here.

FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not
set the "late" options. I'm not sure if that's intentional or not.

Differential Revision: https://reviews.llvm.org/D39407

llvm-svn: 318299
2017-11-15 16:33:11 +00:00
Sanjay Patel
7b98bb7dd7 [Reassociate] simplify code; NFCI
llvm-svn: 318298
2017-11-15 16:19:17 +00:00
Sander de Smalen
ffa5657a2b [AArch64][SVE] Asm: Report SVE parsing diagnostics only once
Summary:
Prevent an issue where a diagnostic is reported multiple times by bailing out with a ParseFail if an invalid SVE register element qualifier/suffix is specified, for example:

 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
                 ^
 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
 
 ...
 
 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
                 ^


Reviewers: fhahn, rengolin

Reviewed By: rengolin

Subscribers: aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D39894

llvm-svn: 318297
2017-11-15 15:44:43 +00:00
Petar Jovanovic
0557171790 [mips] Improve genConstMult() to work with arbitrary precision
APInt is now used instead of uint64_t in function genConstMult() allowing
multiplication optimizations with constants of arbitrary length.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D38130

llvm-svn: 318296
2017-11-15 15:24:04 +00:00
Igor Laevsky
865a89cfe5 [llvm-opt-fuzzer] Add opt fuzzer to the test-depends list.
This should help with the buildbot failures after rL318293.

llvm-svn: 318295
2017-11-15 15:07:37 +00:00
Igor Laevsky
06ce871e09 [llvm-opt-fuzzer] Only run tests for the x86 target.
This fixes build bot failures after rL318293.

llvm-svn: 318294
2017-11-15 13:35:42 +00:00
Igor Laevsky
1025a5098b [llvm-opt-fuzzer] NFC. Add sanity tests.
llvm-svn: 318293
2017-11-15 12:36:57 +00:00