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42324 Commits

Author SHA1 Message Date
Jim Grosbach
f93e92a4c1 Grammar tweak. 
llvm-svn: 116712
 2010-10-18 16:38:50 +00:00
Rafael Espindola
4a7459403a Handle GOTOFF correctly on i386. 
llvm-svn: 116711
 2010-10-18 16:38:04 +00:00
Jim Grosbach
315bb0cf2b Trivial grammar tweak. 
llvm-svn: 116710
 2010-10-18 16:29:26 +00:00
Kalle Raiskila
3cdfdd9383 Improve lowering of sext to i128 on SPU. 
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.

llvm-svn: 116701
 2010-10-18 09:34:19 +00:00
Eric Christopher
e453bd6697 Remove the check for invalid calling conventions. Testing shows that they're 
working just fine.

llvm-svn: 116698
 2010-10-18 06:49:12 +00:00
Eric Christopher
6287738105 Lift arg promotion from the X86 backend. This should be unified at some point. 
llvm-svn: 116694
 2010-10-18 02:17:53 +00:00
Eric Christopher
79c2206640 Now that we handle all allocas via a non-SP reg offset remove all of the 
special case handling for ARM::SP.

llvm-svn: 116688
 2010-10-17 11:08:44 +00:00
Benjamin Kramer
9248e59b35 std::string cleanup. 
llvm-svn: 116686
 2010-10-17 07:39:34 +00:00
Benjamin Kramer
e8c2e82a84 Fix a typo and silence unused variable warnings in -Asserts build. 
llvm-svn: 116685
 2010-10-17 07:38:40 +00:00
Eric Christopher
d99f79f92b Allow more load types to be materialized through the allocas. 
llvm-svn: 116683
 2010-10-17 06:07:26 +00:00
Oscar Fuentes
a6ffccab95 Build with RTTI and exceptions disabled. Only in GCC for now. 
llvm-svn: 116682
 2010-10-17 02:26:16 +00:00
Eric Christopher
5fcaab5d0e Optimize GEP off of intermediate allocas. 
llvm-svn: 116681
 2010-10-17 01:51:42 +00:00
Eric Christopher
20bbcbeceb Fix comment. 
llvm-svn: 116680
 2010-10-17 01:42:53 +00:00
Eric Christopher
d9b4b47b9a Turn on AddOperator folding in GEP. 
llvm-svn: 116679
 2010-10-17 01:41:46 +00:00
Eric Christopher
490f82bc32 Use the i12 immediate versions of the load instructions - they're handled 
more in the post-passes.

llvm-svn: 116678
 2010-10-17 01:40:27 +00:00
Rafael Espindola
be5c52d2dc Add a MCObjectFormat class so that code common to all targets that use a 
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675
 2010-10-16 18:23:53 +00:00
Benjamin Kramer
a0e156fe6d Eliminate some calls to Value::getNameStr. 
llvm-svn: 116670
 2010-10-16 11:28:23 +00:00
Michael J. Spencer
f9a7c39ecc MC-COFF: Add support for default-null weak externals. 
llvm-svn: 116666
 2010-10-16 08:25:57 +00:00
Michael J. Spencer
e57b670425 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 
if any floating point arguments are passed to an external function.

llvm-svn: 116665
 2010-10-16 08:25:41 +00:00
Michael J. Spencer
16ad2c129c Whitespace! 
llvm-svn: 116664
 2010-10-16 08:25:21 +00:00
Daniel Dunbar
fedc37ce15 MC/AsmParser: Report .stabs directive as unsupported. 
llvm-svn: 116659
 2010-10-16 04:56:42 +00:00
Evan Cheng
5bd7971922 More machine LICM work. It now tracks register pressure for path from preheader to current BB and use the information determine whether hoisting is worthwhile. 
llvm-svn: 116654
 2010-10-16 02:20:26 +00:00
Eric Christopher
98c6ce755a Fix some funky formatting that got through. 
llvm-svn: 116653
 2010-10-16 01:10:35 +00:00
Bill Wendling
8e4ceb45f2 ARMCodeEmitter::emitMiscInstruction is dead. Long live 
ARMCodeEmitter::emitMiscInstruction!

llvm-svn: 116644
 2010-10-15 23:35:12 +00:00
Eric Christopher
69eaf30a42 Make sure offset is 0 for load/store register to the stack call. 
llvm-svn: 116640
 2010-10-15 23:07:10 +00:00
Owen Anderson
4373b4516b Generalize MemCpyOpt's handling of call slot forwarding to function properly when the call slot 
forwarding is implemented with a load/store pair rather than a memcpy.

llvm-svn: 116637
 2010-10-15 22:52:12 +00:00
Eric Christopher
c6e4aaec0a Formatting. 
llvm-svn: 116635
 2010-10-15 22:49:28 +00:00
Eric Christopher
7f8c3dff07 Fix else if -> if in store machinery. 
llvm-svn: 116628
 2010-10-15 22:32:37 +00:00
Bill Wendling
64d2bf006c Reformatting. No functionalogicality changes. 
llvm-svn: 116625
 2010-10-15 21:50:45 +00:00
Eric Christopher
a875589580 Refactor ARM fast-isel reg + offset to be a base + offset. 
llvm-svn: 116622
 2010-10-15 21:32:12 +00:00
Jim Grosbach
5d7a5f8d33 Encoding information for the various ARM saturating add/sub instructions. 
llvm-svn: 116612
 2010-10-15 19:49:46 +00:00
Jim Grosbach
785858b2ba ARM binary encoding information for RSB and RSC instructions. 
llvm-svn: 116604
 2010-10-15 18:42:41 +00:00
Jim Grosbach
440b0e6b34 Don't mark argument value stores as immutable, as otherwise the post-RA 
scheduler may reorder loads from them before the stores and other such
badness. PR8347. Patch by David Meyer

llvm-svn: 116602
 2010-10-15 18:34:47 +00:00
Bob Wilson
3b63270ed3 Use simple RegState::Define flag instead of getDefRegState(true). 
llvm-svn: 116601
 2010-10-15 18:25:59 +00:00
Rafael Espindola
125360f835 Refactor alias handling to AliasedSymbol. 
llvm-svn: 116600
 2010-10-15 18:25:33 +00:00
Eric Christopher
b287ab82d7 Expand GEP handling for constant offsets. 
llvm-svn: 116594
 2010-10-15 18:02:07 +00:00
Jim Grosbach
cb52aee60e When expanding the MOVsr[la]_flag pseudos, the CPSR implicit def becomes 
an explicit def. Make sure to capture that properly. rdar://8556556

llvm-svn: 116591
 2010-10-15 17:35:17 +00:00
Jim Grosbach
67f94c42d8 ARM mode encoding information for UBFX and SBFX instructions. 
llvm-svn: 116588
 2010-10-15 17:15:16 +00:00
Jakob Stoklund Olesen
05c010aa88 Remove unused accessor. 
llvm-svn: 116580
 2010-10-15 16:06:40 +00:00
Rafael Espindola
9b114d966a Refactor code a bit and avoid creating unnecessary entries in the string 
map.

llvm-svn: 116579
 2010-10-15 15:39:06 +00:00
Bob Wilson
6b6b53ad6f Remove unused ARMISD::AND selection DAG node. 
llvm-svn: 116566
 2010-10-15 04:34:40 +00:00
Bob Wilson
fcc42f2f3a ARM instructions that are both predicated and set the condition codes 
have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!

llvm-svn: 116563
 2010-10-15 03:23:44 +00:00
Jim Grosbach
b01bcbd047 Encoding info for extension instructions. 
llvm-svn: 116560
 2010-10-15 02:29:58 +00:00
Jakob Stoklund Olesen
b569fb0904 Eliminate curli from SplitEditor. Use the LiveRangeEdit reference instead. 
llvm-svn: 116547
 2010-10-15 00:34:01 +00:00
Jakob Stoklund Olesen
5d5bcb8ee4 Move stack slot assignments into LiveRangeEdit. 
All registers created during splitting or spilling are assigned to the same
stack slot as the parent register.

When splitting or rematting, we may not spill at all. In that case the stack
slot is still assigned, but it will be dead.

llvm-svn: 116546
 2010-10-15 00:16:55 +00:00
Jakob Stoklund Olesen
acca65b973 Create a new LiveRangeEdit class to keep track of the new registers created when 
splitting or spillling, and to help with rematerialization.

Use LiveRangeEdit in InlineSpiller and SplitKit. This will eventually make it
possible to share remat code between InlineSpiller and SplitKit.

llvm-svn: 116543
 2010-10-14 23:49:52 +00:00
Jim Grosbach
6da1b52d7b Add missing Rd encoding for MOVs instruction. 
llvm-svn: 116537
 2010-10-14 23:28:31 +00:00
Jim Grosbach
804505c7d4 Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos 
and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

llvm-svn: 116534
 2010-10-14 22:57:13 +00:00
Dan Gohman
d93278f6b6 Tolerate a null parent pointer. 
llvm-svn: 116533
 2010-10-14 22:55:57 +00:00
Jim Grosbach
29dc23398f Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' 
pseudonym.

llvm-svn: 116512
 2010-10-14 20:43:44 +00:00