RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
Code Issues Projects Releases Wiki Activity
65,820 Commits 4 Branches 5 Tags 704 MiB
f93e92a4c1
Commit Graph

42324 Commits

Author SHA1 Message Date
Bob Wilson
8689a52c10 Change register allocation order for ARM VFP and NEON registers to put the 
callee-saved registers at the end of the lists.  Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases.  Thanks to
Jakob for helping me realize the problem.

Most of this patch is fixing the testsuite.  There are quite a few places
where we're checking for specific registers.  I changed those to wildcards
in places where that doesn't weaken the tests.  The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.

llvm-svn: 116055
 2010-10-08 06:15:13 +00:00
Chris Lattner
244e13f439 fix a subtle bug I introduced in my refactoring, where we stopped preferring 
the i8 versions of instructions in some cases.  In test6, we started 
generating:

	cmpq	$0, -8(%rsp)            ## encoding: [0x48,0x81,0x7c,0x24,0xf8,0x00,0x00,0x00,0x00]
                                        ## <MCInst #478 CMP64mi32
                                        ##  <MCOperand Reg:114>
                                        ##  <MCOperand Imm:1>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:-8>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:0>>

instead of:

	cmpq	$0, -8(%rsp)            ## encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
                                        ## <MCInst #479 CMP64mi8
                                        ##  <MCOperand Reg:114>
                                        ##  <MCOperand Imm:1>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:-8>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:0>>

Fix this and add some comments.

llvm-svn: 116053
 2010-10-08 05:12:14 +00:00
Chris Lattner
82ce325f16 reapply: Use the new TB_NOT_REVERSABLE flag instead of special 
reapply: reimplement the second half of the or/add optimization.  We should now

with no changes.  Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.

llvm-svn: 116040
 2010-10-08 03:57:25 +00:00
Chris Lattner
fbdd285dd6 reapply the patch reverted in r116033: 
"Reimplement (part of) the or -> add optimization.  Matching 'or' into 'add'"

With a critical fix: the add pseudos clobber EFLAGS.

llvm-svn: 116039
 2010-10-08 03:54:52 +00:00
Daniel Dunbar
8b2890afae Update CMake. 
llvm-svn: 116034
 2010-10-08 02:30:03 +00:00
Daniel Dunbar
d3b6b8bf2b Revert "Reimplement (part of) the or -> add optimization. Matching 'or' into 
'add'", which seems to have broken just about everything.

llvm-svn: 116033
 2010-10-08 02:07:32 +00:00
Daniel Dunbar
59848f6703 Revert "Use the new TB_NOT_REVERSABLE flag instead of special ", which depends 
on r116007, which I am about to revert.

llvm-svn: 116032
 2010-10-08 02:07:29 +00:00
Daniel Dunbar
983fae5a86 Revert "reimplement the second half of the or/add optimization. We should now", 
which depends on r116007, which I am about to revert.

llvm-svn: 116031
 2010-10-08 02:07:26 +00:00
Eric Christopher
45a5ff5ca3 Move to thumb2 loads, fixes a problem with incoming registers 
as thumb1.

Fixes lencod.

llvm-svn: 116027
 2010-10-08 01:13:17 +00:00
Chris Lattner
7577cb7b49 reimplement the second half of the or/add optimization. We should now 
only end up emitting LEA instead of OR.  If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.

Add some testcases that we emit "or" in cases where we used to produce
an "add".

llvm-svn: 116026
 2010-10-08 01:05:10 +00:00
Jim Grosbach
1214818a3e Enable binary encoding of some simple instructions. 
llvm-svn: 116022
 2010-10-08 00:39:21 +00:00
Jim Grosbach
df2ff926a6 Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. 
llvm-svn: 116018
 2010-10-08 00:21:28 +00:00
Chris Lattner
d62e94b465 Use the new TB_NOT_REVERSABLE flag instead of special 
casing FsMOVAPDrr/FsMOVAPSrr.

llvm-svn: 116016
 2010-10-08 00:03:02 +00:00
Chris Lattner
72e7e84c3f simplify some map operations. 
llvm-svn: 116014
 2010-10-07 23:57:02 +00:00
Michael J. Spencer
43ccdd557d MC-COFF: Handle relaxation in COFF better. Fixes PR8321. 
llvm-svn: 116013
 2010-10-07 23:55:40 +00:00
Dan Gohman
27e145fc97 Delete the FormulaSorter class and inline its one method into its 
one user. This code will be restructured soon and FormulaSorter
is getting in the way.

llvm-svn: 116012
 2010-10-07 23:52:18 +00:00
Dan Gohman
9b55022e83 Fix a spello. 
llvm-svn: 116011
 2010-10-07 23:43:09 +00:00
Dan Gohman
d8eb76e4e8 Charge a formula for explicit multiplies on scaled registers too, 
not just base registers.

llvm-svn: 116010
 2010-10-07 23:41:58 +00:00
Dan Gohman
aa2c086eb9 Use size_t for consistency. 
llvm-svn: 116009
 2010-10-07 23:37:58 +00:00
Dan Gohman
8cc92ffff1 When merging one use into another, transfer the offsets from 
the old use to the new one.

llvm-svn: 116008
 2010-10-07 23:36:45 +00:00
Chris Lattner
d8f05bf65e Reimplement (part of) the or -> add optimization. Matching 'or' into 'add' 
is general goodness because it allows ORs to be converted to LEA to avoid
inserting copies.  However, this is bad because it makes the generated .s
file less obvious and gives valgrind heartburn (tons of false positives in
bitfield code).

While the general fix should be in valgrind, we can at least try to avoid
emitting ADD instructions that *don't* get promoted to LEA.  This is more
work because it requires introducing pseudo instructions to represents
"add that knows the bits are disjoint", but hey, people really love valgrind.

This fixes this testcase:
https://bugs.kde.org/show_bug.cgi?id=242137#c20

the add r/i cases are coming next.

llvm-svn: 116007
 2010-10-07 23:36:18 +00:00
Jakob Stoklund Olesen
1d81101e97 After splitting, the remaining LiveInterval may be fragmented into multiple 
connected components. These components should be allocated different virtual
registers because there is no reason for them to be allocated together.

Add the ConnectedVNInfoEqClasses class to calculate the connected components,
and move values to new LiveIntervals.

Use it from SplitKit::rewrite by creating new virtual registers for the
components.

llvm-svn: 116006
 2010-10-07 23:34:34 +00:00
Dan Gohman
b8c38d92e4 Fix LSR to keep the RegUseTracker up to date when combining users. 
This doesn't usually matter, because the other heuristics usually
succeed regardless, but it's good to keep the register use
bookkeeping consistent.

llvm-svn: 116005
 2010-10-07 23:33:43 +00:00
Devang Patel
35201e0fd6 Remove LoopIndexSplit pass. It is neither maintained nor used by anyone. 
llvm-svn: 116004
 2010-10-07 23:29:37 +00:00
John Thompson
87f1278fd9 Unbreak cmake build. 
llvm-svn: 116003
 2010-10-07 23:12:15 +00:00
Evan Cheng
7fa1e3a474 Code refactoring. 
llvm-svn: 116002
 2010-10-07 23:12:15 +00:00
Chris Lattner
2212441ff7 Reduce casting in various tables by defining the table 
with the right types.

llvm-svn: 116001
 2010-10-07 23:08:41 +00:00
Chris Lattner
17850b2677 simplify code: don't build up vector only to assert it is empty. 
llvm-svn: 115997
 2010-10-07 22:26:19 +00:00
Owen Anderson
69cbf2e8b7 Now with fewer extraneous semicolons! 
llvm-svn: 115996
 2010-10-07 22:25:06 +00:00
Jim Grosbach
e949170bad Trivial MC code emitter shell. No instruction forms actually handled yet. 
llvm-svn: 115993
 2010-10-07 22:12:50 +00:00
Evan Cheng
6ff4de5199 Correctly check if a path is a directory. Fix by Brian Korver. 
llvm-svn: 115991
 2010-10-07 22:05:57 +00:00
Devang Patel
ee23e6ea23 Provie a clearner interface so that FE can decide whether a function has prototype or not. 
llvm-svn: 115988
 2010-10-07 22:03:01 +00:00
Jim Grosbach
ec0a25f2b1 Include the auto-generated bits for machine encoding. 
llvm-svn: 115987
 2010-10-07 21:57:55 +00:00
Eric Christopher
183b18d430 Remember to promote load/store types for stack to register size. 
llvm-svn: 115984
 2010-10-07 21:40:18 +00:00
Chris Lattner
16aa36001d convert test to use the existing classes that the multipatterns 
use.  Since TEST is completely different than all other binops,
don't define a multipattern for it.

This completes factorization of binops.

llvm-svn: 115982
 2010-10-07 21:31:03 +00:00
Chris Lattner
bd89233607 convert cmp to use a multipattern 
llvm-svn: 115978
 2010-10-07 20:56:25 +00:00
Evan Cheng
7c89d70f27 Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
llvm-svn: 115977
 2010-10-07 20:50:20 +00:00
Jim Grosbach
671713cc62 ARM instruction don't have instruction prefixes, so remove the helper functions 
for them from the MCCodeEmitter.

llvm-svn: 115975
 2010-10-07 20:41:30 +00:00
Dan Gohman
6645ce3f75 Move tool_output_file into its own file. 
llvm-svn: 115973
 2010-10-07 20:32:40 +00:00
Owen Anderson
d07798cef0 Add initialization routines for Instrumentation. 
llvm-svn: 115971
 2010-10-07 20:17:24 +00:00
Chris Lattner
4b9e6fd743 reduce redundancy between pattern copies. 
llvm-svn: 115968
 2010-10-07 20:14:23 +00:00
Chris Lattner
41b3817cbd the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument. 
llvm-svn: 115967
 2010-10-07 20:06:24 +00:00
Owen Anderson
eebfdc302e Improve comment. 
llvm-svn: 115966
 2010-10-07 20:05:18 +00:00
Owen Anderson
8adf6f2759 Add initialization routines to InstCombine. 
llvm-svn: 115965
 2010-10-07 20:04:55 +00:00
Chris Lattner
d7f7dc04f5 convert adc/sbb to a multipattern. Because the adde/sube nodes 
are not defined as returning EFLAGS (like add_flag and friends),
the entire multipattern and several of the subclasses need to be
cloned.

This could be handled through better instantiation support in tblgen,
but it isn't meta enough.

llvm-svn: 115964
 2010-10-07 20:01:55 +00:00
Owen Anderson
c49384836e Add initialization routines for VMCore. 
llvm-svn: 115963
 2010-10-07 19:51:21 +00:00
Owen Anderson
26a89851fe Add initialization routines for Target. 
llvm-svn: 115957
 2010-10-07 18:50:11 +00:00
Jakob Stoklund Olesen
7f38b44415 Fix obvious mistake pointed out by Michael Spencer. 
llvm-svn: 115952
 2010-10-07 18:47:10 +00:00
Jakob Stoklund Olesen
af0fa37509 Print more loop info. 
llvm-svn: 115951
 2010-10-07 18:47:07 +00:00
Jakob Stoklund Olesen
25e205d66b Print out MBB number when rewriting. 
llvm-svn: 115950
 2010-10-07 18:47:05 +00:00
Owen Anderson
2dd4609c9e Add initialization routines for CodeGen. 
llvm-svn: 115949
 2010-10-07 18:41:20 +00:00
Owen Anderson
0dd283aa50 Add an implementation of the initialization routine for IPA. 
llvm-svn: 115947
 2010-10-07 18:31:27 +00:00
Owen Anderson
704998fa6f Add initialization routines for Analysis and IPA. 
llvm-svn: 115946
 2010-10-07 18:31:00 +00:00
Owen Anderson
ec9ec036a4 Add an initialization routine for libLLVMipo.a 
llvm-svn: 115933
 2010-10-07 18:09:59 +00:00
Jakob Stoklund Olesen
9f106fa05c Cache interval iterators in SplitEditor::addTruncSimpleRange so we only have to 
do one find().

llvm-svn: 115929
 2010-10-07 17:56:39 +00:00
Jakob Stoklund Olesen
a8b45e7477 Clean up debug printing. 
llvm-svn: 115928
 2010-10-07 17:56:35 +00:00
Owen Anderson
4a9acfa34a Next step on the getting-rid-of-static-ctors train: begin adding per-library 
initialization functions that initialize the set of passes implemented in
that library.  Add C bindings for these functions as well.

llvm-svn: 115927
 2010-10-07 17:55:47 +00:00
Owen Anderson
ab71dcd0ad Fix a warning when building with clang++. 
llvm-svn: 115924
 2010-10-07 17:04:18 +00:00
Kalle Raiskila
4e70866424 Add the missing cases to the type->registerclass conversion function. 
llvm-svn: 115921
 2010-10-07 16:32:42 +00:00
Kalle Raiskila
dad4c84edf Implement two virtual functions in SPUTargetLowering. 
Before the implementation of isLegalAddressingMode, some rare cases 
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a 
bad TargetLowering, or if the bug is elsewhere and this patch just 
hides it.

llvm-svn: 115919
 2010-10-07 16:24:35 +00:00
NAKAMURA Takumi
4568ebde72 Minor cosmetic change: fix DOSish \r\n. 
llvm-svn: 115910
 2010-10-07 07:21:04 +00:00
Michael J. Spencer
85094f7689 MC-COFF: Fix symbol aliases. Fixes PR8251. 
llvm-svn: 115909
 2010-10-07 06:29:33 +00:00
Eric Christopher
3a068c4252 Use the correct register class for load instructions - fixes 
compilation of MultiSource/Benchmarks/Bullet.

llvm-svn: 115907
 2010-10-07 05:50:44 +00:00
Eric Christopher
b3e9588644 Use the correct register class here. 
llvm-svn: 115906
 2010-10-07 05:39:19 +00:00
Eric Christopher
67ca7a8fe3 Use the thumb2 conditional move instruction. 
llvm-svn: 115905
 2010-10-07 05:31:49 +00:00
Eric Christopher
8b8bce9a5b Remove in-progress assertion, add TODO. 
llvm-svn: 115904
 2010-10-07 05:14:08 +00:00
Owen Anderson
a8a7bf484f Move the pass initialization helper functions into the llvm namespace, and add 
a header declaring them all.  This is also where we will declare per-library pass-set
initializer functions down the road.

llvm-svn: 115900
 2010-10-07 04:13:08 +00:00
Evan Cheng
1ce29574c2 Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc. 
llvm-svn: 115898
 2010-10-07 01:50:48 +00:00
Chris Lattner
f0d9834e08 add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS, 
allowing us to convert ADD over.  deletes 160 lines of .td file.

llvm-svn: 115897
 2010-10-07 01:37:01 +00:00
Chris Lattner
dea1395cfe Fix a few issues in ArithBinOpEFLAGS that made it specific to and. 
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.

This removes 500 lines from the .td file.  Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.

llvm-svn: 115896
 2010-10-07 01:26:27 +00:00
Chris Lattner
f1f5df212b Convert 'and' to single instance of a multipattern 
which instantiates the 34 versions of and all in one
swoop.  The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.

No change in the generated .inc files.

llvm-svn: 115893
 2010-10-07 01:10:20 +00:00
Jim Grosbach
c0a61c0796 Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode. 
llvm-svn: 115890
 2010-10-07 00:53:56 +00:00
Chris Lattner
a2b51bb341 add a new BinOpAI class to represent the immediate form that directly acts on EAX. 
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.

llvm-svn: 115885
 2010-10-07 00:43:39 +00:00
Jim Grosbach
1e2566c20d Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Chris Lattner
0df71280d1 add a bunch of classes for other common patterns. 
As usual, no change in generated .inc files.

llvm-svn: 115882
 2010-10-07 00:35:28 +00:00
Owen Anderson
3bc77c4154 Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet. 
llvm-svn: 115881
 2010-10-07 00:31:16 +00:00
Chris Lattner
9b3a494cdb Define a new BinOpRI8 class and use it to define the imm8 versions of and. 
llvm-svn: 115880
 2010-10-07 00:12:45 +00:00
Jakob Stoklund Olesen
5e329859cd Constrain the offset register to a *_NOSP register class when inserting LEA 
instructions.

This unbreaks the machine code verifier and fixes PR8317.

llvm-svn: 115879
 2010-10-07 00:07:26 +00:00
Chris Lattner
b520abade4 add the pattern operator to match to X86TypeInfo, use this to 
convert AND64ri32 to use BinOpRI.

llvm-svn: 115878
 2010-10-07 00:01:39 +00:00
Jakob Stoklund Olesen
8c1eafb4cb Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass. 
This function looks like it is about ready to be generated by TebleGen.

llvm-svn: 115876
 2010-10-06 23:56:46 +00:00
Jakob Stoklund Olesen
6b4557461f Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. 
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875
 2010-10-06 23:54:39 +00:00
Jakob Stoklund Olesen
3ad7d4262d Skip unused registers when verifying LiveIntervals. 
llvm-svn: 115874
 2010-10-06 23:54:35 +00:00
Jim Grosbach
f2c54c9cf3 remove trailing whitespace 
llvm-svn: 115860
 2010-10-06 22:46:47 +00:00
Jason W Kim
de3044dcd1 First in a sequence of ARM/MC/*ELF* specific work. 
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored

llvm-svn: 115859
 2010-10-06 22:36:46 +00:00
Rafael Espindola
d0417ac2e1 Another case of 256 sections not being enough :-) 
llvm-svn: 115858
 2010-10-06 22:28:19 +00:00
Owen Anderson
65684877c5 Appease the clang self-host buildbot by providing a correct instantiation. 
llvm-svn: 115857
 2010-10-06 22:23:20 +00:00
Jim Grosbach
de2bd8cd3f Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions. 
llvm-svn: 115853
 2010-10-06 22:01:26 +00:00
Jim Grosbach
4c7da8acbc Kill of the vestiges of the 'call' Modifier (no longer needed for PLT). 
llvm-svn: 115845
 2010-10-06 21:36:43 +00:00
Jim Grosbach
e8a4fef4ea Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed 
"lane" operand modifier.

llvm-svn: 115843
 2010-10-06 21:22:32 +00:00
Jim Grosbach
e1e07b6bf1 Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.

llvm-svn: 115840
 2010-10-06 21:16:16 +00:00
Rafael Espindola
ed469a30f0 Get binding and visibility info from the the alias, but Type from the symbol 
being aliased.

llvm-svn: 115836
 2010-10-06 21:02:29 +00:00
Owen Anderson
2a670815f6 Hide analysis group registration behind a macro, just like pass registration. 
llvm-svn: 115835
 2010-10-06 21:02:27 +00:00
Devang Patel
eeb0b64560 Add support for DW_TAG_unspecified_parameters. 
llvm-svn: 115833
 2010-10-06 20:50:40 +00:00
Jim Grosbach
54490de165 Add a 'pattern' arg to the ARM PseudoNeonI class. 
llvm-svn: 115831
 2010-10-06 20:36:55 +00:00
Michael J. Spencer
b1c4f7b52a MC: Add missing forward in MCLoggingStreamer. 
llvm-svn: 115830
 2010-10-06 20:36:47 +00:00
Bill Wendling
ee02c0c6fe Revert "RequiresUnique" patch. This should be handled at a lower level. 
llvm-svn: 115827
 2010-10-06 20:18:44 +00:00
Rafael Espindola
6283a4a478 If a symbol is global, reloc against it even if it is in a mergeable section. 
llvm-svn: 115817
 2010-10-06 19:27:21 +00:00
Nick Lewycky
d3c05136c1 Remove unused variables. 
llvm-svn: 115802
 2010-10-06 18:11:50 +00:00
Jim Grosbach
dd7ee2836f target operand flag values aren't a bitmask 
llvm-svn: 115798
 2010-10-06 16:51:55 +00:00
Rafael Espindola
d085e53b36 Make sure weak symbols are listed after the local ones. 
llvm-svn: 115795
 2010-10-06 16:47:31 +00:00
Rafael Espindola
0c327e6e77 Correctly handle GOTPCREL relocations. 
llvm-svn: 115793
 2010-10-06 16:23:36 +00:00
Dan Gohman
57f707c6a7 ComputeLinearIndex doesn't need its TLI argument. 
llvm-svn: 115792
 2010-10-06 16:18:29 +00:00
Bill Wendling
c44ee01ccc Change RequiresMerge to RequiresUnique. It's a better description of what this 
fix is trying to accomplish.

This code could still use some polishing.

llvm-svn: 115759
 2010-10-06 07:03:52 +00:00
Evan Cheng
6fbb6dea7c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755
 2010-10-06 06:27:31 +00:00
Bill Wendling
9372fed918 If the destination module all ready has a copy of the global coming from the 
source module *and* it must be merged (instead of simply replaced or appended
to), then merge instead of replacing or adding another global.

The ObjC __image_info section was being appended to because of this
failure. This caused a crash because the linker expects the image info section
to be a specific size.

<rdar://problem/8198537>

llvm-svn: 115753
 2010-10-06 06:16:30 +00:00
Chris Lattner
30c9a175a3 enhance X86TypeInfo to include information about the encoding and 
operand kind for immediates.  Use these to define a new BinOpRI
class and switch AND8/16/32ri over to it.  AND64ri32 needs some
more refactoring before it can make the switcheroo.

llvm-svn: 115752
 2010-10-06 05:55:42 +00:00
Chris Lattner
e9e2d51853 add a class for _REV nodes. 
llvm-svn: 115748
 2010-10-06 05:35:22 +00:00
Chris Lattner
88ccb4e6b5 sink more intelligence into the ITy base class. Now it knows 
that i8 operations are even and i16,i32,i64 operations have a
low opcode bit set (they are odd).

llvm-svn: 115747
 2010-10-06 05:28:38 +00:00
Chris Lattner
96dd50c055 refactor things a bit, now the REX_W and OpSize prefix bytes are inferred from the type info. 
llvm-svn: 115745
 2010-10-06 05:20:57 +00:00
Chris Lattner
7956e6b995 with tblgen suitably extended, we can now get the load node from typeinfo. 
llvm-svn: 115744
 2010-10-06 04:58:43 +00:00
NAKAMURA Takumi
d4612e13ab lib/System/Win32/Signals.inc: Enable LLVM_DISABLE_CRT_DEBUG also on mingw. 
llvm-svn: 115731
 2010-10-06 02:15:22 +00:00
Bill Wendling
ef718b99d4 Provide a fast "get me the target triple from the module" API. This can 
drastically reduce the linking time during LTO.

Patch by Shantonu Sen!

llvm-svn: 115728
 2010-10-06 01:22:42 +00:00
Chris Lattner
5b3e46bd6b lets go all meta and define new X86 type wrappers that declare the associated 
gunk that goes along with an MVT (e.g. reg class, preferred load operation,
memory operand)

llvm-svn: 115727
 2010-10-06 00:45:24 +00:00
Chris Lattner
e979874e3f introduce a new BinOpRM class and use it to factor AND*rm. This points out 
that I need a heavier handed approach to get ultimate factorization.

llvm-svn: 115726
 2010-10-06 00:30:49 +00:00
Chris Lattner
84846b71af remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places 
where !cast is just as short.

llvm-svn: 115722
 2010-10-06 00:19:21 +00:00
Chris Lattner
0b644ced02 replace stuff like: 
let AsmString = !strconcat(
                     !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)),
                     !strconcat("\t", asm));

with:

  let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);

:)

llvm-svn: 115720
 2010-10-06 00:05:18 +00:00
Chris Lattner
12274b9845 allow !strconcat to take more than two operands to eliminate 
!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.

llvm-svn: 115719
 2010-10-05 23:58:18 +00:00
Rafael Espindola
8c7f9745de Use a relocation against the symbol if it is a PLT and the symbol is in another 
section. Common because of linkonce sections.

llvm-svn: 115718
 2010-10-05 23:57:26 +00:00
Eric Christopher
9096fe41cb Comment out fastisel debugging message. 
llvm-svn: 115717
 2010-10-05 23:50:58 +00:00
Chris Lattner
dd8227d488 associate the instruction suffix letter with the integer gpr 
register class, and use this to simplify use of BinOpRR.

llvm-svn: 115716
 2010-10-05 23:43:04 +00:00
Chris Lattner
dd4c597e38 introduce a new BinOpRR class, and convert 4 and instructions to use it. 
llvm-svn: 115715
 2010-10-05 23:32:05 +00:00
Eric Christopher
58254f68df Random cleanup and make the intermediate register in fptosi a 
32-bit fp reg, not 64-bit.

Fixes SingleSource.

llvm-svn: 115711
 2010-10-05 23:13:24 +00:00
Jakob Stoklund Olesen
21f9209234 Count uses in all nested loops, not just the deepest. 
llvm-svn: 115710
 2010-10-05 23:10:12 +00:00
Jakob Stoklund Olesen
b196dd974f Remove SplitAnalysis::removeUse. It was only used to make SplitAnalysis 
reusable, but that is no longer relevant since a split will always replace the
original.

llvm-svn: 115709
 2010-10-05 23:10:09 +00:00
Jakob Stoklund Olesen
f453c743dd dupli always has an interval now. 
llvm-svn: 115708
 2010-10-05 23:10:04 +00:00
Chris Lattner
ef2e024af8 Move cmov pseudo instructions to InstrCompiler, 
convert all the rest of the cmovs to the multiclass,
with good results:

 X86InstrCMovSetCC.td |  598 +--------------------------------------------------
 X86InstrCompiler.td  |   61 +++++
 2 files changed, 77 insertions(+), 582 deletions(-)

llvm-svn: 115707
 2010-10-05 23:09:10 +00:00
Chris Lattner
195a9c3877 Use #NAME# to have the CMOV multiclass define things with the same names as before 
(e.g. CMOVBE16rr instead of CMOVBErr16).

llvm-svn: 115705
 2010-10-05 23:00:14 +00:00
Owen Anderson
38e84dd7ea Another step towards getting rid of static ctors for pass registration: have INITIALIZE_PASS AND INITIALIZE_AG_PASS 
expand to an initializeMyPass() function (in additional to the extant static ctors).  Eventually, these will be called
from a big InitializeAllPasses() function, and the PassInfo's they create (which would be leaked if this code were used
at the moment) will be handed off to a PassRegistry for ownership.

llvm-svn: 115703
 2010-10-05 22:58:16 +00:00
Chris Lattner
3357066875 enhance tblgen to support anonymous defm's, use this to 
simplify the X86 CMOVmr's.

llvm-svn: 115702
 2010-10-05 22:51:56 +00:00
Chris Lattner
b2ac22f0a4 convert cmov mr patterns to use a multipattern. Death to redundancy 
and verbosity

llvm-svn: 115701
 2010-10-05 22:42:54 +00:00
Rafael Espindola
e2bc98a2b2 Implement more alias cases. 
llvm-svn: 115699
 2010-10-05 22:26:43 +00:00
Chris Lattner
c3c03dfeff switch CMOVBE to the multipattern: 
21 insertions(+), 53 deletions(-)

Moar change coming before I switch the rest.

llvm-svn: 115697
 2010-10-05 22:23:58 +00:00
Jakob Stoklund Olesen
592949c742 We can split around loops with multiple exits now. 
llvm-svn: 115696
 2010-10-05 22:19:35 +00:00
Jakob Stoklund Olesen
8137fd6975 Update SplitEditor API to reflect the fact that the original live interval is 
never kept after splitting.

Keeping the original interval made sense when the split region doesn't modify
the register, and the original is spilled. We can get the same effect by
detecting reloaded values when spilling around copies.

llvm-svn: 115695
 2010-10-05 22:19:33 +00:00
Jakob Stoklund Olesen
65051fba34 Intervals are half-open. 
llvm-svn: 115694
 2010-10-05 22:19:29 +00:00
Chris Lattner
5673933e30 fix a bug I introduced in r115669, which ended up with MOV64mr_TC 
not getting marked as mayStore.  This fixes llvm-gcc bootstrap.

llvm-svn: 115693
 2010-10-05 22:16:48 +00:00
Chris Lattner
a5c35bed7b add a multiclass for cmov's, but don't start using it yet. 
llvm-svn: 115692
 2010-10-05 22:01:02 +00:00
Chris Lattner
7065387c35 use a multipattern to define setcc instructions: 
X86InstrCMovSetCC.td |  200 ++++++---------------------------------------------
 1 file changed, 27 insertions(+), 173 deletions(-)

llvm-svn: 115689
 2010-10-05 21:34:29 +00:00
Rafael Espindola
d82f0f7aac 256 sections should be enough for anyone... 
llvm-svn: 115687
 2010-10-05 21:20:07 +00:00
Chris Lattner
fa6f058b70 move SETB pseudos into the same place in InstrCompiler.td 
llvm-svn: 115686
 2010-10-05 21:18:04 +00:00
Chris Lattner
ca34143ddd Replace a gross hack (the MOV64ri_alt instruction) with a slightly less 
gross hack (having the asmmatcher handle the alias).

llvm-svn: 115685
 2010-10-05 21:09:45 +00:00
Rafael Espindola
5762077d52 Don't crash in a strange .size directive. 
llvm-svn: 115684
 2010-10-05 21:02:45 +00:00
Chris Lattner
5d7d5a81eb distribute the rest of the contents of X86Instr64bit.td out to 
the right places.  X86Instr64bit.td now dies, long live x86-64!

llvm-svn: 115669
 2010-10-05 20:49:15 +00:00
Jakob Stoklund Olesen
5391f55f59 When we find a reaching definition, make sure it is visited from all paths by 
erasing it from the visited set. That ensures we create the right phi defs.

llvm-svn: 115666
 2010-10-05 20:36:28 +00:00
Jakob Stoklund Olesen
d4b34928be Don't use nextIndex to check for live out of instruction. 
Insert copy after defining instruction.

Fix LiveIntervalMap::extendTo to properly handle live segments starting before
the current basic block.

Make sure the open live range is extended to the inserted copy's use slot.

llvm-svn: 115665
 2010-10-05 20:36:25 +00:00
Chris Lattner
c06e348ff8 move the rest of the simple 64-bit arithmetic into InstrArithmetic.td 
llvm-svn: 115663
 2010-10-05 20:35:37 +00:00
Chris Lattner
80ffcbd80a continue moving 64-bit stuff into X86InstrArithmetic.td 
llvm-svn: 115660
 2010-10-05 20:23:31 +00:00
Michael J. Spencer
079e1e2ce8 Fix Punctuation. 
llvm-svn: 115657
 2010-10-05 19:48:12 +00:00
Michael J. Spencer
19b6962abb MC-COFF: Fix (PR8278) temporary symbol relocations. 
llvm-svn: 115656
 2010-10-05 19:48:03 +00:00
Rafael Espindola
0b536fb0fb Add support for a fill value in the .zero directive. 
llvm-svn: 115655
 2010-10-05 19:42:57 +00:00
Jakob Stoklund Olesen
10ef24812f Tweak VNInfo printing. 
llvm-svn: 115650
 2010-10-05 18:48:57 +00:00
Jakob Stoklund Olesen
4557c776f3 Add assert for valid slot indexes. 
llvm-svn: 115649
 2010-10-05 18:48:55 +00:00
Jim Grosbach
7c112a9c65 Increase the number of bits used internally by the ARM target to represent the 
addressing mode from four to five.

llvm-svn: 115645
 2010-10-05 18:14:55 +00:00
Rafael Espindola
f850cfbc16 Implement a simple alias case and refactor the code a bit so that the 
isInSymtab and isLocal logic in the two loops don't get easily out of sync.

llvm-svn: 115643
 2010-10-05 18:01:23 +00:00
Owen Anderson
20b48697cd Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without 
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.

llvm-svn: 115634
 2010-10-05 17:24:05 +00:00
Chris Lattner
aae0403342 move 64-bit add and adc to InstrArithmetic. 
llvm-svn: 115632
 2010-10-05 16:59:08 +00:00
Chris Lattner
f5f0742885 rewrote two addr constraints so that they are only set, not set and then nestedly cleared. 
llvm-svn: 115631
 2010-10-05 16:52:25 +00:00
Chris Lattner
cdf60fcc21 split the 32-bit integer arithmetic instructions out to their own file. 
llvm-svn: 115627
 2010-10-05 16:39:12 +00:00
Rafael Espindola
e829a55e8e Produce a undefined reference to _GLOBAL_OFFSET_TABLE_ when needed. 
llvm-svn: 115623
 2010-10-05 15:48:37 +00:00
Dan Gohman
e4c61a1443 After printing "Running 'Graphviz' program... " and running the 
Graphviz program, print something with a newline, to avoid leaving
the line unfinished.

llvm-svn: 115620
 2010-10-05 15:30:27 +00:00
Rafael Espindola
5f53528867 On ELF we need to know which symbols are used in relocations to decide if 
they should be in the symbol table or not. Instead of "guessing", just compute
the symbol table after the relocations are known.

llvm-svn: 115619
 2010-10-05 15:11:03 +00:00
Chris Lattner
4cf3aff9c1 integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight. 
llvm-svn: 115608
 2010-10-05 07:13:35 +00:00
Chris Lattner
3d1c1ff4c2 move 32-bit shift and rotates out to their own file. 
llvm-svn: 115607
 2010-10-05 07:00:12 +00:00
Chris Lattner
40954218dd add new file 
llvm-svn: 115606
 2010-10-05 06:52:35 +00:00
Chris Lattner
1c0cbe9571 move sign and zero extensions out to their own file. 
llvm-svn: 115605
 2010-10-05 06:52:26 +00:00
Chris Lattner
12a0f5c3bd move some instructions from Instr64Bit -> InstrInfo. 
bswap32 doesn't read eflags.

llvm-svn: 115604
 2010-10-05 06:47:35 +00:00
Chris Lattner
9317bf2ed5 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.

llvm-svn: 115603
 2010-10-05 06:41:40 +00:00
Chris Lattner
d96f3fe646 move various pattern matching support goop out of X86Instr64Bit, to live 
with the 32-bit stuff.

llvm-svn: 115602
 2010-10-05 06:37:31 +00:00
Chris Lattner
7451cc0f59 split conditional moves and setcc's out to their own file. 
llvm-svn: 115601
 2010-10-05 06:33:16 +00:00
Chris Lattner
7114e187e1 move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together. 
llvm-svn: 115600
 2010-10-05 06:27:48 +00:00
Chris Lattner
e63d763713 move the atomic pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115599
 2010-10-05 06:22:35 +00:00
Chris Lattner
a2e5444bb4 move more pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115598
 2010-10-05 06:10:16 +00:00
Chris Lattner
383d15c9d8 move VMX instructions out to their own file. 
llvm-svn: 115597
 2010-10-05 06:06:53 +00:00
Chris Lattner
5f59acddbc continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td

llvm-svn: 115596
 2010-10-05 06:04:14 +00:00
Michael J. Spencer
d26ae30ed9 fix MSVC 2010 build. 
llvm-svn: 115594
 2010-10-05 06:00:43 +00:00
Michael J. Spencer
12a13def14 Cleanup Whitespace. 
llvm-svn: 115593
 2010-10-05 06:00:33 +00:00
Chris Lattner
db65ba5acf refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
llvm-svn: 115591
 2010-10-05 05:32:15 +00:00
Jim Grosbach
8b1d76f9e2 Re-apply r115363 and r115366 now that r115525 has removed the un-needed header 
that caused the circular dependencies on Linux.

Built OK for me on OSX and Linux (Ubuntu) with configure/make and CMake. Will
keep an eye on the bots....

llvm-svn: 115582
 2010-10-05 00:34:11 +00:00
Evan Cheng
7218d81721 This DAG combine BRCOND transformation can look pass truncate of the operand: 
//   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = srl i32 %b, 1                                                                                                                                                                        
    //   brcond i32 %c ...                                                                                                                                                                         
    //                                                                                                                                                                                             
    // into                                                                                                                                                                                        
    //                                                                                                                                                                                             
    //   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = setcc eq %b, 0                                                                                                                                                                       
    //   brcond %c ...

Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.

This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.

llvm-svn: 115571
 2010-10-04 22:41:01 +00:00
Bill Wendling
b94ade249a The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!

llvm-svn: 115552
 2010-10-04 20:24:01 +00:00
Kevin Enderby
01b93a4319 Incorporate suggestions by Daniel Dunbar after his review. Thanks Daniel! 
1) Changed ValidateDwarfFileNumber() to isValidDwarfFileNumber() to be better
   named.  Since it is just a predicate and isn't actually changing any state.

2) Added a missing return in the comments for setCurrentDwarfLoc() in 
   include/llvm/MC/MCContext.h for fix formatting.

3) Changed clearDwarfLocSeen() to ClearDwarfLocSeen() since it does change
   state.

4) Simplified the last test in isValidDwarfFileNumber() to just a one line
   boolean test of MCDwarfFiles[FileNumber] != 0 for the final return statement.

llvm-svn: 115551
 2010-10-04 20:17:24 +00:00
Rafael Espindola
dcac047c7f Implement ELF::R_X86_64_GOTPCREL. 
llvm-svn: 115547
 2010-10-04 19:51:39 +00:00
Rafael Espindola
6b80b08cec Move isFixupKindX86PCRel. 
llvm-svn: 115545
 2010-10-04 19:46:28 +00:00
Rafael Espindola
f7e642c0da Produce a R_X86_64_PLT32 when needed. 
llvm-svn: 115541
 2010-10-04 19:04:13 +00:00
Rafael Espindola
08361a0329 Produce a R_X86_64_GOT32 when needed. 
llvm-svn: 115537
 2010-10-04 18:44:25 +00:00
Jim Grosbach
7a161fb4e2 Remove unneeded header 
llvm-svn: 115525
 2010-10-04 17:53:40 +00:00
Jan Wen Voung
9c76bbf90a Add hook in MCSection to decide when to use "optimized nops", for each 
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.

llvm-svn: 115523
 2010-10-04 17:32:41 +00:00
Dan Gohman
ff478951be Don't add the operand count to SCEV uniquing data; FoldingSetNodeID 
already knows its own length, so this is redundant.

llvm-svn: 115521
 2010-10-04 17:24:08 +00:00
Rafael Espindola
491c3f9ef7 Include the section address in the computation of the relocation. 
llvm-svn: 115509
 2010-10-04 15:59:01 +00:00
Rafael Espindola
ce6ea76503 Correctly compute the relocation when it is not in the first fragment. 
llvm-svn: 115506
 2010-10-04 15:28:43 +00:00
Lang Hames
50cc10e9a7 Removed the older style (in-allocator) problem construction system from the PBQP allocator. Problem construction is now done exclusively with the new builders. 
llvm-svn: 115502
 2010-10-04 12:13:07 +00:00
Anton Korobeynikov
f1acea8615 va_args support for Win64. 
Patch by Cameron!

llvm-svn: 115480
 2010-10-03 22:52:07 +00:00
Anton Korobeynikov
31b3b2ca41 Properly emit stack probe on win64 (for non-mingw targets). 
Based on the patch by Cameron Esfahani!

llvm-svn: 115479
 2010-10-03 22:02:38 +00:00
Eli Friedman
35432e5685 Add 3DNowA instructions. 
llvm-svn: 115477
 2010-10-03 20:23:13 +00:00
Chris Lattner
d03783eaf2 the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
llvm-svn: 115473
 2010-10-03 19:09:13 +00:00
Rafael Espindola
49d508fd19 Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do 
so and also change X86 for consistency.

Investigating if this can be improved a bit.

llvm-svn: 115469
 2010-10-03 18:59:45 +00:00
Chris Lattner
4599fd89fd add support for the prefetch/prefetchw instructions, move femms into 
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.

llvm-svn: 115468
 2010-10-03 18:42:30 +00:00
Chris Lattner
6d6f84f99c what the heck, add support for the rest of the 3dNow! binary operations. 
llvm-svn: 115467
 2010-10-03 18:24:18 +00:00
Chris Lattner
8174253484 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.

llvm-svn: 115466
 2010-10-03 18:08:05 +00:00
Evan Cheng
e8eec016c8 Major changes to Cortex-A9 itinerary. 
1. Model dual issues as two FUs.
2. Model the pipelines correctly: two symmetric ALUs, the multiplier is a
   dependent pipeline on ALU0.
The changes do not have much impact on codegen right now. But I plan to make
pre-RA scheduler multi-issue aware which should take good advantage of the
changes.

llvm-svn: 115457
 2010-10-03 02:03:59 +00:00
Rafael Espindola
e209fd8ab7 Implement a very basic PIC case. 
llvm-svn: 115454
 2010-10-03 00:46:57 +00:00
Bill Wendling
07640330f3 Cleanup. Get rid of extraneous variable. 
llvm-svn: 115453
 2010-10-03 00:46:06 +00:00
Chris Lattner
3d148e7e31 stub out a header to put 3dNow! instructions into. 
llvm-svn: 115429
 2010-10-02 23:06:23 +00:00
Chris Lattner
3c29a2b776 fix a regression introduced in r115243, in which the instruction 
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.

llvm-svn: 115422
 2010-10-02 21:32:15 +00:00
Jakob Stoklund Olesen
8371c85032 Stop using LiveRange in MachineVerifier. 
llvm-svn: 115408
 2010-10-02 05:24:46 +00:00
Bob Wilson
ac095e1026 Fix a miscompile in 186.crafty for Thumb2 that was exposed by Evan's 
scheduling change in svn 115121.  The CriticalAntiDepBreaker had bad
liveness information.  It was calculating the KillIndices for one scheduling
region in a basic block, rescheduling that region so the KillIndices were
no longer valid, and then using those wrong KillIndices to make decisions
for the next scheduling region.  I've not been able to reduce a small
testcase for this.  Radar 8502534.

llvm-svn: 115400
 2010-10-02 01:49:29 +00:00
Nick Lewycky
2fd7de3006 Wind these directories back too. File adds and removes are properly represented 
in patches. :-(

llvm-svn: 115396
 2010-10-02 01:16:59 +00:00
Nick Lewycky
62ea532b38 Continue reverting r115363. 
llvm-svn: 115395
 2010-10-02 01:08:17 +00:00
Nick Lewycky
7103df7a51 Revert patches r115363 r115367 r115391 due to build breakage: 
llvm[2]: Updated LibDeps.txt because dependencies changed
llvm[2]: Checking for cyclic dependencies between LLVM libraries.
find-cycles.pl: Circular dependency between *.a files:
find-cycles.pl:   libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a

llvm-svn: 115393
 2010-10-02 01:06:42 +00:00
Jim Grosbach
469a7a27d9 Update CMake files for recent AsmPrinter->InstPrinter changes. Can someone who 
is more familiar with CMake please review?

llvm-svn: 115391
 2010-10-02 00:39:56 +00:00
Eric Christopher
9e303eeb6f Start on lowering global addresses. 
llvm-svn: 115390
 2010-10-02 00:32:44 +00:00
Kevin Enderby
84d750a85c This adds a Darwin x86_64 relocation encoding for a subtraction expression 
where both symbols are "local", that is non-external symbols, and there is
no "base" for the symbols used in the expression, that is the section has
no non-temporary symbols.  This case looks like this:

% cat local_reloc_A-B.s
	.long 0
LB:	.long 1
	.long LA - LB - 4
	.long 2
LA:	.long 3

which llvm-mc will not encode without this patch, generates a "unsupported
local relocations in difference" error, but the Darwin assembler will
encode with relocation entries like this:

% otool -rv a.out l.out 
a.out:
Relocation information (__TEXT,__text) 2 entries
address  pcrel length extern type    scattered symbolnum/value
00000008 False long   False  SUB     False     1 (__TEXT,__text)
00000008 False long   False  UNSIGND False     1 (__TEXT,__text)

which is very similar to what is encoded when the symbols don't have the
leading 'L' and they are not temporary symbols.  Which llvm-mc and the
Darwin assembler will encoded like this:

Relocation information (__TEXT,__text) 2 entries
address  pcrel length extern type    scattered symbolnum/value
00000008 False long   True   SUB     False     B
00000008 False long   True   UNSIGND False     A

This is the missing relocation encoding needed to allow the Mach-O x86
Dwarf file and line table to be emitted.  So this patch also removes the
TODO from the if() statement in MCMachOStreamer::Finish() that didn't 
call MCDwarfFileTable::Emit() for 64-bit targets.

llvm-svn: 115389
 2010-10-02 00:13:41 +00:00
Jakob Stoklund Olesen
5cc6ca9d19 Drop the use of LiveInterval::iterator and the LiveRange class in 
RemoveCopyByCommutingDef.

llvm-svn: 115386
 2010-10-01 23:52:27 +00:00
Jakob Stoklund Olesen
cf5ec4b4cd When RemoveCopyByCommutingDef is creating additional identity copies, just use 
LiveInterval::MergeValueNumberInto instead of trying to extend LiveRanges and
getting it wrong.

This fixed PR8249 where a valno with a multi-segment live range was defined by
an identity copy created by RemoveCopyByCommutingDef. Some of the live
segments disappeared.

llvm-svn: 115385
 2010-10-01 23:52:25 +00:00
Jakob Stoklund Olesen
80ea35d2ac Pretty up the debug output during RemoveCopyByCommutingDef. 
llvm-svn: 115384
 2010-10-01 23:52:22 +00:00
Devang Patel
f612c0b23e Add support to let FE mark explict methods as explict in debug info. 
llvm-svn: 115378
 2010-10-01 23:31:40 +00:00
Jim Grosbach
77531e2727 Nuke trailing whitespace. 
llvm-svn: 115377
 2010-10-01 23:29:12 +00:00
Jim Grosbach
a158e3e6c1 PrintSpecial() can go away now. 
llvm-svn: 115376
 2010-10-01 23:27:48 +00:00
Eric Christopher
c1f6f9a730 Stub out constant GV handling, fixes C++ eh tests. 
llvm-svn: 115375
 2010-10-01 23:24:42 +00:00
Jim Grosbach
619f1c1cc5 Nuke the rest of the :comment references 
llvm-svn: 115373
 2010-10-01 23:21:38 +00:00
Jim Grosbach
8440cebbe9 Nuke a bunch of no-longer-needed comment-only asm strings. 
llvm-svn: 115370
 2010-10-01 23:09:33 +00:00
Jim Grosbach
869c188757 Now that the asmprinter itself isn't in the subdir, rename 'AsmPrinter' to 
'InstPrinter' to fall into line with the other MC-ized assembly printer
using targets.

llvm-svn: 115367
 2010-10-01 22:57:18 +00:00
Evan Cheng
b068d1483a Fix r115332: correctly model AGU / NEON mux. 
llvm-svn: 115365
 2010-10-01 22:52:29 +00:00
Owen Anderson
95581657a4 Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs. For now, 
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.

llvm-svn: 115364
 2010-10-01 22:45:50 +00:00
Jim Grosbach
cb1fe6879e Move the asmprinter and MC lowering out of the AsmPrinter (soon to be 
InstPrinter) subdir

llvm-svn: 115363
 2010-10-01 22:45:38 +00:00
Jim Grosbach
2143c9d321 Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.

llvm-svn: 115360
 2010-10-01 22:39:28 +00:00
Evan Cheng
0da8dff3c7 Fix scheduling infor for vmovn and vshrn which I broke accidentially. 
llvm-svn: 115354
 2010-10-01 21:48:06 +00:00
Evan Cheng
cf5ed3cd53 Add operand cycles for vldr / vstr. 
llvm-svn: 115353
 2010-10-01 21:40:30 +00:00
Eric Christopher
669452e47f Direct calls only for arm fast isel for now. 
llvm-svn: 115350
 2010-10-01 21:33:12 +00:00
Evan Cheng
fc1aee5b3c NEON scheduling info fix. vmov reg, reg are single cycle instructions. 
llvm-svn: 115344
 2010-10-01 20:50:58 +00:00
Eric Christopher
7daf669802 Fix thinko on store instructions. Fixes test_indvars failure. 
llvm-svn: 115342
 2010-10-01 20:46:04 +00:00
Owen Anderson
e93e24ee5d Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2. 
llvm-svn: 115341
 2010-10-01 20:33:47 +00:00
Owen Anderson
d6aa3da08e Provide an option to restore old-style if-conversion heuristics for Thumb2. 
llvm-svn: 115339
 2010-10-01 20:28:06 +00:00
Owen Anderson
a88628cd72 Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder. 
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.

llvm-svn: 115337
 2010-10-01 20:02:55 +00:00
Evan Cheng
c7c6c2d04d Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly. 
llvm-svn: 115332
 2010-10-01 19:41:46 +00:00
Devang Patel
1f2abb3af0 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case. 
llvm-svn: 115323
 2010-10-01 19:00:44 +00:00
Jim Grosbach
1a837b8495 grammar 
llvm-svn: 115314
 2010-10-01 14:57:48 +00:00
Benjamin Kramer
65131b20b4 Delete token *after* reading from it. 
llvm-svn: 115311
 2010-10-01 12:25:27 +00:00
Gabor Greif
7d9b24e1ef typo 
llvm-svn: 115310
 2010-10-01 10:32:19 +00:00
Kalle Raiskila
c6bdc97934 Zap some redundant 'ori $?, $?, 0' from SPU. 
Also remove some code that died in the process.
One now non-existant ori is checked for.

llvm-svn: 115306
 2010-10-01 09:20:01 +00:00
Eric Christopher
792e8112b0 Fix the other half of the alignment changing issue by making sure that the 
memcpy alignment is the minimum of the incoming alignments.

Fixes PR 8266.

llvm-svn: 115305
 2010-10-01 09:02:05 +00:00
Chris Lattner
97f71e71c9 fix typo 
llvm-svn: 115300
 2010-10-01 06:54:02 +00:00
Chris Lattner
bf0f375aba fix PR8267 - Instcombine shouldn't optimizer away volatile memcpy's. 
llvm-svn: 115296
 2010-10-01 05:51:02 +00:00
Chris Lattner
01c6e93ea4 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350 
llvm-svn: 115294
 2010-10-01 05:36:09 +00:00
Dale Johannesen
f97d3fcccd Attempt to outwit overly smart compiler. 
llvm-svn: 115251
 2010-10-01 00:21:24 +00:00
Eric Christopher
48606deb11 Implement double return values in calls. Fixes 
SingleSource/Regression/C/casts.c.

llvm-svn: 115246
 2010-10-01 00:00:11 +00:00
Dale Johannesen
c14a1eda84 Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
 2010-09-30 23:57:10 +00:00
Daniel Dunbar
c21ab2a74c Add an explicit initialization to work around what appears to be a valgrind 
false positive, at least on Darwin. I haven't filed this, but you can feel free.

llvm-svn: 115242
 2010-09-30 23:56:49 +00:00
Owen Anderson
918c558636 Temporarily add a flag to make it easier to compare the new-style ARM if 
conversion heuristics to the old-style ones.

llvm-svn: 115239
 2010-09-30 23:48:38 +00:00
Jim Grosbach
45de3f6747 Clean up asm writer usage for x86 and msp430 to flag that the writer should 
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

llvm-svn: 115238
 2010-09-30 23:40:25 +00:00