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51785 Commits

Author SHA1 Message Date
Jim Grosbach
f9910809c5 ARM VFP pre-UAL mnemonic aliases for fmul[sd]. 
llvm-svn: 146892
 2011-12-19 19:43:50 +00:00
Akira Hatanaka
ea1f905123 Remove unused predicate. 
llvm-svn: 146889
 2011-12-19 19:32:20 +00:00
Akira Hatanaka
b7ebcb2ded Remove the restriction on the first operand of the add node in SelectAddr. 
This change reduces the number of instructions generated.

For example, 
(load (add (sub $n0, $n1), (MipsLo got(s))))

results in the following sequence of instructions:
1. sub $n2, $n0, $n1
2. lw got(s)($n2)

Previously, three instructions were needed.
1. sub $n2, $n0, $n1
2. addiu $n3, $n2, got(s)
3. lw 0($n3)

llvm-svn: 146888
 2011-12-19 19:28:37 +00:00
Jim Grosbach
6e9471925b ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd]. 
llvm-svn: 146887
 2011-12-19 19:02:41 +00:00
Jim Grosbach
520db82971 ARM NEON implied destination aliases for VMAX/VMIN. 
llvm-svn: 146885
 2011-12-19 18:57:38 +00:00
Jim Grosbach
f4ca84a7ab ARM NEON relax parse time diagnostics for alignment specifiers. 
There's more variation that we need to handle. Error checking will need
to be on operand predicates.

llvm-svn: 146884
 2011-12-19 18:31:43 +00:00
Jim Grosbach
2a0ced60a5 Tidy up. 
llvm-svn: 146882
 2011-12-19 18:11:17 +00:00
Jakob Stoklund Olesen
7b1b08eb77 Remove a register class that can just as well be synthesized. 
Add the new TableGen register class synthesizer feature to the release
notes.

llvm-svn: 146875
 2011-12-19 16:53:40 +00:00
Jakob Stoklund Olesen
d409180ff3 Handle sub-register operands in recomputeRegClass(). 
Now that getMatchingSuperRegClass() returns accurate results, it can be
used to compute constraints imposed by instructions using a sub-register
of a virtual register.

This means we can recompute the register class of any virtual register
by combining the constraints from all its uses.

llvm-svn: 146874
 2011-12-19 16:53:37 +00:00
Jakob Stoklund Olesen
0aa2f7755a Emit a getMatchingSuperRegClass() implementation for every target. 
Use information computed while inferring new register classes to emit
accurate, table-driven implementations of getMatchingSuperRegClass().

Delete the old manual, error-prone implementations in the targets.

llvm-svn: 146873
 2011-12-19 16:53:34 +00:00
Jakub Staszak
b62af984a1 - Use getExitingBlock instead of getExitingBlocks. 
- Remove trailing spaces.

llvm-svn: 146854
 2011-12-18 21:52:30 +00:00
Benjamin Kramer
942f1bd653 Another variadics tweak. 
llvm-svn: 146852
 2011-12-18 20:51:31 +00:00
Joerg Sonnenberger
8cf8d64d19 Allow inlining of functions with returns_twice calls, if they have the 
attribute themselve.

llvm-svn: 146851
 2011-12-18 20:35:43 +00:00
Benjamin Kramer
e16533eded Use the fancy new VariadicFunction template instead of a plain variadic function. 
Some compilers were complaining about passing StringRef to it.

llvm-svn: 146850
 2011-12-18 19:59:20 +00:00
Benjamin Kramer
dd2a4b1e4f Hexagon: Remove unused variables. 
llvm-svn: 146846
 2011-12-18 12:00:09 +00:00
Chad Rosier
b870a13cd8 Revert 146728 as it's causing failures on some of the external bots as well as 
internal nightly testers.  Original commit message:

By popular demand, link up types by name if they are isomorphic and one is an
autorenamed version of the other.   This makes the IR easier to read, because
we don't end up with random renamed versions of the types after LTO'ing a large
app.

llvm-svn: 146838
 2011-12-17 22:19:53 +00:00
Kevin Enderby
42fffe915a Revert r146822 at Pete Cooper's request as it broke clang self hosting. 
Hope I did this correctly :)

llvm-svn: 146834
 2011-12-17 19:48:52 +00:00
Craig Topper
9696094d07 Remove an unused X86ISD node type. 
llvm-svn: 146833
 2011-12-17 19:16:44 +00:00
Benjamin Kramer
65c1236c63 X86: Factor the bswap asm matching to be slightly less horrible to read. 
llvm-svn: 146831
 2011-12-17 14:36:05 +00:00
Pete Cooper
0ec73f6e98 SimplifyCFG now predicts some conditional branches to true or false depending on previous branch on same comparison operands. 
For example, 

if (a == b) {
    if (a > b) // this is false
    
Fixes some of the issues on <rdar://problem/10554090>

llvm-svn: 146822
 2011-12-17 06:32:38 +00:00
Evan Cheng
23574ec02a Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle. 
llvm-svn: 146805
 2011-12-17 01:25:34 +00:00
Pete Cooper
6627aaa416 Refactor code used in InstCombine::FoldAndOfICmps to new file. 
This will be used by SimplifyCfg in a later commit.

llvm-svn: 146803
 2011-12-17 01:20:32 +00:00
Rafael Espindola
549d0683b1 Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added the 
asm parsing and testcase.

llvm-svn: 146801
 2011-12-17 01:14:52 +00:00
Lang Hames
e32ef23ba8 Make sure that the lower bits on the VSELECT condition are properly set. 
llvm-svn: 146800
 2011-12-17 01:08:46 +00:00
Jakob Stoklund Olesen
7d7ba18ad7 Preserve more memory operands in ARMExpandPseudo. 
I don't think this affects anything but verbose assembly.

llvm-svn: 146787
 2011-12-17 00:07:02 +00:00
Dan Gohman
9c8c9a8f62 The powers that be have decided that LLVM IR should now support 16-bit 
"half precision" floating-point with a first-class type.

This patch adds basic IR support (but not codegen support).

llvm-svn: 146786
 2011-12-17 00:04:22 +00:00
Eric Christopher
38b0b94ef2 When recursing for the original size of a type, stop if we are at a 
pointer or a reference type - we actually just want the size of the
pointer then for that.

Fixes rdar://10335756

llvm-svn: 146785
 2011-12-16 23:42:45 +00:00
Eric Christopher
b9b1a7d40e Resolve part of a fixme and add a new one. 
llvm-svn: 146784
 2011-12-16 23:42:42 +00:00
Eric Christopher
bceac3c150 Add a fixme here. 
llvm-svn: 146783
 2011-12-16 23:42:38 +00:00
Eric Christopher
945c822d26 Extraneous whitespace and 80-col. 
llvm-svn: 146780
 2011-12-16 23:42:31 +00:00
Jakob Stoklund Olesen
445cdbb987 Fix off-by-one error in bucket sort. 
The bad sorting caused a misaligned basic block when building 176.vpr in
ARM mode.

<rdar://problem/10594653>

llvm-svn: 146767
 2011-12-16 23:00:05 +00:00
Dylan Noblesmith
91b9af8f44 APInt: update asserts for base-36 
Hexatridecimal was added in r139695.

And fix the unittest that now triggers the assert.

llvm-svn: 146754
 2011-12-16 20:36:31 +00:00
Jakob Stoklund Olesen
d0c1eb9dd2 Don't adjust for alignment padding in OffsetIsInRange. 
This adjustment is already included in the block offsets computed by
BasicBlockInfo, and adjusting again here can cause the pass to loop.

When CreateNewWater splits a basic block, OffsetIsInRange would reject
the new CPE on the next pass because of the too conservative alignment
adjustment. This caused the block to be split again, and so on.

llvm-svn: 146751
 2011-12-16 19:10:00 +00:00
Benjamin Kramer
04d6a4c456 Hexagon: Fix a nasty order-of-initialization bug. 
Reenable the tests.

llvm-svn: 146750
 2011-12-16 19:08:59 +00:00
Devang Patel
1b525a0c23 In DICompositeType, referenced to derived type is either metadata or null. 
llvm-svn: 146744
 2011-12-16 17:51:31 +00:00
Jakob Stoklund Olesen
3d0382e29d Note ARM constant island alignment in the release notes. 
The command line option should be removed, but not until the feature has
gotten a lot of testing. The ARMConstantIslandPass tends to have subtle
bugs that only show up after a while.

llvm-svn: 146739
 2011-12-16 16:07:41 +00:00
Manuel Klimek
2f7cf4e64b Adds a JSON parser and a benchmark (json-bench) to catch performance regressions. 
llvm-svn: 146735
 2011-12-16 13:09:10 +00:00
Chris Lattner
26f06c927f By popular demand, link up types by name if they are isomorphic and one is an 
autorenamed version of the other.   This makes the IR easier to read, because
we don't end up with random renamed versions of the types after LTO'ing a large app.

llvm-svn: 146728
 2011-12-16 08:36:07 +00:00
Craig Topper
88e2bfef0a Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is supported. Fix 'unpackh v, v' for 256-bit types to understand 128-bit lanes. 
llvm-svn: 146726
 2011-12-16 08:06:31 +00:00
NAKAMURA Takumi
1aaed909ae Target/Hexagon: Fix CMake build. 
llvm-svn: 146724
 2011-12-16 06:21:02 +00:00
Andrew Trick
df958760c8 Avoid a confusing assert for silly options: -unroll-runtime -unroll-count=1. 
No need for an explicit test case for an unsupported combination of options.

llvm-svn: 146721
 2011-12-16 02:03:48 +00:00
Jim Grosbach
42bf8d8526 ARM NEON aliases for vmovq.f* 
llvm-svn: 146714
 2011-12-16 00:12:22 +00:00
Jim Grosbach
5f14a4c5d4 Thumb2 ADR assembly parsing w/o the .w suffix. 
llvm-svn: 146710
 2011-12-15 23:52:17 +00:00
Eli Friedman
f626b19bda Make sure we correctly note the existence of an i8 immediate for vblendvps and friends, so we compute fixups correctly. PR11586. 
llvm-svn: 146709
 2011-12-15 23:46:18 +00:00
Nick Lewycky
88e64bacfa Move parts of lib/Target that use CodeGen into lib/CodeGen. 
llvm-svn: 146702
 2011-12-15 22:58:58 +00:00
Eli Friedman
7e3cbd0db2 Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a value that isn't a 32-bit value. (This is just to be safe; I don't think this actually causes any issues in practice.) 
llvm-svn: 146700
 2011-12-15 22:56:53 +00:00
Jim Grosbach
30f4b285a6 ARM NEON VCLE is an alias for VCGE w/ the source operands reversed. 
llvm-svn: 146699
 2011-12-15 22:56:33 +00:00
Kostya Serebryany
847d2d2c25 [asan] add the name of the module to the description of a global variable. This improves the readability of global-buffer-overflow reports. 
llvm-svn: 146698
 2011-12-15 22:55:55 +00:00
Tony Linthicum
31c6f9b096 Add MCTargetDesc library to Hexagon target 
llvm-svn: 146692
 2011-12-15 22:29:08 +00:00
Jim Grosbach
b79d2a8f50 ARM NEON VTBL/VTBX assembly parsing and encoding. 
llvm-svn: 146691
 2011-12-15 22:27:11 +00:00