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Commit Graph

209221 Commits

Author SHA1 Message Date
Fangrui Song
fba3075f39 [PowerPC] Delete remnant isOSDarwin references 2021-01-06 21:18:35 -08:00
Sanjoy Das
ade1afb29b [NFC] Don't copy MachineFrameInfo on each invocation of HasAlias
Also fix a typo in a comment.  This fixes a compile time issue in XLA
(https://www.tensorflow.org/xla).

Differential Revision: https://reviews.llvm.org/D94182
2021-01-06 18:59:20 -08:00
Kazu Hirata
8fd273682c [llvm] Use llvm::all_of (NFC) 2021-01-06 18:27:36 -08:00
Kazu Hirata
745ad84858 [llvm] Use BasicBlock::phis() (NFC) 2021-01-06 18:27:35 -08:00
Kazu Hirata
3109d596ee [llvm] Use llvm::append_range (NFC) 2021-01-06 18:27:33 -08:00
Juneyoung Lee
871d4c4165 [InstSimplify] Fold insertelement vec, poison, idx into vec
This is a simple patch that adds folding from `insertelement vec, poison, idx` into `vec`.

Alive2 proof: https://alive2.llvm.org/ce/z/2y2vbC

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93994
2021-01-07 10:10:14 +09:00
Juneyoung Lee
d269d5e555 [Constant] Add tests for ConstantVector::get (NFC) 2021-01-07 10:08:01 +09:00
Craig Topper
812d036280 [RISCV] Fix a few section number comments in RISCVInstrInfoVPseudos.td to match the V extension 1.0 draft spec. NFC
The majority of the comments use the 1.0 draft spec section numbers.
2021-01-06 16:38:30 -08:00
Juneyoung Lee
0b995628a9 [Constant] Update ConstantVector::get to return poison if all input elems are poison
The diff was reviewed at D93994
2021-01-07 09:26:07 +09:00
Kit Barton
52191ae5f0 [PPC] Remove old PPCSubTarget variable.
The PPCSubTarget variable has been replaced with the Subtarget variable. This
removes the remaining instances of PPCSubTarget as they are no longer necessary.
2021-01-06 17:44:07 -06:00
Jonas Devlieghere
2a4255c860 [Support] Untie the llvm::Signpost interface from llvm::Timer
Make llvm::Signpost more generic by untying from llvm::Timer. This
allows signposts to be used in a different context.

My motivation for doing this is being able to use signposts in LLDB.

Differential revision: https://reviews.llvm.org/D93655
2021-01-06 15:16:09 -08:00
Amara Emerson
f941e46d3b Fix failing triple test for macOS 11 with non-zero minor versions.
Differential Revision: https://reviews.llvm.org/D94197
2021-01-06 14:57:37 -08:00
Alina Sbirlea
d825615032 [DominatorTree] Add support for mixed pre/post CFG views.
Add support for mixed pre/post CFG views.

Update usages of the MemorySSAUpdater to use the new DT API by
requesting the DT updates to be done by the MSSAUpdater.

Differential Revision: https://reviews.llvm.org/D93371
2021-01-06 14:53:09 -08:00
Nikita Popov
c2d5b85909 [BasicAA] Fix BatchAA results for phi-phi assumptions
Change the way NoAlias assumptions in BasicAA are handled. Instead of
handling this inside the phi-phi code, always initially insert a
NoAlias result into the map and keep track whether it is used.
If it is used, then we require that we also get back NoAlias from
the recursive queries. Otherwise, the entry is changed to MayAlias.

Additionally, keep track of all location pairs we inserted that may
still be based on assumptions higher up. If it turns out one of those
assumptions is incorrect, we flush them from the cache.

The compile-time impact for the new implementation is significantly
higher than the previous iteration of this patch:
https://llvm-compile-time-tracker.com/compare.php?from=c0bb9859de6991cc233e2dedb978dd118da8c382&to=c07112373279143e37568b5bcd293daf81a35973&stat=instructions
However, it should avoid the exponential runtime cases we run into
if we don't cache assumption-based results entirely.

This also produces better results in some cases, because NoAlias
assumptions can now start at any root, rather than just phi-phi pairs.
This is not just relevant for analysis quality, but also for BatchAA
consistency: Otherwise, results would once again depend on query order,
though at least they wouldn't be wrong.

This ended up both more complicated and more expensive than I hoped,
but I wasn't able to come up with another solution that satisfies all
the constraints.

Differential Revision: https://reviews.llvm.org/D91936
2021-01-06 22:15:30 +01:00
Nikita Popov
273a7b5b40 [InstSimplify] Canonicalize non-demanded shuffle op to poison (NFCI)
I don't believe this has an observable effect, because the only
thing we care about here is replacing the operand with a constant
so following folds can apply. This change is just to make the
representation follow canonical unary shuffle form.
2021-01-06 21:22:27 +01:00
Nikita Popov
39fe1739db [InstSimplify] Fold call null/undef to poison
Calling null or undef results in immediate undefined behavior.
Return poison instead of undef in this case, similar to what
we do for immediate UB due to division by zero.
2021-01-06 21:09:30 +01:00
Nikita Popov
b3877826ec [PowerPC] Avoid call to undef in test (NFC)
Replace call to undef with a dummy function, to avoid affecting
this change by changes to call undef folding.
2021-01-06 21:09:02 +01:00
Arthur Eubanks
d2a6654c1b [test] Pin partial-unswitch.ll to legacy PM
The new PM does not have loop-unswitch, it only has simple-loop-unswitch.
2021-01-06 11:53:07 -08:00
Craig Topper
240b48a4b6 [RISCV] Return a vXi1 vector type from getSetCCResultType if V extension is enabled.
nvxXi1 types are legal with V extension and that's the result
vmseq/vmsne/vmslt/etc instructions return.

No test cases yet because the setcc isel patterns aren't in
and we'll need more than basic tests to observe this. I locally
tested that this plus D947078, D94168, D94142, and D94149
was enough to be able to handle the overflow result from
llvm.sadd.overflow.
2021-01-06 11:50:15 -08:00
Arthur Eubanks
c886828274 [test] Pin AMDGPU/opt-pipeline.ll to legacy PM
The pipeline being tested is specifically the legacy PM pipeline.
2021-01-06 11:44:16 -08:00
Arthur Eubanks
b6bbc7080f Fix non-assert builds after D93828 2021-01-06 11:42:03 -08:00
Nikita Popov
f1a3e21dd2 [InstSimplify] Fold out-of-bounds shift to poison
Make InstSimplify return poison rather than undef for out-of-bounds
shifts, as specified by LandRef:

> If op2 is (statically or dynamically) equal to or larger than the
> number of bits in op1, this instruction returns a poison value.

Differential Revision: https://reviews.llvm.org/D93998
2021-01-06 20:41:37 +01:00
Nikita Popov
0fd1d55185 [GVN] Regenerate test checks (NFC) 2021-01-06 20:41:36 +01:00
Sanjay Patel
55df2038d7 [SLP] use reduction kind's opcode to create new instructions; NFC
Similar to 5a1d31a28 -
This should be no-functional-change because the reduction kind
opcodes are 1-for-1 mappings to the instructions we are matching
as reductions. But we want to remove the need for the
`OperationData` opcode field because that does not work when
we start matching intrinsics (eg, maxnum) as reduction candidates.
2021-01-06 14:37:44 -05:00
Sanjay Patel
11d66ae09c [SLP] reduce code for propagating flags on reductions; NFC
If we add/change to match intrinsics, this might get more
wordy, but there's no need to list each kind currently.
2021-01-06 14:37:44 -05:00
Arthur Eubanks
44021712d5 [CGSCC][Coroutine][NewPM] Properly support function splitting/outlining
Previously when trying to support CoroSplit's function splitting, we
added in a hack that simply added the new function's node into the
original function's SCC (https://reviews.llvm.org/D87798). This is
incorrect since it might be in its own SCC.

Now, more similar to the previous design, we have callers explicitly
notify the LazyCallGraph that a function has been split out from another
one.

In order to properly support CoroSplit, there are two ways functions can
be split out.

One is the normal expected "outlining" of one function into a new one.
The new function may only contain references to other functions that the
original did. The original function must reference the new function. The
new function may reference the original function, which can result in
the new function being in the same SCC as the original function. The
weird case is when the original function indirectly references the new
function, but the new function directly calls the original function,
resulting in the new SCC being a parent of the original function's SCC.
This form of function splitting works with CoroSplit's Switch ABI.

The second way of splitting is more specific to CoroSplit. CoroSplit's
Retcon and Async ABIs split the original function into multiple
functions that all reference each other and are referenced by the
original function. In order to keep the LazyCallGraph in a valid state,
all new functions must be processed together, else some nodes won't be
populated. To keep things simple, this only supports the case where all
new edges are ref edges, and every new function references every other
new function. There can be a reference back from any new function to the
original function, putting all functions in the same RefSCC.

This also adds asserts that all nodes in a (Ref)SCC can reach all other
nodes to prevent future incorrect hacks.

The original hacks in https://reviews.llvm.org/D87798 are no longer
necessary since all new functions should have been registered before
calling updateCGAndAnalysisManagerForPass.

This fixes all coroutine tests when opt's -enable-new-pm is true by
default. This also fixes PR48190, which was likely due to the previous
hack breaking SCC invariants.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D93828
2021-01-06 11:19:15 -08:00
Fangrui Song
171489a04d [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINUX feature detection and support musl
Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are replaced
with the more appropriate `#if SANITIZER_GLIBC` (the headers are glibc
extensions, not specific to Linux (i.e. if we ever support GNU/kFreeBSD
or Hurd, the guards may automatically work)).

Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are refined
with `#if SANITIZER_GLIBC` (the definitions are available on Linux glibc,
but may not be available on other libc (e.g. musl) implementations).

This patch makes `ninja asan cfi lsan msan stats tsan ubsan xray` build on a musl based Linux distribution (apk install musl-libintl)
Notes about disabled interceptors for musl:

* `SANITIZER_INTERCEPT_GLOB`: musl does not implement `GLOB_ALTDIRFUNC` (GNU extension)
* Some ioctl structs and functions operating on them.
* `SANITIZER_INTERCEPT___PRINTF_CHK`: `_FORTIFY_SOURCE` functions are GNU extension
* `SANITIZER_INTERCEPT___STRNDUP`: `dlsym(RTLD_NEXT, "__strndup")` errors so a diagnostic is formed. The diagnostic uses `write` which hasn't been intercepted => SIGSEGV
* `SANITIZER_INTERCEPT_*64`: the `_LARGEFILE64_SOURCE` functions are glibc specific. musl does something like `#define pread64 pread`
* Disabled `msg_iovlen msg_controllen cmsg_len` checks: musl is conforming while many implementations (Linux/FreeBSD/NetBSD/Solaris) are non-conforming. Since we pick the glibc definition, exclude the checks for musl (incompatible sizes but compatible offsets)

Pass through LIBCXX_HAS_MUSL_LIBC to make check-msan/check-tsan able to build libc++ (https://bugs.llvm.org/show_bug.cgi?id=48618).

Many sanitizer features are available now.

```
% ninja check-asan
(known issues:
* ASAN_OPTIONS=fast_unwind_on_malloc=0 odr-violations hangs
)
...
Testing Time: 53.69s
  Unsupported      : 185
  Passed           : 512
  Expectedly Failed:   1
  Failed           :  12

% ninja check-ubsan check-ubsan-minimal check-memprof # all passed

% ninja check-cfi
( all cross-dso/)
...
Testing Time: 8.68s
  Unsupported      : 264
  Passed           :  80
  Expectedly Failed:   8
  Failed           :  32

% ninja check-lsan
(With GetTls (D93972), 10 failures)
Testing Time: 4.09s
  Unsupported:  7
  Passed     : 65
  Failed     : 22

% ninja check-msan
(Many are due to functions not marked unsupported.)
Testing Time: 23.09s
  Unsupported      :   6
  Passed           : 764
  Expectedly Failed:   2
  Failed           :  58

% ninja check-tsan
Testing Time: 23.21s
  Unsupported      :  86
  Passed           : 295
  Expectedly Failed:   1
  Failed           :  25
```

Used `ASAN_OPTIONS=verbosity=2` to verify there is no unneeded interceptor.

Partly based on Jari Ronkainen's https://reviews.llvm.org/D63785#1921014

Note: we need to place `_FILE_OFFSET_BITS` above `#include "sanitizer_platform.h"` to avoid `#define __USE_FILE_OFFSET64 1` in 32-bit ARM `features.h`

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D93848
2021-01-06 10:55:40 -08:00
Mircea Trofin
dfc42ff390 [NFC] Removed unused prefixes in CodeGen/AMDGPU
This covers tests starting with m-r.

Differential Revision: https://reviews.llvm.org/D94181
2021-01-06 10:32:44 -08:00
Simon Pilgrim
7ad1a31bb3 [X86] Add commuted patterns test coverage for D93599
Suggested by @spatel
2021-01-06 18:03:20 +00:00
Reid Kleckner
c62fcf404e [X86] Remove [ER]SP from all CSR lists
The CSR lists control which registers are spilled and reloaded in the
prologue and epilogue. The stack pointer is managed explicitly, and
should never be pushed or popped. Remove it from these lists. This
affected regcall and preserves all / most.

Differential Revision: https://reviews.llvm.org/D94118
2021-01-06 09:50:46 -08:00
Mircea Trofin
caabf4d62f [NFC] Removed unused prefixes from CodeGen/AMDGPU
All the 'l'-starting tests.

Differential Revision: https://reviews.llvm.org/D94151
2021-01-06 09:34:11 -08:00
Matt Arsenault
d575318898 AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp interaction
Change the GlobalISel fast fdiv handling to match the changes in
2531535984ad989ce88aeee23cb92a827da6686e and
884acbb9e167d5668e43581630239d688edec8ad
2021-01-06 12:32:01 -05:00
Peter Waller
d954147555 [llvm][NFC] Disallow all warnings in TypeSize tests
This is a follow-up to a request from a reviewer [0]. The text may change in
the future and these tests should not produce any warning output.

[0] https://reviews.llvm.org/D91806#inline-879243

Reviewed By: sdesmalen, david-arm

Differential Revision: https://reviews.llvm.org/D94161
2021-01-06 17:17:07 +00:00
Francesco Petrogalli
85e110e6e7 [InstCombine] Update valueCoversEntireFragment to use TypeSize
* Update valueCoversEntireFragment to use TypeSize.
* Add a regression test.
* Assertions have been added to protect untested codepaths.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91806
2021-01-06 17:14:59 +00:00
Matt Arsenault
7090f445c5 AMDGPU/GlobalISel: Add baseline IR tests for fdiv
The fdiv lowering is currently split between an IR pass and codegen,
so make sure this works end to end. We also currently differ from the
DAG on some edge cases, which this will show in a future change.
2021-01-06 11:37:00 -05:00
Matt Arsenault
f1cf42a216 AMDGPU: Explicitly use SelectionDAG in legacy intrinsic tests
GlobalISel will probably not support the legacy buffer intrinsics, so
don't fail when the default is switched.
2021-01-06 11:37:00 -05:00
Simon Pilgrim
a95db42106 [TargetLowering] Add icmp ne/eq (srl (ctlz x), log2(bw)) vector support. 2021-01-06 16:13:51 +00:00
Nicholas Guy
65826ea24e [AArch64] Rearrange mul(dup(sext/zext)) to mul(sext/zext(dup))
Performing this rearrangement allows for existing patterns
to match cases where the vector may be built after an extend,
instead of before.

Differential Revision: https://reviews.llvm.org/D91255
2021-01-06 16:02:16 +00:00
Simon Pilgrim
6e5bfd1236 Remove some unused <vector> includes. NFCI.
<vector> (unlike many other c++ headers) is relatively clean, so if the file doesn't use std::vector then it shouldn't need the header.
2021-01-06 15:50:29 +00:00
Simon Pilgrim
4a6ff80b75 [X86] Add icmp ne/eq (srl (ctlz x), log2(bw)) test coverage.
Add vector coverage as well (which isn't currently supported).
2021-01-06 15:50:29 +00:00
Krzysztof Parzyszek
4cb71eede7 [Hexagon] Wrap functions only used in asserts in ifndef NDEBUG 2021-01-06 09:40:38 -06:00
Florian Hahn
ed964a5d1b [LoopDeletion] Also consider loops with subloops for deletion.
Currently, LoopDeletion does skip loops that have sub-loops, but this
means we currently fail to remove some no-op loops.

One example are inner loops with live-out values. Those cannot be
removed by itself. But the containing loop may itself be a no-op and the
whole loop-nest can be deleted.

The legality checks do not seem to rely on analyzing inner-loops only
for correctness.

With LoopDeletion being a LoopPass, the change means that we now
unfortunately need to do some extra work in parent loops, by checking
some conditions we already checked. But there appears to be no
noticeable compile time impact:
http://llvm-compile-time-tracker.com/compare.php?from=02d11f3cda2ab5b8bf4fc02639fd1f4b8c45963e&to=843201e9cf3b6871e18c52aede5897a22994c36c&stat=instructions

This changes patch leads to ~10 more loops being deleted on
MultiSource, SPEC2000, SPEC2006 with -O3 & LTO

This patch is also required (together with a few others) to eliminate a
no-op loop in omnetpp as discussed on llvm-dev 'LoopDeletion / removal of
empty loops.' (http://lists.llvm.org/pipermail/llvm-dev/2020-December/147462.html)

This change becomes relevant after removing potentially infinite loops
is made possible in 'must-progress' loops (D86844).

Note that I added a function call with side-effects to an outer loop in
`llvm/test/Transforms/LoopDeletion/update-scev.ll` to preserve the
original spirit of the test.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D93716
2021-01-06 14:49:00 +00:00
Simon Pilgrim
81c47ec559 [TableGen] RegisterBankEmitter - Pass Twine by const reference instead of by value. NFCI. 2021-01-06 14:22:05 +00:00
Simon Pilgrim
597e5f4739 [MIPS] MipsAsmParser - Pass Twine by const reference instead of by value. NFCI. 2021-01-06 14:22:04 +00:00
Simon Pilgrim
8b7e1a8a38 [ProfileData] Pass Twine by const reference instead of by value.
Its only used by DiagnosticInfoSampleProfile which takes a const reference anyhow.
2021-01-06 14:22:03 +00:00
Simon Pilgrim
3300dd95c2 [Hexagon] Regenerate zext-v4i1.ll tests
This will be improved by part of the work for D86578
2021-01-06 12:56:06 +00:00
Jan Svoboda
b0bfe2e8f6 Reapply multiple "[clang][cli]" patches
This reverts 7ad666798f12 and 1876a2914fe0 that reverted:

741978d727a4 [clang][cli] Port CodeGen option flags to new option parsing system
383778e2171b [clang][cli] Port LangOpts option flags to new option parsing system
aec2991d083a [clang][cli] Port LangOpts simple string based options to new option parsing system
95d3cc67caac [clang][cli] Port CodeGenOpts simple string flags to new option parsing system
27b7d646886d [clang][cli] Streamline MarshallingInfoFlag description
70410a264949 [clang][cli] Let denormalizer decide how to render the option based on the option class
63a24816f561 [clang][cli] Implement `getAllArgValues` marshalling

Commit 741978d727a4 accidentally changed the `Group` attribute of `g[no_]column_info` options from `g_flags_Group` to `g_Group`, which changed the debug info options passed to cc1 by the driver.

Similar change was also present in 383778e2171b, which accidentally added `Group<f_Group>` to `f[no_]const_strings` and `f[no_]signed_wchar`.

This patch corrects all three accidental changes by replacing `Bool{G,F}Option` with `BoolCC1Option`.
2021-01-06 13:27:19 +01:00
Tomas Matheson
1bd9ce64b6 [AArch64] Add BRB IALL and BRB INJ instructions
BRB IALL: Invalidate the Branch Record Buffer
BRB INJ: Branch Record Injection into the Branch Record Buffer

Parser changes based on work by Simon Tatham.

These are two-word mnemonics. The assembly parser works by special-casing
the mnemonic in order to parse the second word as a plain identifier token.

Reviewed by: MarkMurrayARM

Differential Revision: https://reviews.llvm.org/D93899
2021-01-06 12:10:22 +00:00
Simon Pilgrim
47a30e4ed3 [X86] Add scalar/vector test coverage for D93599
This expands the test coverage beyond just the boolvector/movmsk concat pattern
2021-01-06 11:58:27 +00:00
Stefan Pintilie
a955465035 [PowerPC] Fix issue where vsrq is given incorrect shift vector
The new Power10 instruction vsrq was being given the wrong shift vector.
The original code assumed that the shift would be found in bits 121 to 127.
This is not correct. The shift is found in bits 57 to 63.
This can be fixed by swaping the first and second double words.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D94113
2021-01-06 05:56:09 -06:00