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63205 Commits

Author SHA1 Message Date
Ulrich Weigand
1d5f4c66da [SystemZ] Add support for new cpu architecture - arch13
This patch series adds support for the next-generation arch13
CPU architecture to the SystemZ backend.

This includes:
- Basic support for the new processor and its features.
- Assembler/disassembler support for new instructions.
- CodeGen for new instructions, including new LLVM intrinsics.
- Scheduler description for the new processor.
- Detection of arch13 as host processor.

Note: No currently available Z system supports the arch13
architecture.  Once new systems become available, the
official system name will be added as supported -march name.

llvm-svn: 365932
2019-07-12 18:13:16 +00:00
Simon Pilgrim
7f2a0e6b10 [X86][AVX] Add PR34359 shuffle test case.
llvm-svn: 365926
2019-07-12 17:42:32 +00:00
Hideto Ueno
99b1ea457c [Attributor] Deduce "nofree" function attribute
Summary: Deduce "nofree" function attribute. A more concise description of "nofree" is on D49165.

Reviewers: jdoerfert

Reviewed By: jdoerfert

Subscribers: homerdin, hfinkel, lebedev.ri, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62687

llvm-svn: 365924
2019-07-12 17:38:51 +00:00
Philip Reames
4edda29b32 [IndVars] Use exit count reasoning to discharge obviously untaken exits
Continue in the spirit of D63618, and use exit count reasoning to prove away loop exits which can not be taken since the backedge taken count of the loop as a whole is provably less than the minimal BE count required to take this particular loop exit.

As demonstrated in the newly added tests, this triggers in a number of cases where IndVars was previously unable to discharge obviously redundant exit tests. And some not so obvious ones.

Differential Revision: https://reviews.llvm.org/D63733

llvm-svn: 365920
2019-07-12 17:05:35 +00:00
Hideto Ueno
f2b21cc133 [FunctionAttrs] Add a test for "nofree" function attribute
This patch adds a test for nofree function attribute.

llvm-svn: 365916
2019-07-12 16:29:14 +00:00
Hideto Ueno
845b0733cb Test commit
llvm-svn: 365912
2019-07-12 16:08:32 +00:00
Jay Foad
631612d948 [AMDGPU] Fix DPP combiner check for exec modification
Summary:
r363675 changed the exec modification helper function, now called
execMayBeModifiedBeforeUse, so that if no UseMI is specified it checks
all instructions in the basic block, even beyond the last use. That
meant that the DPP combiner no longer worked in any basic block that
ended with a control flow instruction, and in particular it didn't work
on code sequences generated by the atomic optimizer.

Fix it by reinstating the old behaviour but in a new helper function
execMayBeModifiedBeforeAnyUse, and limiting the number of instructions
scanned.

Reviewers: arsenm, vpykhtin

Subscribers: kzhuravl, nemanjai, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kbarton, MaskRay, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64393

llvm-svn: 365910
2019-07-12 15:59:40 +00:00
Jay Foad
393984bc1e [AMDGPU] Restrict v_cndmask_b32 abs/neg modifiers to f32
Summary:
D64497 allowed abs/neg source modifiers on v_cndmask_b32 but it doesn't
make any sense to apply them to f16 operands; they would interpret the
bits of the value as an f32, giving nonsensical results. This patch
restricts them to f32 operands.

Reviewers: arsenm, hakzsam

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64636

llvm-svn: 365904
2019-07-12 15:02:59 +00:00
David Bolvansky
85b7b16172 [InstCombine] Fold select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y) to ashr (X, Y))
Summary:
(select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y)) -> ashr (X, Y))
(select (icmp slt x, 1), ashr (X, Y), lshr (X, Y)) -> ashr (X, Y))

Fixes PR41173

Alive proof by @lebedev.ri (thanks)
Name: PR41173
  %cmp = icmp slt i32 %x, 1
  %shr = lshr i32 %x, %y
  %shr1 = ashr i32 %x, %y
  %retval.0 = select i1 %cmp, i32 %shr1, i32 %shr
  =>
  %retval.0 = ashr i32 %x, %y

Optimization: PR41173
Done: 1
Optimization is correct!

Reviewers: lebedev.ri, spatel

Reviewed By: lebedev.ri

Subscribers: nikic, craig.topper, llvm-commits, lebedev.ri

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64285

llvm-svn: 365893
2019-07-12 11:31:16 +00:00
Alex Brachet
257f3196b6 Fix test case of llvm-nm using implicit a.out
llvm-svn: 365892
2019-07-12 10:44:06 +00:00
George Rimar
00b2899f15 [test/Object, obj2yaml] - Move test cases from test/Object and cleanup.
test/Object is not correct place to have tests that check obj2yaml
functionality, because we have test/tools/obj2yaml folder for that.

In this patch I merged a few test cases with their YAMLs from Inputs
folder, converted one of binary inputs and moved them to
tools/obj2yaml folder.

There are still another tests that might need the same, so it is initial step. 

Differential revision: https://reviews.llvm.org/D64555

llvm-svn: 365891
2019-07-12 10:29:29 +00:00
Alex Brachet
c32a25d72b [tools] [llvm-nm] Default to reading from stdin not a.out
Summary: This moves away from defaulting to a.out and uses stdin only if stdin has a file redirected to it. This has been discussed on the llvm-dev mailing list [[ https://lists.llvm.org/pipermail/llvm-dev/2019-July/133642.html | here ]].

Reviewers: jhenderson, rupprecht, MaskRay, chrisjackson

Reviewed By: jhenderson, MaskRay

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64290

llvm-svn: 365889
2019-07-12 10:20:01 +00:00
Djordje Todorovic
4cf81cc46f Revert "[DwarfDebug] Dump call site debug info"
A build failure was found on the SystemZ platform.

This reverts commit 9e7e73578e54cd22b3c7af4b54274d743b6607cc.

llvm-svn: 365886
2019-07-12 09:45:12 +00:00
George Rimar
e1ce548141 [Object/ELF] - Improve error reporting for notes.
This patch improves the error messages reported for
note sections and phdrs and also makes a cleanup for
existent test case.

Differential revision: https://reviews.llvm.org/D64470

llvm-svn: 365884
2019-07-12 09:29:12 +00:00
Kai Luo
79dc588c53 [NFC][PowerPC] Added test for MachinePRE.
llvm-svn: 365883
2019-07-12 09:10:35 +00:00
Sam Elliott
1283665ffc [RISCV] Allow parsing dot '.' in assembly
Summary:
Useful for jumps, such as `j .`.

I am not sure who should review this. Do not hesitate to change the reviewers if needed.

Reviewers: asb, jrtc27, lenary

Reviewed By: lenary

Subscribers: MaskRay, lenary, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63669

Patch by John LLVM (JohnLLVM)

llvm-svn: 365881
2019-07-12 08:36:07 +00:00
Simon Atanasyan
42e0928a60 [mips] Fix JmpLink to texternalsym and tglobaladdr on mcroMIPS R6
There is not match for the `MipsJmpLink texternalsym` and `MipsJmpLink
tglobaladdr` patterns for microMIPS R6. As a result LLVM incorrectly
selects the `JALRC16` compact 2-byte instruction which takes a target
instruction address from a register only and assign `R_MIPS_32` relocation
for this instruction. This relocation completely overwrites `JALRC16`
and nearby instructions.

This patch adds missed matching patterns, selects `BALC` instruction and
assign a correct `R_MICROMIPS_PC26_S1` relocation.

Differential Revision: https://reviews.llvm.org/D64552

llvm-svn: 365870
2019-07-12 04:58:45 +00:00
Artem Dergachev
341d219543 NFC: Unforget a colon in a few CHECK: directives.
Differential Revision: https://reviews.llvm.org/D64526

llvm-svn: 365863
2019-07-12 02:16:56 +00:00
Jinsong Ji
0564491bde [MachinePipeliner] Fix order for nodes with Anti dependence in same cycle
Summary:
Problem exposed in PowerPC functional testing.

We did not consider Anti dependence for nodes in same cycle,
so we may end up generating bad machine code.
eg: the reduced test won't verify.

*** Bad machine code: Using an undefined physical register ***
- function:    lame_encode_buffer_interleaved
- basic block: %bb.4  (0x4bde4e12928)
- instruction: %29:gprc = ADDZE %27:gprc, implicit-def dead $carry, implicit $carry
- operand 3:   implicit $carry

Reviewers: bcahoon, kparzysz, hfinkel

Subscribers: MaskRay, wuzish, nemanjai, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64192

llvm-svn: 365859
2019-07-12 01:59:42 +00:00
Michael Liao
94cd089f0d [AMDGPU] Skip calculating callee saved registers for entry function.
Reviewers: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64596

llvm-svn: 365846
2019-07-11 23:53:30 +00:00
Matt Arsenault
74012b6127 AMDGPU: s_waitcnt field should be treated as unsigned
Also make it an ImmLeaf, so it should work with global isel as well,
which was part of the point of moving it in the first place.

llvm-svn: 365842
2019-07-11 23:42:57 +00:00
Leonard Chan
9e855532d8 [NewPM] Port Sancov
This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty.

Changes:

- Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over
  functions and ModuleSanitizerCoverage for passing over modules.
- ModuleSanitizerCoverage exists for adding 2 module level calls to initialization
  functions but only if there's a function that was instrumented by sancov.
- Added legacy and new PM wrapper classes that own instances of the 2 new classes.
- Update llvm tests and add clang tests.

Differential Revision: https://reviews.llvm.org/D62888

llvm-svn: 365838
2019-07-11 22:35:40 +00:00
Stanislav Mekhanoshin
8fffd2f294 [AMDGPU] gfx908 agpr spilling
Differential Revision: https://reviews.llvm.org/D64594

llvm-svn: 365833
2019-07-11 21:54:13 +00:00
Stefan Stipanovic
c892f2c16e [Attributor] Deduce "nosync" function attribute.
Introduce and deduce "nosync" function attribute to indicate that a function
does not synchronize with another thread in a way that other thread might free memory.

Reviewers: jdoerfert, jfb, nhaehnle, arsenm

Subscribers: wdng, hfinkel, nhaenhle, mehdi_amini, steven_wu,
dexonsmith, arsenm, uenoku, hiraditya, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D62766

llvm-svn: 365830
2019-07-11 21:37:40 +00:00
Stanislav Mekhanoshin
00406d9acb [AMDGPU] gfx908 hazard recognizer
Differential Revision: https://reviews.llvm.org/D64593

llvm-svn: 365829
2019-07-11 21:30:34 +00:00
Huihui Zhang
1cef27c9fd [InstCombine][NFCI] Add more test coverage to onehot_merge.ll
Prep work for upcoming patch D64275.

llvm-svn: 365828
2019-07-11 21:28:25 +00:00
Stanislav Mekhanoshin
38d5b257db [AMDGPU] gfx908 mfma support
Differential Revision: https://reviews.llvm.org/D64584

llvm-svn: 365824
2019-07-11 21:19:33 +00:00
David Bolvansky
d0e081114e [NFC] Revisited tests for D64285
llvm-svn: 365815
2019-07-11 19:39:20 +00:00
Jinsong Ji
8ea00e2dde [PowerPC][NFC] Update testcase to avoid dead code
The original testcase might be optimized out due to dead code,
update the testcase to avoid it.

llvm-svn: 365810
2019-07-11 19:16:33 +00:00
Craig Topper
a6c5922329 [X86] Pre commit test cases for D64574. Along with a test case for PR42571. NFC
llvm-svn: 365803
2019-07-11 18:19:27 +00:00
Wouter van Oortmerssen
6bc07142c8 [WebAssembly] Assembler: support negative float constants.
Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64367

llvm-svn: 365802
2019-07-11 18:18:07 +00:00
Benjamin Kramer
9f58875e26 [NVPTX] Use atomicrmw fadd instead of intrinsics
AutoUpgrade the old intrinsics to atomicrmw fadd.

llvm-svn: 365796
2019-07-11 17:11:25 +00:00
Sanjay Patel
1c7a59cca6 [X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)
Follow up to D58597, where it was noted that the commuted ISD::SUB variant
was having problems with lack of combines.

See also D63958 where we untangled setcc/sub pairs.

Differential Revision: https://reviews.llvm.org/D58875

llvm-svn: 365791
2019-07-11 15:56:33 +00:00
Simon Pilgrim
f0e5cdd84d [DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y).

This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well.

In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops.

The fast-isel-store.ll load folding regression is annoying but I don't think is that critical.

Differential Revision: https://reviews.llvm.org/D63653

llvm-svn: 365785
2019-07-11 14:45:03 +00:00
George Rimar
36e9592455 Revert r365775 - "[Object/ELF] - Improve error reporting for notes."
It broke BB: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/15419

llvm-svn: 365779
2019-07-11 14:03:27 +00:00
George Rimar
34564324f8 [Object/ELF] - Improve error reporting for notes.
This patch improves the error messages reported for
note sections and phdrs and also makes a cleanup for
existent test case.

Differential revision: https://reviews.llvm.org/D64470

llvm-svn: 365775
2019-07-11 13:47:44 +00:00
Sanjay Patel
8afd96f509 [InstCombine] don't move FP negation out of a constant expression
-(X * ConstExpr) becomes X * (-ConstExpr), so don't reverse that
and infinite loop.

llvm-svn: 365774
2019-07-11 13:44:29 +00:00
George Rimar
a63dd0ee11 [yaml2obj/elf-override-shsize.yaml] - An attemp to fix ppc64 bot.
Failture:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/35670/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Aelf-override-shsize.yaml

Solution:
Change `od` tool invocation to print single bytes.

llvm-svn: 365772
2019-07-11 13:26:36 +00:00
George Rimar
f0e500c351 [yaml2obj] - Allow overriding the sh_size field.
There is no way to set broken sh_size field currently
for sections. It can be usefull for writing the
test cases. 

Differential revision: https://reviews.llvm.org/D64401

llvm-svn: 365766
2019-07-11 12:59:29 +00:00
David Bolvansky
5eef7bfdbd [NFC] Updated tests for D64285
llvm-svn: 365765
2019-07-11 12:51:33 +00:00
George Rimar
44f982eeb2 [llvm-readobj/llvm-readelf] - Report a warning instead of a error when dumping a broken dynamic section.
It does not make sence to stop dumping the object if the broken
dynamic section was found. In this patch I changed the behavior from
"report an error" to "report a warning". This matches GNU.

Differential revision: https://reviews.llvm.org/D64472

llvm-svn: 365762
2019-07-11 12:26:48 +00:00
David Bolvansky
e67c5ce969 [InstCombine] Reorder recently added/improved pow transformations
Changed cases are now faster with exp2.

llvm-svn: 365758
2019-07-11 10:55:04 +00:00
Florian Hahn
45d7ad6a15 Revert [BitcodeReader] Validate OpNum, before accessing Record array.
This reverts r365750 (git commit 8b222ecf2769ee133691f208f6166ce118c4a164)

llvm-dis runs out of memory while opening invalid-fcmp-opnum.bc on
llvm-hexagon-elf, probably because the bitcode file contains other
suspicious values.

http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/21949

llvm-svn: 365757
2019-07-11 10:53:40 +00:00
Simon Pilgrim
a1e75fb020 [X86] Regenerate intrinsics tests. NFCI.
llvm-svn: 365755
2019-07-11 10:40:23 +00:00
Simon Pilgrim
d094dba69e [AMDGPU] Regenerate idot tests. NFCI.
Reduces diff in D63281.

llvm-svn: 365754
2019-07-11 10:37:58 +00:00
Fangrui Song
3afa7d901e [llvm-objcopy] Don't change permissions of non-regular output files
There is currently an EPERM error when a regular user executes `llvm-objcopy a.o /dev/null`.
Worse, root can even change the mode bits of /dev/null.

Fix it by checking if the output file is special.

A new overload of llvm::sys::fs::setPermissions with FD as the parameter
is added. Users should provide `perm & ~umask` as the parameter if they
intend to respect umask.

The existing overload of llvm::sys::fs::setPermissions may be deleted if
we can find an implementation of fchmod() on Windows. fchmod() is
usually better than chmod() because it saves syscalls and can avoid race
condition.

Reviewed By: jakehehrlich, jhenderson

Differential Revision: https://reviews.llvm.org/D64236

llvm-svn: 365753
2019-07-11 10:17:59 +00:00
Fangrui Song
a6a4c14893 [X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled
Summary:
As of binutils 2.32, ld has a bogus TLS relaxation error when the GD/LD
code sequence using R_X86_64_GOTPCREL (instead of R_X86_64_GOTPCRELX) is
attempted to be relaxed to IE/LE (binutils PR24784). gold and lld are good.

In gcc/config/i386/i386.md, there is a configure-time check of as/ld
support and the GOT relaxation will not be used if as/ld doesn't support
it:

    if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
      return "call\t%P2";
    return "call\t{*%p2@GOT(%1)|[DWORD PTR %p2@GOT[%1]]}";

In clang, -DENABLE_X86_RELAX_RELOCATIONS=OFF is the default. The ld.bfd
bogus error can be reproduced with:

    thread_local int a;
    int main() { return a; }

clang -fno-plt -fpic a.cc -fuse-ld=bfd

GOTPCRELX gained relative good support in 2016, which is considered
relatively new.  It is even difficult to conditionally default to
-DENABLE_X86_RELAX_RELOCATIONS=ON due to cross compilation reasons. So
work around the ld.bfd bug by only using GOT when GOTPCRELX is enabled.

Reviewers: dalias, hjl.tools, nikic, rnk

Reviewed By: nikic

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64304

llvm-svn: 365752
2019-07-11 10:10:09 +00:00
Florian Hahn
4328722a26 [BitcodeReader] Validate OpNum, before accessing Record array.
Currently invalid bitcode files can cause a crash, when OpNum exceeds
the number of elements in Record, like in the attached bitcode file.

The test case was generated by clusterfuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15698

Reviewers: t.p.northover, thegameg, jfb

Reviewed By: jfb

Differential Revision: https://reviews.llvm.org/D64507

llvm-svn: 365750
2019-07-11 09:57:00 +00:00
Sam Parker
e530ac4f23 [ARM][LowOverheadLoops] Correct offset checking
This patch addresses a couple of problems:
1) The maximum supported offset of LE is -4094.
2) The offset of WLS also needs to be checked, this uses a
   maximum positive offset of 4094.
    
The use of BasicBlockUtils has been changed because the block offsets
weren't being initialised, but the isBBInRange checks both positive
and negative offsets.
    
ARMISelLowering has been tweaked because the test case presented
another pattern that we weren't supporting.

llvm-svn: 365749
2019-07-11 09:56:15 +00:00
Simon Tatham
4ca501beb1 [ARM] Remove nonexistent unsigned forms of MVE VQDMLAH.
The VQDMLAH.U8, VQDMLAH.U16 and VQDMLAH.U32 instructions don't
actually exist: the Armv8.1-M architecture spec only lists signed
forms of that instruction. The unsigned ones were added in error: they
existed in an early draft of the spec, but they were removed before
the public version, and we missed that particular spec change.

Also affects the variant forms VQDMLASH, VQRDMLAH and VQRDMLASH.

Reviewers: miyuki

Subscribers: javed.absar, kristof.beyls, hiraditya, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64502

llvm-svn: 365747
2019-07-11 09:52:15 +00:00