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Commit Graph

191718 Commits

Author SHA1 Message Date
Galina Kistanova
fd0b07e175 Reverted the remainings of c1c9819ef91aab51b5a23fb3027adac5a2f551cc
as it has left broken llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast buildbot for long time.

Differential Revision: https://reviews.llvm.org/D73840
2020-02-11 16:20:06 -08:00
Matt Arsenault
4cc04e2aa0 AMDGPU: Don't expand more special div cases in IR
These have nicer expansions implemented in the DAG. Ideally we would
either directly implement all of these special expansions, or stop
expanding division in the IR.
2020-02-11 19:01:06 -05:00
Reid Kleckner
4858fda256 Fix MSVC build with C++ EH enabled
Mark the CrashRecoveryContextImpl constructor noexcept, so that MSVC
won't emit an unwind helper to clean up the allocation from `new` if the
constructor throws an exception.

Otherwise, MSVC complains:
  llvm\lib\Support\CrashRecoveryContext.cpp(220): error C2712: \
  Cannot use __try in functions that require object unwinding

The other simple fix would be to wrap `new` in a static helper or
lambda.

Users have reported that Tensorflow builds LLVM with /EHsc.
2020-02-11 15:56:10 -08:00
Matt Arsenault
c74d601f15 AMDGPU: Don't report 2-byte alignment as fast
This is apparently worse than 1-byte alignment. This does not attempt
to decompose 2-byte aligned wide stores, but will stop trying to
produce them.

Also fix bug in LoadStoreVectorizer which was decreasing the alignment
and vectorizing stack accesses. It was assuming a stack object was an
alloca that could have its base alignment changed, which is not true
if the pointer is derived from a function argument.
2020-02-11 18:35:00 -05:00
Derek Schuff
0e37f48abc [llvm-objcopy][WebAssembly] Add dump/add/remove-section support
Add support for adding, removing, and dumping wasm sections to objcopy

Differential Revision: https://reviews.llvm.org/D70970
2020-02-11 15:17:18 -08:00
Justin Lebar
0e4d775a3f Use std::foo_t rather than std::foo in LLVM.
Summary: C++14 migration. No functional change.

Reviewers: bkramer, JDevlieghere, lebedev.ri

Subscribers: MatzeB, hiraditya, jkorous, dexonsmith, arphaman, kadircet, lebedev.ri, usaxena95, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74384
2020-02-11 15:12:51 -08:00
Matt Arsenault
7f1560ae89 AMDGPU: Add baseline tests for CGP div expansion
These cases are harmed by expanding division early in the IR, before
DAGCombiner.
2020-02-11 18:11:39 -05:00
Matt Arsenault
4da25648cc AMDGPU: Fix crash on v3i15 kernel arguments
This was split into 3 i15 arguments. The i15 piece needs to be rounded
to a simple MVT for the memory type.
2020-02-11 18:11:39 -05:00
Matt Arsenault
a1fffbace3 AMDGPU: Directly use rcp intrinsic in idiv expansions
Since natural fdiv lowering is now more conservative even with
denormals disabled, we get a slower expansion from just a plain
1.0/fdiv. Directly emit the rcp intrinsic when using it to implement
integer division to avoid a pointlessly complex sequence.
2020-02-11 18:11:39 -05:00
Matt Arsenault
1abf53fb14 AMDGPU: Don't create potentially dead rcp declarations
This will introduce unused declarations if this doesn't reach any of
the paths that will really use it.
2020-02-11 18:11:39 -05:00
Aditya Nandakumar
d71f33d6b3 [MachO] Pad section data to pointer size bytes
https://reviews.llvm.org/D74273

Pad macho section data to pointer size bytes, so that relocation
table and symbol table following section data will be pointer size
aligned.

Patch by pguo.
2020-02-11 14:52:21 -08:00
Johannes Doerfert
973208ded7 [NFC] Fix spelling 2020-02-11 16:44:04 -06:00
Craig Topper
984931d95d [X86] Don't disable code in combineHorizontalPredicateResult just because we have avx512
We aren't doing a good job of optimizing AVX512 outside of this code. So remove the bail out for AVX512 and replace with a FIXME. This at least gets us the AVX2 codegen.

Differential Revision: https://reviews.llvm.org/D74431
2020-02-11 14:36:29 -08:00
Johannes Doerfert
824188d4da [Utils] Allow "on-the-fly" argument changes for update_test_check scripts
Update test scripts were limited because they performed a single action
on the entire file and if that action was controlled by arguments, like
the one introduced in D68819, there was no record of it.

This patch introduces the capability of changing the arguments passed to
the script "on-the-fly" while processing a test file. In addition, an
"on/off" switch was added so that processing can be disabled for parts
of the file where the content is simply copied. The last extension is a
record of the invocation arguments in the auto generated NOTE. These
arguments are also picked up in a subsequent invocation, allowing
updates with special options enabled without user interaction.

To change the arguments the string `UTC_ARGS:` has to be present in a
line, followed by "additional command line arguments". That is
everything that follows `UTC_ARGS:` will be added to a growing list
of "command line arguments" which is reparsed after every update.

Reviewed By: arichardson

Differential Revision: https://reviews.llvm.org/D69701
2020-02-11 16:29:46 -06:00
Stanislav Mekhanoshin
d67e9d99f4 [AMDGPU] Fixed subreg use in sdwa-scalar-ops.mir. NFC 2020-02-11 14:27:17 -08:00
Huihui Zhang
10305a8da8 [ConstantFold][SVE] Fix constand fold for vector call.
Summary:
Do not iterate on scalable vectors.

Reviewers: sdesmalen, efriedma, apazos, huntergr, willlovett

Reviewed By: sdesmalen

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74419
2020-02-11 14:06:15 -08:00
Krzysztof Parzyszek
886e13050e [Hexagon] Don't generate short vectors in ISD::SELECT in preprocessing
Selection DAG preprocessing runs long after legalization, so make sure
that the types can be handled by the selection code.
2020-02-11 15:27:33 -06:00
lewis-revill
13cfdc2bb4 [DebugInfo] Call site entries cannot be generated for FrameSetup calls
Instructions marked as FrameSetup do not cause requestLabelAfterInsn to
be called and so no such label is generated. Call instructions which
require call site entries to be generated require this label to be
present in order to calculate the return PC offset/address, but the
check for whether the call instruction is marked as FrameSetup was not
present.

Therefore in the case where a call instruction is marked as FrameSetup,
an assertion failure occurs if a call site entry is to be generated.
This is the case with RISC-V's implementation of save/restore via
library calls.

Differential Revision: https://reviews.llvm.org/D71593
2020-02-11 21:23:18 +00:00
lewis-revill
b0c6c4df1d [RISCV] Add support for save/restore of callee-saved registers via libcalls
This patch adds the support required for using the __riscv_save and
__riscv_restore libcalls to implement a size-optimization for prologue
and epilogue code, whereby the spill and restore code of callee-saved
registers is implemented by common functions to reduce code duplication.

Logic is also included to ensure that if both this optimization and
shrink wrapping are enabled then the prologue and epilogue code can be
safely inserted into the basic blocks chosen by shrink wrapping.

Differential Revision: https://reviews.llvm.org/D62686
2020-02-11 21:23:03 +00:00
Johannes Doerfert
640e5910d4 [Attributor][NFC] Clarify the documentation a bit more 2020-02-11 15:11:55 -06:00
Johannes Doerfert
5d53104112 [Attributor] Identify dead uses in PHIs (almost) based on dead edges
As an approximation to a dead edge we can check if the terminator is
dead. If so, the corresponding operand use in a PHI node is dead even if
the PHI node itself is not.
2020-02-11 15:11:55 -06:00
Lang Hames
b170349fb7 [ORC] Fix symbol dependence propagation algorithm in ObjectLinkingLayer.
ObjectLinkingLayer was not correctly propagating dependencies through local
symbols within an object. This could cause symbol lookup to return before a
searched-for symbol is ready if the following conditions are met:
(1) The definition of the symbol being searched for transitively depends on a
    local symbol within the same object, and that local symbol in turn
    transitively depends on an external symbol provided by some other module
    in the JIT.
(2) Concurrent compilation is enabled.
(3) Thread scheduling causes the lookup of the searched-for symbol to return
    before all transitive dependencies of the looked-up symbol are emitted.

This bug was found by inspection and has not been observed in practice.

A jitlink test case has been added to verify that symbol dependencies are
correctly propagated through local symbol definitions.
2020-02-11 12:56:41 -08:00
Lang Hames
3b9ed85d5b [JITLink] Add an assertion that block removal leaves no dangling symbols. 2020-02-11 12:56:41 -08:00
Lang Hames
1b4cebd3b1 [ORC] Add debug logging to JITDylib::addDependencies. 2020-02-11 12:56:40 -08:00
Sterling Augustine
0b336f6ee0 Update test for windows. 2020-02-11 12:35:46 -08:00
Jay Foad
666cdd68bc [AMDGPU] Fix implicit operands for ENTER_WWM pseudo
Summary:
SIInstrInfo::expandPostRAPseudo converts ENTER_WWM in-place into an
S_OR_SAVEEXEC instruction that needs certain implicit operands. Without
this patch I get errors like this that make it harder to use -stop-after
to bisect the pass pipeline:

$ llc -march=amdgcn test/CodeGen/AMDGPU/wqm.ll -stop-after=postrapseudos -o - | sed -E 's/ (from|into) custom "TargetCustom[0-9]+"//' | llc -march=amdgcn -x=mir
error: <stdin>:1295:70: missing implicit register operand 'implicit-def $scc'
    renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec
                                                                     ^

Note that this error is currently only generated by MIParser but it
comes with a FIXME comment:

// FIXME: Move the implicit operand verification to the machine verifier.

Reviewers: critson, arsenm, rampitec, nhaehnle

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74428
2020-02-11 20:11:41 +00:00
Sterling Augustine
ad25ac2e9f Allow retrieving source files relative to the compilation directory.
Summary:
Dwarf stores source-file names the three parts:
<compilation_directory><include_directory><filename>

Prior to this change, the code only allowed retrieving either all
three as the absolute path, or just the filename.  But many
compile-command lines--especially those in hermetic build systems
don't specify an absolute path, nor just the filename, but rather the
path relative to the compilation directory. This features allows
retrieving them in that style.

Add tests for path printing styles.

Modify createBasicPrologue to handle include directories.

Subscribers: aprantl, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73383
2020-02-11 11:46:20 -08:00
diggerlin
313f23df6f [NFC] Refactor the tuple of symbol information with structure for llvm-objdump
SUMMARY:

address  the comment of
https://reviews.llvm.org/D74240#inline-676127
https://reviews.llvm.org/D74240#inline-675875

Reviewers: daltenty, jason liu, xiangling liao
Subscribers: wuzish, nemanjai, hiraditya

Differential Revision: https://reviews.llvm.org/D74240
2020-02-11 14:41:24 -05:00
Reid Kleckner
474d5145ea [gn] Paper over Py3 urllib2 incompatibility in gn/get.py
Tested with both Python 2.7 and Python 3.7.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D73234
2020-02-11 11:39:16 -08:00
Alina Sbirlea
1e37b17c69 [BasicAA] Make BasicAA a cfg pass.
Summary:
Part of the changes in D44564 made BasicAA not CFG only due to it using
PhiAnalysisValues which may have values invalidated.
Subsequent patches (rL340613) appear to have addressed this limitation.

BasicAA should not be invalidated by non-CFG-altering passes.
A concrete example is MemCpyOpt which preserves CFG, but we are testing
it invalidates BasicAA.

llvm-dev RFC: https://groups.google.com/forum/#!topic/llvm-dev/eSPXuWnNfzM

Reviewers: john.brawn, sebpop, hfinkel, brzycki

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74353
2020-02-11 11:30:08 -08:00
Craig Topper
341faaf09a [X86] Raise the latency for VectorImul from 4 to 5 in Skylake scheduler models
Based on uops.info these should have 5 cycle latency as they did on Haswell/Broadwell. I have no additional internal information from Intel.

This was also shown as a discrepancy in the spreadsheet that was sent with an early llvm-dev post about llvm-exegesis.
It also matches Agner Fog.

Differential Revision: https://reviews.llvm.org/D74357
2020-02-11 11:24:25 -08:00
LLVM GN Syncbot
3113262a14 [gn build] Port 453a8f3af78 2020-02-11 19:14:15 +00:00
Stanislav Mekhanoshin
15d004efaa [AMDGPU] Remove AMDGPURegisterInfo
R600 and GCN do not have anything in common in terms of register
file organization anymore.

Differential Revision: https://reviews.llvm.org/D74426
2020-02-11 11:13:38 -08:00
Teresa Johnson
b852bbbbae Restore "[WPD/LowerTypeTests] Delay lowering/removal of type tests until after ICP"
This restores commit 748bb5a0f1964d20dfb3891b0948ab6c66236c70, along
with a fix for a Chromium test suite build issue (and a new test for
that case).

Differential Revision: https://reviews.llvm.org/D73242
2020-02-11 10:48:05 -08:00
Cyndy Ishida
a000512a83 [llvm][TextAPI] add simulators to output
Summary:
* for <= tbd_v3, simulator platforms appear the same as the real
platform and we distinct the difference from the architecture.

fixes: rdar://problem/59161559

Reviewers: ributzka, steven_wu

Reviewed By: ributzka

Subscribers: hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74416
2020-02-11 10:37:37 -08:00
Jordan Rupprecht
d027a3d383 [NFC] Fix unused var in release builds 2020-02-11 10:10:52 -08:00
Peter Collingbourne
8f7afa8fcf gn build: Make scudo cflags more consistent with the cmake build. 2020-02-11 10:05:48 -08:00
Yonghong Song
17ea6ea969 [BPF] implement isTruncateFree and isZExtFree in BPFTargetLowering
Currently, isTruncateFree() and isZExtFree() callbacks return false
as they are not implemented in BPF backend. This may cause suboptimal
code generation. For example, if the load in the context of zero extension
has more than one use, the pattern zextload{i8,i16,i32} will
not be generated. Rather, the load will be matched first and
then the result is zero extended.

For example, in the test together with this commit, we have
   I1: %0 = load i32, i32* %data_end1, align 4, !tbaa !2
   I2: %conv = zext i32 %0 to i64
   ...
   I3: %2 = load i32, i32* %data, align 4, !tbaa !7
   I4: %conv2 = zext i32 %2 to i64
   ...
   I5: %4 = trunc i64 %sub.ptr.lhs.cast to i32
   I6: %conv13 = sub i32 %4, %2
   ...

The I1 and I2 will match to one zextloadi32 DAG node, where SUBREG_TO_REG is
used to convert a 32bit register to 64bit one. During code generation,
SUBREG_TO_REG is a noop.

The %2 in I3 is used in both I4 and I6. If isTruncateFree() is false,
the current implementation will generate a SLL_ri and SRL_ri
for the zext part during lowering.

This patch implement isTruncateFree() in the BPF backend, so for the
above example, I3 and I4 will generate a zextloadi32 DAG node with
SUBREG_TO_REG is generated during lowering to Machine IR.

isZExtFree() is also implemented as it should help code gen as well.

This patch also enables the change in https://reviews.llvm.org/D73985
since it won't kick in generates MOV_32_64 machine instruction.

Differential Revision: https://reviews.llvm.org/D74101
2020-02-11 09:59:19 -08:00
Johannes Doerfert
5ec4b5827b [Attributor][NFC] Improve documentation 2020-02-11 11:19:34 -06:00
Johannes Doerfert
cda90fcba8 [CodingStandards] Add link to "Picking the Right Data Structure"
See https://reviews.llvm.org/D74340
2020-02-11 11:06:04 -06:00
Johannes Doerfert
3367058fed [Attributor] Return uses do not free pointers
If a pointer is returned that does not mean it is freed in the current
(function) scope. We can ignore such uses in AANoFree.
2020-02-11 11:02:59 -06:00
Johannes Doerfert
2a04c6760e [Attributor][FIX] Remove duplicate, half-broken functionality
The changeXXXAfterManifest functions are better suited to deal with
changes so we should prefer them. These functions also recursively
delete dead instructions which is why we see test changes.
2020-02-11 11:02:59 -06:00
Johannes Doerfert
9af8136f8d [Attributor][NFC] Improve debug message 2020-02-11 11:02:59 -06:00
Nikita Popov
e0376489be [IRBuilder] Remove more unnecessary NoFolder methods
Split out from D73835. I removed some of these before, but missed
these ones. They are not part of the ConstantFolder interface
and are not going to be used by the IRBuilder.
2020-02-11 17:41:32 +01:00
Nikita Popov
391510da6e [InstCombine] Use replaceOperand() in more places
This is a followup to D73803, which uses the replaceOperand()
helper in more places.

This should be NFC apart from changes to worklist order.

Differential Revision: https://reviews.llvm.org/D73919
2020-02-11 17:38:23 +01:00
Jonas Paulsson
ade2c5a52b [SystemZ] Fix new test case for expensive checks.
It needs 'tracksRegLiveness: true' to pass the machine verifier.
2020-02-11 11:33:41 -05:00
Nikita Popov
407e64f475 [X86CmovConversion] Make heuristic for optimized cmov depth more conservative (PR44539)
Fix/workaround for https://bugs.llvm.org/show_bug.cgi?id=44539.
As discussed there, this pass makes some overly optimistic
assumptions, as it does not have access to actual branch weights.

This patch makes the computation of the depth of the optimized cmov
more conservative, by assuming a distribution of 75/25 rather than
50/50 and placing the weights to get the more conservative result
(larger depth). The fully conservative choice would be
std::max(TrueOpDepth, FalseOpDepth), but that would break at least
one existing test (which may or may not be an issue in practice).

Differential Revision: https://reviews.llvm.org/D74155
2020-02-11 17:33:11 +01:00
James Henderson
055c0f01aa [test][DebugInfo][NFC] Fix line endings 2020-02-11 16:11:40 +00:00
Eric Astor
eadbf29908 [ms] [llvm-ml] Add support for attempted register parsing
Summary:
Add a new method (tryParseRegister) that attempts to parse a register specification.

MASM allows the use of IFDEF <register>, as well as IFDEF <symbol>. To accommodate this, we make it possible to check whether a register specification can be parsed at the current location, without failing the entire parse if it can't.

Reviewers: thakis

Reviewed By: thakis

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73486
2020-02-11 10:45:33 -05:00
Jonas Paulsson
1106f41fb3 [SystemZ] Bugfix in emitSelect()
When more than one SelectPseudo instruction is handled a new MBB is
returned. This must not be done if that would result in leaving an undhandled
isel pseudo behind in the original MBB.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44849.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D74352
2020-02-11 10:41:01 -05:00