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Commit Graph

80760 Commits

Author SHA1 Message Date
Daniel Dunbar
fe15f6be2f Revert r152288, "[ADT] Change the trivial FoldingSetNodeID::Add* methods to be
inline.", which is breaking the bots in a way I don't understand.

llvm-svn: 152295
2012-03-08 04:17:15 +00:00
Akira Hatanaka
f4288c9e0e Test case for r152280, r152285 and r152290.
llvm-svn: 152292
2012-03-08 03:32:42 +00:00
Akira Hatanaka
7390c7f0b4 Invoke setTargetDAGCombine for SELECT.
llvm-svn: 152290
2012-03-08 03:26:37 +00:00
Daniel Dunbar
b99e53d8c3 [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline.
llvm-svn: 152288
2012-03-08 02:52:00 +00:00
Akira Hatanaka
9de051a22a Swap the operands of a select node if the false (the second) operand is 0.
For example, this pattern 
(select (setcc lhs, rhs, cc), true, 0)
is transformed to this one:
(select (setcc lhs, rhs, inverse(cc)), 0, true)

This enables MipsDAGToDAGISel::ReplaceUsesWithZeroReg (added in r152280) to
replace 0 with $zero.

llvm-svn: 152285
2012-03-08 02:14:24 +00:00
Chandler Carruth
c0ed0a5f22 Rotate two of the functions used to count bonuses for the inline cost
analysis to be methods on the cost analysis's function info object
instead of the code metrics object. These really are just users of the
code metrics, they're building the information for the function's
analysis.

This is the first step of growing the amount of information we collect
about a function in order to cope with pair-wise simplifications due to
allocas.

llvm-svn: 152283
2012-03-08 02:04:19 +00:00
Akira Hatanaka
3440b8840f Set minimum function alignment to 3 if target is Mips64.
llvm-svn: 152282
2012-03-08 01:59:33 +00:00
Akira Hatanaka
f500c76435 This patch eliminates redundant instructions that produce 0.
For example, the first instruction in the code below can be eliminated if the
use of $vr0 is replaced with $zero: 

addiu $vr0, $zero, 0
add $vr2, $vr1, $vr0

add $vr2, $vr1, $zero

llvm-svn: 152280
2012-03-08 01:51:59 +00:00
Andrew Trick
65153639f8 misched interface: Expose the MachineScheduler pass.
Allow targets to provide their own schedulers (subclass of
ScheduleDAGInstrs) to the misched pass. Select schedulers using
-misched=...

llvm-svn: 152278
2012-03-08 01:41:12 +00:00
Jim Grosbach
6c4a2c8050 ARM don't use MCRelaxAll, as it's not safe on ARM.
The ARM code generator makes aggressive assumptions about the encodings
being selected for branches which MCRelaxAll invalidates.

rdar://11006355

llvm-svn: 152268
2012-03-08 00:07:52 +00:00
Sean Callanan
d2dc3cff1d Improved support in RuntimeDyldMachO for generating
code that will be relocated into another memory space.
Now when relocations are resolved, the address of
the relocation in the host memory (where the JIT is)
is passed separately from the address that the
relocation will be at in the target memory (where
the code will run).

llvm-svn: 152264
2012-03-07 23:05:25 +00:00
Andrew Trick
cbd96ef2f2 Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.
llvm-svn: 152262
2012-03-07 23:01:09 +00:00
Andrew Trick
d16430c664 misched prep: Expose the ScheduleDAGInstrs interface so targets may
implement their own MachineScheduler.

llvm-svn: 152261
2012-03-07 23:01:06 +00:00
Andrew Trick
80aaf38e4e misched prep: Remove LLVM_LIBRARY_VISIBILITY from ScheduleDAGInstrs.
llvm-svn: 152260
2012-03-07 23:01:02 +00:00
Andrew Trick
5ab2b8a031 misched prep: Comment the ScheduleDAGInstrs interface.
llvm-svn: 152259
2012-03-07 23:00:59 +00:00
Andrew Trick
df0a76e646 misched prep: Cleanup ScheduleDAGInstrs interface.
ScheduleDAGInstrs will be the main interface for MI-level
schedulers. Make sure it's readable: one page of protected fields, one
page of public methids.

llvm-svn: 152258
2012-03-07 23:00:57 +00:00
Andrew Trick
8608f03241 misched prep: remove extra "protected"
llvm-svn: 152257
2012-03-07 23:00:54 +00:00
Andrew Trick
40eae1a830 misched prep: rename InsertPos to End.
ScheduleDAGInstrs knows nothing about how instructions will be moved or inserted.

llvm-svn: 152256
2012-03-07 23:00:52 +00:00
Andrew Trick
2b0038db94 misched preparation: rename core scheduler methods for consistency.
We had half the API with one convention, half with another. Now was a
good time to clean it up.

llvm-svn: 152255
2012-03-07 23:00:49 +00:00
Benjamin Kramer
8aa45ad186 Copy the right amount of elements.
llvm-svn: 152254
2012-03-07 22:48:42 +00:00
Benjamin Kramer
ef27a1e10d SmallPtrSet: Copy all the elements when swapping, not just numelements.
This fixes a build failure in webkit. Copying all elements shouldn't be
necessary, I'll look out for a better fix soon.

llvm-svn: 152252
2012-03-07 22:33:21 +00:00
Chad Rosier
07b6e758e1 [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point
condition flags to CPSR.  This allows us to simplify SelectCmp.
Patch by Zonr Chang <zonr.xchg@gmail.com>.

llvm-svn: 152243
2012-03-07 20:59:26 +00:00
Rafael Espindola
4cd149ab38 Use llvm-mc instead of llc. Patch by Jack Carter.
llvm-svn: 152242
2012-03-07 20:58:59 +00:00
Benjamin Kramer
a822b1228d configure: Don't require a perl interpreter to be present, LLVM's buildsystem doesn't depend on perl anymore.
llvm-svn: 152234
2012-03-07 17:07:20 +00:00
Chad Rosier
42837769dc Revert r152202 as it's causing internal buildbot failures.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.

llvm-svn: 152233
2012-03-07 17:06:40 +00:00
Jakob Stoklund Olesen
47b877f5bd Fix infinite loop in nested multiclasses.
Patch by Michael Liao!

llvm-svn: 152232
2012-03-07 16:39:35 +00:00
Chandler Carruth
73ca723785 Try a completely different approach to this type trait to appease older
compilers. It seems that GCC 4.3 (and likely older) simply aren't going
to do SFINAE on non-type template parameters the way Clang and modern
GCCs do...

Now we detect the implicit conversion to an integer type, and then
blacklist classes, pointers, and floating point types. This seems to
work well enough, and I'm hopeful will return the bots to life.

llvm-svn: 152227
2012-03-07 12:27:35 +00:00
Chandler Carruth
73d8fe8504 Attempt #2 at appeasing GCC 4.3. This compiler really doesn't like these
traits.

With this change, the pattern used here is *extremely* close to the
pattern used elsewhere in the file, so I'm hoping it survives the
build-bots.

llvm-svn: 152225
2012-03-07 11:31:11 +00:00
Chandler Carruth
5cfce10358 Try to clarify this comment some.
llvm-svn: 152221
2012-03-07 10:13:40 +00:00
Chandler Carruth
83d690cd03 Switch the is_integral_or_enum trait machinery to use an explicit
template argument and an *implicit* conversion from '0' to a null
pointer. For some bizarre reason, GCC 4.3.2 thinks that the cast to
'(T*)' is invalid inside of an enumerator's value... which it isn't but
whatever. ;] This pattern is used elsewhere in the type_traits header
and so hopefully will survive the wrath of the build bots.

llvm-svn: 152220
2012-03-07 10:05:35 +00:00
Chandler Carruth
d731be046b What's better than fixing and simplifying broken hash functions?
Deleting them because they aren't used. =D

Yell if you need these, I'm happy to instead replace them with nice uses
of the new infrastructure.

llvm-svn: 152219
2012-03-07 09:54:06 +00:00
Chandler Carruth
2ac287af28 Remove another outbreak of customized (and completely broken) hashing.
This one is particularly annoying because the hashing algorithm is
highly specialized, with a strange "equivalence" definition that subsets
the fields involved.

Still, this looks at the exact same set of data as the old code, but
without bitwise or-ing over parts of it and other mixing badness. No
functionality changed here. I've left a substantial fixme about the fact
that there is a cleaner and more principled way to do this, but it
requires making the equality definition actual stable for particular
types...

llvm-svn: 152218
2012-03-07 09:39:46 +00:00
Chandler Carruth
25594f9e13 Add support to the hashing infrastructure for automatically hashing both
integral and enumeration types. This is accomplished with a bit of
template type trait magic. Thanks to Richard Smith for the core idea
here to detect viable types by detecting the set of types which can be
default constructed in a template parameter.

This is used (in conjunction with a system for detecting nullptr_t
should it exist) to provide an is_integral_or_enum type trait that
doesn't need a whitelist or direct compiler support.

With this, the hashing is extended to the more general facility. This
will be used in a subsequent commit to hashing more things, but I wanted
to make sure the type trait magic went through the build bots separately
in case other compilers don't like this formulation.

llvm-svn: 152217
2012-03-07 09:32:32 +00:00
Bill Wendling
828a0d7638 Where the BranchFolding pass removes a branch then adds another better branch,
the DebugLoc information can be maintained throughout by grabbing the DebugLoc
before the RemoveBranch and then passing the result to the InsertBranch.
Patch by Andrew Stanford-Jason!

llvm-svn: 152212
2012-03-07 08:49:42 +00:00
Andrew Trick
47489a0a3d Fix cmake
llvm-svn: 152210
2012-03-07 05:46:04 +00:00
Andrew Trick
d7a7509ea0 comment
llvm-svn: 152209
2012-03-07 05:21:54 +00:00
Andrew Trick
b76bc2eacb misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation.

ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class.

ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target.

Specific changes:
- Removed driver code from ScheduleDAG. clearDAG is the only interface needed.

- Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls.

- Added ScheduleDAGInstrs::begin()/end() public API.

- Moved Sequence into the driver layer, which is specific to the scheduling algorithm.

llvm-svn: 152208
2012-03-07 05:21:52 +00:00
Andrew Trick
0df67ea935 ScheduleDAGInstrs comments
llvm-svn: 152207
2012-03-07 05:21:47 +00:00
Andrew Trick
9dcbf0e144 misched preparation: modularize schedule emission.
ScheduleDAG has nothing to do with how the instructions are scheduled.

llvm-svn: 152206
2012-03-07 05:21:44 +00:00
Andrew Trick
794bad1f46 misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence.

llvm-svn: 152205
2012-03-07 05:21:40 +00:00
Andrew Trick
c3b53855a2 misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence.

llvm-svn: 152204
2012-03-07 05:21:36 +00:00
Andrew Trick
074325d509 whitespace
llvm-svn: 152203
2012-03-07 05:21:32 +00:00
Craig Topper
42ddd0840a Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
llvm-svn: 152202
2012-03-07 05:17:23 +00:00
Eli Friedman
892a4b0100 Missing change in r152106 for TinyPtrVector.
llvm-svn: 152201
2012-03-07 03:37:32 +00:00
Chandler Carruth
53d60ebfa2 Switch this code to use hash_combine_range rather than incremental calls
to hash_combine. One of the interfaces could already do this, and the
other can just use a small buffer. This is a much more efficient way to
use the hash_combine interface, although I don't have any particular
benchmark where this code was hot, so I can't measure much of an impact.
It at least doesn't slow anything down.

llvm-svn: 152200
2012-03-07 03:22:32 +00:00
Chandler Carruth
42ee38de30 Cache the sized-ness of struct types, once we reach the steady state of
"is sized". This prevents every query to isSized() from recursing over
every sub-type of a struct type. This could get *very* slow for
extremely deep nesting of structs, as in 177.mesa.

This change is a 45% speedup for 'opt -O2' of 177.mesa.linked.bc, and
likely a significant speedup for other cases as well. It even impacts
-O0 cases because so many part of the code try to check whether a type
is sized.

Thanks for the review from Nick Lewycky and Benjamin Kramer on IRC.

llvm-svn: 152197
2012-03-07 02:33:09 +00:00
Chandler Carruth
fccdc0f2e7 Remove an accidental cut/paste of a comment into the middle of
a function. Dunno how I missed this when going through code...

llvm-svn: 152196
2012-03-07 02:33:06 +00:00
Nick Lewycky
7c4db49d7e No functionality change. Type::isSized() can be expensive, so avoid calling it
until after other inexpensive tests.

llvm-svn: 152195
2012-03-07 02:27:53 +00:00
Jim Grosbach
d0770582f9 ARM pre-v6 assembly parsing for umull/smull.
llvm-svn: 152188
2012-03-07 01:09:17 +00:00
Jim Grosbach
dbeec050c2 ARM pre-v6 alias for 'nop' to 'mov r0, r0'
llvm-svn: 152185
2012-03-07 00:52:41 +00:00